124 lines
5.3 KiB
Rust
124 lines
5.3 KiB
Rust
//! Emulate LLVM intrinsics
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use crate::intrinsics::*;
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use crate::prelude::*;
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use rustc_middle::ty::subst::SubstsRef;
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pub(crate) fn codegen_llvm_intrinsic_call<'tcx>(
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fx: &mut FunctionCx<'_, '_, 'tcx>,
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intrinsic: &str,
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substs: SubstsRef<'tcx>,
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args: &[mir::Operand<'tcx>],
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destination: Option<(CPlace<'tcx>, BasicBlock)>,
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) {
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let ret = destination.unwrap().0;
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intrinsic_match! {
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fx, intrinsic, substs, args,
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_ => {
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fx.tcx.sess.warn(&format!("unsupported llvm intrinsic {}; replacing with trap", intrinsic));
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crate::trap::trap_unimplemented(fx, intrinsic);
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};
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// Used by `_mm_movemask_epi8` and `_mm256_movemask_epi8`
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llvm.x86.sse2.pmovmskb.128 | llvm.x86.avx2.pmovmskb | llvm.x86.sse2.movmsk.pd, (c a) {
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let (lane_count, lane_ty) = a.layout().ty.simd_size_and_type(fx.tcx);
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let lane_ty = fx.clif_type(lane_ty).unwrap();
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assert!(lane_count <= 32);
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let mut res = fx.bcx.ins().iconst(types::I32, 0);
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for lane in (0..lane_count).rev() {
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let a_lane = a.value_field(fx, mir::Field::new(lane.try_into().unwrap())).load_scalar(fx);
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// cast float to int
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let a_lane = match lane_ty {
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types::F32 => fx.bcx.ins().bitcast(types::I32, a_lane),
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types::F64 => fx.bcx.ins().bitcast(types::I64, a_lane),
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_ => a_lane,
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};
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// extract sign bit of an int
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let a_lane_sign = fx.bcx.ins().ushr_imm(a_lane, i64::from(lane_ty.bits() - 1));
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// shift sign bit into result
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let a_lane_sign = clif_intcast(fx, a_lane_sign, types::I32, false);
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res = fx.bcx.ins().ishl_imm(res, 1);
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res = fx.bcx.ins().bor(res, a_lane_sign);
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}
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let res = CValue::by_val(res, fx.layout_of(fx.tcx.types.i32));
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ret.write_cvalue(fx, res);
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};
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llvm.x86.sse2.cmp.ps | llvm.x86.sse2.cmp.pd, (c x, c y, o kind) {
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let kind_const = crate::constant::mir_operand_get_const_val(fx, kind).expect("llvm.x86.sse2.cmp.* kind not const");
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let flt_cc = match kind_const.try_to_bits(Size::from_bytes(1)).unwrap_or_else(|| panic!("kind not scalar: {:?}", kind_const)) {
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0 => FloatCC::Equal,
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1 => FloatCC::LessThan,
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2 => FloatCC::LessThanOrEqual,
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7 => {
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unimplemented!("Compares corresponding elements in `a` and `b` to see if neither is `NaN`.");
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}
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3 => {
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unimplemented!("Compares corresponding elements in `a` and `b` to see if either is `NaN`.");
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}
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4 => FloatCC::NotEqual,
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5 => {
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unimplemented!("not less than");
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}
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6 => {
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unimplemented!("not less than or equal");
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}
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kind => unreachable!("kind {:?}", kind),
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};
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simd_pair_for_each_lane(fx, x, y, ret, |fx, lane_layout, res_lane_layout, x_lane, y_lane| {
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let res_lane = match lane_layout.ty.kind() {
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ty::Float(_) => fx.bcx.ins().fcmp(flt_cc, x_lane, y_lane),
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_ => unreachable!("{:?}", lane_layout.ty),
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};
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bool_to_zero_or_max_uint(fx, res_lane_layout, res_lane)
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});
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};
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llvm.x86.sse2.psrli.d, (c a, o imm8) {
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let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8).expect("llvm.x86.sse2.psrli.d imm8 not const");
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simd_for_each_lane(fx, a, ret, |fx, _lane_layout, res_lane_layout, lane| {
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let res_lane = match imm8.try_to_bits(Size::from_bytes(4)).unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8)) {
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imm8 if imm8 < 32 => fx.bcx.ins().ushr_imm(lane, i64::from(imm8 as u8)),
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_ => fx.bcx.ins().iconst(types::I32, 0),
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};
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CValue::by_val(res_lane, res_lane_layout)
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});
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};
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llvm.x86.sse2.pslli.d, (c a, o imm8) {
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let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8).expect("llvm.x86.sse2.psrli.d imm8 not const");
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simd_for_each_lane(fx, a, ret, |fx, _lane_layout, res_lane_layout, lane| {
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let res_lane = match imm8.try_to_bits(Size::from_bytes(4)).unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8)) {
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imm8 if imm8 < 32 => fx.bcx.ins().ishl_imm(lane, i64::from(imm8 as u8)),
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_ => fx.bcx.ins().iconst(types::I32, 0),
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};
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CValue::by_val(res_lane, res_lane_layout)
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});
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};
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llvm.x86.sse2.storeu.dq, (v mem_addr, c a) {
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// FIXME correctly handle the unalignment
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let dest = CPlace::for_ptr(Pointer::new(mem_addr), a.layout());
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dest.write_cvalue(fx, a);
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};
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}
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if let Some((_, dest)) = destination {
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let ret_block = fx.get_block(dest);
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fx.bcx.ins().jump(ret_block, &[]);
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} else {
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trap_unreachable(fx, "[corruption] Diverging intrinsic returned.");
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}
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}
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// llvm.x86.avx2.vperm2i128
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// llvm.x86.ssse3.pshuf.b.128
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// llvm.x86.avx2.pshuf.b
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// llvm.x86.avx2.psrli.w
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// llvm.x86.sse2.psrli.w
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