mirror of
https://gitlab.com/ita1024/waf.git
synced 2024-11-22 09:57:15 +01:00
274 lines
6.3 KiB
Python
274 lines
6.3 KiB
Python
#!/usr/bin/env python
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# encoding: utf-8
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# waf example, builds a Xilinx FPGA bitstream
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__copyright__ = '(c) Jérôme Carretero <cJ-waf@zougloub.eu> 2012'
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"""
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This script builds an FPGA bitstream in an automated fashion.
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The Xilinx ISE IDE does the same thing, but needs mouse interaction.
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Notes:
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- this is quite sad, but the Xilinx toolchain tools want to operate
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in the source folder, so top==out
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- Xilinx toolchain tools generate file with timestamps,
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so an unsignificant change can still trigger domino cascade
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of compilations.
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- a "xilinx" wrapper is used; this file performs set up of the
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PATH for Xilinx tools (not done yet by the wscript)
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TODO:
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- make a tool
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- remove hard-coded .xst / .ut data (ISE generates that from the .xise)
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- CPLD toolchain (only works for FPGA)
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"""
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top = out = "." # mandatory
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import os
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import shutil
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import waflib
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from lxml import etree
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def options(opt):
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pass
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def configure(cfg):
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pass
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def build(bld):
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if not os.path.exists("xst/projnav.tmp"):
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os.makedirs("xst/projnav.tmp")
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nsmap={"pn": "http://www.xilinx.com/XMLSchema"}
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xise = "waf_demo.xise"
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fn = "waf_demo"
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xml = etree.parse(xise)
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def get(txt):
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try: return xml.xpath('//pn:property[@pn:name = "%s"]/@pn:value' % txt, namespaces=nsmap)[0]
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except: pass
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device = get("Device") # or "xc3s1500"
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package = get("Package") # or "fg456"
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speed = get("Speed Grade") # or "-4"
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# Set .prj file contents and collect HDL sources
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hdl = []
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prj = []
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for x in xml.xpath('//pn:files/pn:file[@pn:type = "FILE_VHDL"]/@pn:name', namespaces=nsmap):
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prj.append('vhdl work "%s"' % x)
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hdl.append(x)
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for x in xml.xpath('//pn:files/pn:file[@pn:type = "FILE_VERILOG"]/@pn:name', namespaces=nsmap):
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prj.append('verilog work "%s"' % x)
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hdl.append(x)
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ucf = xml.xpath('//pn:files/pn:file[@pn:type = "FILE_UCF"]/@pn:name', namespaces=nsmap)[0] or "src/pci_7seg.ucf"
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def make_prj(self):
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self.outputs[0].write("\n".join(prj))
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def make_xst(self):
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self.outputs[0].write("""
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set -tmpdir "xst/projnav.tmp"
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set -xsthdpdir "xst"
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run
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-ifn %(fn)s.prj
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-ifmt mixed
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-ofn %(fn)s
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-ofmt NGC
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-p %(device)s%(speed)s-%(package)s
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-top %(fn)s
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-opt_mode Speed
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-opt_level 1
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-iuc NO
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-keep_hierarchy No
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-netlist_hierarchy As_Optimized
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-rtlview Yes
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-glob_opt AllClockNets
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-read_cores YES
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-write_timing_constraints NO
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-cross_clock_analysis NO
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-hierarchy_separator /
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-bus_delimiter <>
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-case Maintain
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-slice_utilization_ratio 100
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-bram_utilization_ratio 100
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-verilog2001 YES
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-fsm_extract YES -fsm_encoding Auto
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-safe_implementation No
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-fsm_style LUT
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-ram_extract Yes
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-ram_style Auto
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-rom_extract Yes
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-mux_style Auto
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-decoder_extract YES
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-priority_extract Yes
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-shreg_extract YES
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-shift_extract YES
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-xor_collapse YES
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-rom_style Auto
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-auto_bram_packing NO
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-mux_extract Yes
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-resource_sharing YES
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-async_to_sync NO
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-mult_style Auto
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-iobuf YES
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-max_fanout 500
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-bufg 8
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-register_duplication YES
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-register_balancing No
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-slice_packing YES
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-optimize_primitives NO
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-use_clock_enable Yes
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-use_sync_set Yes
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-use_sync_reset Yes
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-iob Auto
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-equivalent_register_removal YES
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-slice_utilization_ratio_maxmargin 5
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""" % locals())
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def make_ut(self):
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self.outputs[0].write("""
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-w
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-g DebugBitstream:No
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-g Binary:no
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-g CRC:Enable
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-g ConfigRate:6
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-g CclkPin:PullUp
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-g M0Pin:PullUp
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-g M1Pin:PullUp
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-g M2Pin:PullUp
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-g ProgPin:PullUp
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-g DonePin:PullUp
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-g HswapenPin:PullUp
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-g TckPin:PullUp
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-g TdiPin:PullUp
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-g TdoPin:PullUp
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-g TmsPin:PullUp
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-g UnusedPin:PullDown
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-g UserID:0xFFFFFFFF
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-g DCMShutdown:Disable
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-g DCIUpdateMode:AsRequired
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-g StartUpClk:CClk
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-g DONE_cycle:4
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-g GTS_cycle:5
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-g GWE_cycle:6
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-g LCK_cycle:NoWait
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-g Match_cycle:Auto
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-g Security:None
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-g DonePipe:No
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-g DriveDone:No""")
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bld(
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name='prj',
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target="%s.prj" % fn,
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rule=make_prj,
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source=[xise],
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)
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bld(
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name='xst',
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target='%s.xst' % fn,
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rule=make_xst,
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source=[xise],
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)
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bld(
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name='ut',
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target='%s.ut' % fn,
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rule=make_ut,
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source=[xise],
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)
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bld(
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name='synth',
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target=['%s%s' % (fn, ext) for ext in ('.syr', '.ngc', '.ngr', '.lso', '_xst.xrpt') ],
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rule='xilinx xst -intstyle ise -ifn ${SRC[0].abspath()} -ofn ${TGT[0].abspath()}; true',
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source=['%s.xst' % fn, '%s.prj' % fn] + hdl,
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)
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bld(
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name='ngdbuild',
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target=['%s%s' % (fn, ext) for ext in ('.ngd', '_ngdbuild.xrpt') ],
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rule='xilinx ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc ${SRC[1].abspath()} -p %(device)s-%(package)s%(speed)s ${SRC[0].bldpath()} ${TGT[0].bldpath()}' % locals(),
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source=['%s.ngc' % fn, ucf],
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)
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bld(
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name='map',
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target=['%s%s' % (fn, ext) for ext in ('_map.ncd', '.pcf', '_map.map', '_map.mrp', '_map.ngm', '_map.xrpt', '.bld') ],
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rule='xilinx map -intstyle ise -p %(device)s-%(package)s%(speed)s -cm area -ir off -pr b -c 100 -o ${TGT[0].bldpath()} ${SRC[0].bldpath()} ${TGT[1].bldpath()}' % locals(),
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source=['%s.ngd' % fn],
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)
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bld(
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name='par',
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target=['%s%s' % (fn, ext) for ext in ('.ncd', '.pad', '.par', '.ptwx', '.unroutes', '.xpi', '_pad.csv', '_pad.txt', '_par.xrpt') ],
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rule='xilinx par -w -intstyle ise -ol high -t 1 ${SRC[0].bldpath()} ${TGT[0].bldpath()} ${SRC[1].bldpath()}',
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source=['%s_map.ncd' % fn, '%s.pcf' % fn],
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)
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bld(
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name='trce',
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target=['%s%s' % (fn, ext) for ext in ('.twx', '.twr') ],
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rule='xilinx trce -intstyle ise -e 3 -s 4 -n 3 -xml ${TGT[0].bldpath()} ${SRC[0].bldpath()} -o ${TGT[1].bldpath()} ${SRC[1].bldpath()}; true',
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source=['%s_map.ncd' % fn, '%s.pcf' % fn],
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)
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bld(
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name='bitgen',
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target=['%s%s' % (fn, ext) for ext in ('.bit', '.bgn', '.drc', '_bitgen.xwbt', '_summary.xml', '_usage.xml') ],
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rule='xilinx bitgen -intstyle ise -f ${SRC[1].bldpath()} ${SRC[0].bldpath()} ${TGT[0].bldpath()}',
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source=['%s.ncd' % fn, '%s.ut' % fn],
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)
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if bld.cmd == 'clean':
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for tgen in bld.get_all_task_gen():
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for tgt in waflib.Utils.to_list(tgen.target):
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if os.path.exists(tgt):
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os.remove(tgt)
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for x in (
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'usage_statistics_webtalk.html',
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'webtalk_pn.xml',
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'webtalk.log',
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):
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if os.path.exists(x):
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os.remove(x)
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for x in (
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'_ngo',
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'_xmsgs',
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'iseconfig',
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'xlnx_auto_0_xdb',
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'xst',
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):
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try:
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shutil.rmtree(x)
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except:
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pass
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def distclean(ctx):
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import os, shutil
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from waflib import Context
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for fn in os.listdir('.'):
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if fn.startswith(('.conf_check_', ".lock-w")) \
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or fn in (Context.DBFILE, 'config.log') \
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or fn == 'c4che':
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if os.path.isdir(fn):
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shutil.rmtree(fn)
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else:
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os.remove(fn)
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