* defs.h: Incorporate param.h. All users changed.
* param-no-tm.h: Change users to define TM_FILE_OVERRIDE instead.
* param.h, param-no-tm.h: Removed.
* Update copyrights in all changed files.
* dbxread.c, dwarfread.c, inflow.c, infrun.c, m2-exp.y, putenv.c,
solib.c, symtab.h, tm-umax.h, valprint.c: Lint.
* tm-convex.h, tm-hp300hpux.h, tm-merlin.h, tm-sparc.h,
xm-merlin.h: Avoid host include files in target descriptions.
* getpagesize.h: Removed, libiberty copes now.
1991-11-21 19:42:05 +01:00
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|
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/* Print SPARC instructions for GDB, the GNU Debugger.
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Copyright 1989, 1991 Free Software Foundation, Inc.
|
1991-03-28 17:28:29 +01:00
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This file is part of GDB, the GNU disassembler.
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1991-06-04 09:31:55 +02:00
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This program is free software; you can redistribute it and/or modify
|
1991-03-28 17:28:29 +01:00
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it under the terms of the GNU General Public License as published by
|
1991-06-04 09:31:55 +02:00
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
|
1991-03-28 17:28:29 +01:00
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1991-06-04 09:31:55 +02:00
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This program is distributed in the hope that it will be useful,
|
1991-03-28 17:28:29 +01:00
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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|
GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
|
1991-06-04 09:31:55 +02:00
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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1991-03-28 17:28:29 +01:00
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#include <stdio.h>
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#include "defs.h"
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#include "symtab.h"
|
1991-12-24 00:16:58 +01:00
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#include "opcode/sparc.h"
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1991-03-28 17:28:29 +01:00
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#include "gdbcore.h"
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#include "string.h"
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#include "target.h"
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extern char *reg_names[];
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#define freg_names (®_names[4 * 8])
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union sparc_insn
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{
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unsigned long int code;
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struct
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{
|
1992-01-03 00:09:53 +01:00
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unsigned int anop:2;
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#define op ldst.anop
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unsigned int anrd:5;
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#define rd ldst.anrd
|
1991-03-28 17:28:29 +01:00
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unsigned int op3:6;
|
1992-01-03 00:09:53 +01:00
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unsigned int anrs1:5;
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#define rs1 ldst.anrs1
|
1991-03-28 17:28:29 +01:00
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unsigned int i:1;
|
1992-01-03 00:09:53 +01:00
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unsigned int anasi:8;
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#define asi ldst.anasi
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unsigned int anrs2:5;
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#define rs2 ldst.anrs2
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1991-03-28 17:28:29 +01:00
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#define shcnt rs2
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} ldst;
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struct
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{
|
1992-01-03 00:09:53 +01:00
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unsigned int anop:2, anrd:5, op3:6, anrs1:5, i:1;
|
1991-03-28 17:28:29 +01:00
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unsigned int IMM13:13;
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#define imm13 IMM13.IMM13
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|
} IMM13;
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struct
|
|
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|
{
|
1992-01-03 00:09:53 +01:00
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|
unsigned int anop:2;
|
1991-03-28 17:28:29 +01:00
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|
unsigned int a:1;
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|
unsigned int cond:4;
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|
unsigned int op2:3;
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|
unsigned int DISP22:22;
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|
|
#define disp22 branch.DISP22
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|
|
|
} branch;
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|
#define imm22 disp22
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|
|
|
struct
|
|
|
|
{
|
1992-01-03 00:09:53 +01:00
|
|
|
unsigned int anop:2;
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|
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|
unsigned int adisp30:30;
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|
|
#define disp30 call.adisp30
|
1991-03-28 17:28:29 +01:00
|
|
|
} call;
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|
|
};
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|
/* Nonzero if INSN is the opcode for a delayed branch. */
|
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|
static int
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|
is_delayed_branch (insn)
|
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|
|
union sparc_insn insn;
|
|
|
|
{
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|
unsigned int i;
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|
|
for (i = 0; i < NUMOPCODES; ++i)
|
|
|
|
{
|
|
|
|
const struct sparc_opcode *opcode = &sparc_opcodes[i];
|
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|
|
if ((opcode->match & insn.code) == opcode->match
|
|
|
|
&& (opcode->lose & insn.code) == 0)
|
|
|
|
return (opcode->flags & F_DELAYED);
|
|
|
|
}
|
|
|
|
return 0;
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|
|
|
}
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|
|
/* Print one instruction from MEMADDR on STREAM. */
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|
int
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|
print_insn (memaddr, stream)
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|
|
|
CORE_ADDR memaddr;
|
|
|
|
FILE *stream;
|
|
|
|
{
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|
|
|
union sparc_insn insn;
|
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|
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|
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|
register unsigned int i;
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|
read_memory (memaddr, &insn, sizeof (insn));
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|
|
for (i = 0; i < NUMOPCODES; ++i)
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|
|
|
{
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|
const struct sparc_opcode *opcode = &sparc_opcodes[i];
|
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|
|
if ((opcode->match & insn.code) == opcode->match
|
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|
|
&& (opcode->lose & insn.code) == 0)
|
|
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|
{
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|
/* Nonzero means that we have found an instruction which has
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|
|
the effect of adding or or'ing the imm13 field to rs1. */
|
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|
|
int imm_added_to_rs1 = 0;
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|
|
/* Nonzero means that we have found a plus sign in the args
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|
|
field of the opcode table. */
|
|
|
|
int found_plus = 0;
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|
|
/* Do we have an 'or' instruction where rs1 is the same
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|
as rsd, and which has the i bit set? */
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|
|
if (opcode->match == 0x80102000
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|
&& insn.rs1 == insn.rd)
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|
imm_added_to_rs1 = 1;
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|
|
if (insn.rs1 != insn.rd
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|
&& strchr (opcode->args, 'r') != 0)
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|
/* Can't do simple format if source and dest are different. */
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|
continue;
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fputs_filtered (opcode->name, stream);
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{
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|
register const char *s;
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|
if (opcode->args[0] != ',')
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|
fputs_filtered (" ", stream);
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for (s = opcode->args; *s != '\0'; ++s)
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|
{
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|
if (*s == ',')
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|
{
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fputs_filtered (",", stream);
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++s;
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if (*s == 'a')
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{
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fputs_filtered ("a", stream);
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++s;
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|
}
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|
fputs_filtered (" ", stream);
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}
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switch (*s)
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{
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case '+':
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found_plus = 1;
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/* note fall-through */
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default:
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fprintf_filtered (stream, "%c", *s);
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break;
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case '#':
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fputs_filtered ("0", stream);
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break;
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#define reg(n) fprintf_filtered (stream, "%%%s", reg_names[n])
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case '1':
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case 'r':
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reg (insn.rs1);
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break;
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case '2':
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reg (insn.rs2);
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break;
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case 'd':
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reg (insn.rd);
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|
break;
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|
#undef reg
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|
#define freg(n) fprintf_filtered (stream, "%%%s", freg_names[n])
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|
|
case 'e':
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|
freg (insn.rs1);
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|
break;
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|
case 'f':
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|
freg (insn.rs2);
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|
break;
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|
case 'g':
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|
freg (insn.rd);
|
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|
break;
|
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|
#undef freg
|
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|
|
#define creg(n) fprintf_filtered (stream, "%%c%u", (unsigned int) (n))
|
|
|
|
case 'b':
|
|
|
|
creg (insn.rs1);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'c':
|
|
|
|
creg (insn.rs2);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'D':
|
|
|
|
creg (insn.rd);
|
|
|
|
break;
|
|
|
|
#undef creg
|
|
|
|
|
|
|
|
case 'h':
|
|
|
|
fprintf_filtered (stream, "%%hi(%#x)",
|
|
|
|
(int) insn.imm22 << 10);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'i':
|
|
|
|
{
|
|
|
|
/* We cannot trust the compiler to sign-extend
|
|
|
|
when extracting the bitfield, hence the shifts. */
|
|
|
|
int imm = ((int) insn.imm13 << 19) >> 19;
|
|
|
|
|
|
|
|
/* Check to see whether we have a 1+i, and take
|
|
|
|
note of that fact.
|
|
|
|
|
1991-12-27 22:11:37 +01:00
|
|
|
FIXME: No longer true/relavant ???
|
1991-03-28 17:28:29 +01:00
|
|
|
Note: because of the way we sort the table,
|
|
|
|
we will be matching 1+i rather than i+1,
|
|
|
|
so it is OK to assume that i is after +,
|
|
|
|
not before it. */
|
|
|
|
if (found_plus)
|
|
|
|
imm_added_to_rs1 = 1;
|
|
|
|
|
|
|
|
if (imm <= 9)
|
|
|
|
fprintf_filtered (stream, "%d", imm);
|
|
|
|
else
|
|
|
|
fprintf_filtered (stream, "%#x", imm);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'L':
|
|
|
|
print_address ((CORE_ADDR) memaddr + insn.disp30 * 4,
|
|
|
|
stream);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'l':
|
|
|
|
if ((insn.code >> 22) == 0)
|
|
|
|
/* Special case for `unimp'. Don't try to turn
|
|
|
|
it's operand into a function offset. */
|
|
|
|
fprintf_filtered (stream, "%#x",
|
|
|
|
(int) (((int) insn.disp22 << 10) >> 10));
|
|
|
|
else
|
|
|
|
/* We cannot trust the compiler to sign-extend
|
|
|
|
when extracting the bitfield, hence the shifts. */
|
|
|
|
print_address ((CORE_ADDR)
|
|
|
|
(memaddr
|
|
|
|
+ (((int) insn.disp22 << 10) >> 10) * 4),
|
|
|
|
stream);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'A':
|
|
|
|
fprintf_filtered (stream, "(%d)", (int) insn.asi);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'C':
|
|
|
|
fputs_filtered ("%csr", stream);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'F':
|
|
|
|
fputs_filtered ("%fsr", stream);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'p':
|
|
|
|
fputs_filtered ("%psr", stream);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'q':
|
|
|
|
fputs_filtered ("%fq", stream);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'Q':
|
|
|
|
fputs_filtered ("%cq", stream);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 't':
|
|
|
|
fputs_filtered ("%tbr", stream);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'w':
|
|
|
|
fputs_filtered ("%wim", stream);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 'y':
|
|
|
|
fputs_filtered ("%y", stream);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If we are adding or or'ing something to rs1, then
|
|
|
|
check to see whether the previous instruction was
|
|
|
|
a sethi to the same register as in the sethi.
|
|
|
|
If so, attempt to print the result of the add or
|
|
|
|
or (in this context add and or do the same thing)
|
|
|
|
and its symbolic value. */
|
|
|
|
if (imm_added_to_rs1)
|
|
|
|
{
|
|
|
|
union sparc_insn prev_insn;
|
|
|
|
int errcode;
|
|
|
|
|
|
|
|
errcode = target_read_memory (memaddr - 4,
|
|
|
|
(char *)&prev_insn, sizeof (prev_insn));
|
|
|
|
|
|
|
|
if (errcode == 0)
|
|
|
|
{
|
|
|
|
/* If it is a delayed branch, we need to look at the
|
|
|
|
instruction before the delayed branch. This handles
|
|
|
|
sequences such as
|
|
|
|
|
|
|
|
sethi %o1, %hi(_foo), %o1
|
|
|
|
call _printf
|
|
|
|
or %o1, %lo(_foo), %o1
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (is_delayed_branch (prev_insn))
|
|
|
|
errcode = target_read_memory
|
|
|
|
(memaddr - 8, (char *)&prev_insn, sizeof (prev_insn));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If there was a problem reading memory, then assume
|
|
|
|
the previous instruction was not sethi. */
|
|
|
|
if (errcode == 0)
|
|
|
|
{
|
|
|
|
/* Is it sethi to the same register? */
|
|
|
|
if ((prev_insn.code & 0xc1c00000) == 0x01000000
|
|
|
|
&& prev_insn.rd == insn.rs1)
|
|
|
|
{
|
|
|
|
fprintf_filtered (stream, "\t! ");
|
|
|
|
/* We cannot trust the compiler to sign-extend
|
|
|
|
when extracting the bitfield, hence the shifts. */
|
|
|
|
print_address (((int) prev_insn.imm22 << 10)
|
|
|
|
| (insn.imm13 << 19) >> 19, stream);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return sizeof (insn);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
printf_filtered ("%#8x", insn.code);
|
|
|
|
return sizeof (insn);
|
|
|
|
}
|