2013-05-07 03:09:29 +02:00
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/* Target-machine dependent code for Nios II, for GDB.
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2018-01-01 05:43:02 +01:00
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Copyright (C) 2012-2018 Free Software Foundation, Inc.
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2013-05-07 03:09:29 +02:00
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Contributed by Peter Brookes (pbrookes@altera.com)
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and Andrew Draper (adraper@altera.com).
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Contributed by Mentor Graphics, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "frame.h"
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#include "frame-unwind.h"
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#include "frame-base.h"
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#include "trad-frame.h"
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#include "dwarf2-frame.h"
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#include "symtab.h"
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#include "inferior.h"
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#include "gdbtypes.h"
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#include "gdbcore.h"
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#include "gdbcmd.h"
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#include "osabi.h"
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#include "target.h"
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#include "dis-asm.h"
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#include "regcache.h"
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#include "value.h"
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#include "symfile.h"
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#include "arch-utils.h"
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#include "infcall.h"
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#include "regset.h"
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#include "target-descriptions.h"
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/* To get entry_point_address. */
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#include "objfiles.h"
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gdb: Use std::min and std::max throughout
Otherwise including <string> or some other C++ header is broken.
E.g.:
In file included from /opt/gcc/include/c++/7.0.0/bits/char_traits.h:39:0,
from /opt/gcc/include/c++/7.0.0/string:40,
from /home/pedro/gdb/mygit/cxx-convertion/src/gdb/infrun.c:68:
/opt/gcc/include/c++/7.0.0/bits/stl_algobase.h:243:56: error: macro "min" passed 3 arguments, but takes just 2
min(const _Tp& __a, const _Tp& __b, _Compare __comp)
^
/opt/gcc/include/c++/7.0.0/bits/stl_algobase.h:265:56: error: macro "max" passed 3 arguments, but takes just 2
max(const _Tp& __a, const _Tp& __b, _Compare __comp)
^
In file included from .../src/gdb/infrun.c:21:0:
To the best of my grepping abilities, I believe I adjusted all min/max
calls.
gdb/ChangeLog:
2016-09-16 Pedro Alves <palves@redhat.com>
* defs.h (min, max): Delete.
* aarch64-tdep.c: Include <algorithm> and use std::min and
std::max throughout.
* aarch64-tdep.c: Likewise.
* alpha-tdep.c: Likewise.
* amd64-tdep.c: Likewise.
* amd64-windows-tdep.c: Likewise.
* arm-tdep.c: Likewise.
* avr-tdep.c: Likewise.
* breakpoint.c: Likewise.
* btrace.c: Likewise.
* ctf.c: Likewise.
* disasm.c: Likewise.
* doublest.c: Likewise.
* dwarf2loc.c: Likewise.
* dwarf2read.c: Likewise.
* environ.c: Likewise.
* exec.c: Likewise.
* f-exp.y: Likewise.
* findcmd.c: Likewise.
* ft32-tdep.c: Likewise.
* gcore.c: Likewise.
* hppa-tdep.c: Likewise.
* i386-darwin-tdep.c: Likewise.
* i386-tdep.c: Likewise.
* linux-thread-db.c: Likewise.
* lm32-tdep.c: Likewise.
* m32r-tdep.c: Likewise.
* m88k-tdep.c: Likewise.
* memrange.c: Likewise.
* minidebug.c: Likewise.
* mips-tdep.c: Likewise.
* moxie-tdep.c: Likewise.
* nds32-tdep.c: Likewise.
* nios2-tdep.c: Likewise.
* nto-procfs.c: Likewise.
* parse.c: Likewise.
* ppc-sysv-tdep.c: Likewise.
* probe.c: Likewise.
* record-btrace.c: Likewise.
* remote.c: Likewise.
* rs6000-tdep.c: Likewise.
* rx-tdep.c: Likewise.
* s390-linux-nat.c: Likewise.
* s390-linux-tdep.c: Likewise.
* ser-tcp.c: Likewise.
* sh-tdep.c: Likewise.
* sh64-tdep.c: Likewise.
* source.c: Likewise.
* sparc-tdep.c: Likewise.
* symfile.c: Likewise.
* target-memory.c: Likewise.
* target.c: Likewise.
* tic6x-tdep.c: Likewise.
* tilegx-tdep.c: Likewise.
* tracefile-tfile.c: Likewise.
* tracepoint.c: Likewise.
* valprint.c: Likewise.
* value.c: Likewise.
* xtensa-tdep.c: Likewise.
* cli/cli-cmds.c: Likewise.
* compile/compile-object-load.c: Likewise.
2016-09-16 20:55:17 +02:00
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#include <algorithm>
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2013-05-07 03:09:29 +02:00
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/* Nios II specific header. */
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#include "nios2-tdep.h"
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#include "features/nios2.c"
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/* Control debugging information emitted in this file. */
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static int nios2_debug = 0;
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/* The following structures are used in the cache for prologue
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analysis; see the reg_value and reg_saved tables in
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struct nios2_unwind_cache, respectively. */
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/* struct reg_value is used to record that a register has the same value
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as reg at the given offset from the start of a function. */
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struct reg_value
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{
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int reg;
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unsigned int offset;
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};
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/* struct reg_saved is used to record that a register value has been saved at
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basereg + addr, for basereg >= 0. If basereg < 0, that indicates
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that the register is not known to have been saved. Note that when
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basereg == NIOS2_Z_REGNUM (that is, r0, which holds value 0),
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addr is an absolute address. */
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struct reg_saved
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{
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int basereg;
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CORE_ADDR addr;
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};
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struct nios2_unwind_cache
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{
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/* The frame's base, optionally used by the high-level debug info. */
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CORE_ADDR base;
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/* The previous frame's inner most stack address. Used as this
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frame ID's stack_addr. */
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CORE_ADDR cfa;
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/* The address of the first instruction in this function. */
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CORE_ADDR pc;
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/* Which register holds the return address for the frame. */
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int return_regnum;
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/* Table indicating what changes have been made to each register. */
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struct reg_value reg_value[NIOS2_NUM_REGS];
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/* Table indicating where each register has been saved. */
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struct reg_saved reg_saved[NIOS2_NUM_REGS];
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};
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/* This array is a mapping from Dwarf-2 register numbering to GDB's. */
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static int nios2_dwarf2gdb_regno_map[] =
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{
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0, 1, 2, 3,
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4, 5, 6, 7,
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8, 9, 10, 11,
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12, 13, 14, 15,
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16, 17, 18, 19,
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20, 21, 22, 23,
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24, 25,
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NIOS2_GP_REGNUM, /* 26 */
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NIOS2_SP_REGNUM, /* 27 */
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NIOS2_FP_REGNUM, /* 28 */
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NIOS2_EA_REGNUM, /* 29 */
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NIOS2_BA_REGNUM, /* 30 */
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NIOS2_RA_REGNUM, /* 31 */
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NIOS2_PC_REGNUM, /* 32 */
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NIOS2_STATUS_REGNUM, /* 33 */
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NIOS2_ESTATUS_REGNUM, /* 34 */
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NIOS2_BSTATUS_REGNUM, /* 35 */
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NIOS2_IENABLE_REGNUM, /* 36 */
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NIOS2_IPENDING_REGNUM, /* 37 */
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NIOS2_CPUID_REGNUM, /* 38 */
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39, /* CTL6 */ /* 39 */
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NIOS2_EXCEPTION_REGNUM, /* 40 */
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NIOS2_PTEADDR_REGNUM, /* 41 */
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NIOS2_TLBACC_REGNUM, /* 42 */
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NIOS2_TLBMISC_REGNUM, /* 43 */
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NIOS2_ECCINJ_REGNUM, /* 44 */
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NIOS2_BADADDR_REGNUM, /* 45 */
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NIOS2_CONFIG_REGNUM, /* 46 */
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NIOS2_MPUBASE_REGNUM, /* 47 */
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NIOS2_MPUACC_REGNUM /* 48 */
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};
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2015-10-27 00:05:21 +01:00
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gdb_static_assert (ARRAY_SIZE (nios2_dwarf2gdb_regno_map) == NIOS2_NUM_REGS);
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2013-05-07 03:09:29 +02:00
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/* Implement the dwarf2_reg_to_regnum gdbarch method. */
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static int
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nios2_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
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{
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2015-10-27 00:05:21 +01:00
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if (dw_reg < 0 || dw_reg >= NIOS2_NUM_REGS)
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return -1;
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2013-05-07 03:09:29 +02:00
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return nios2_dwarf2gdb_regno_map[dw_reg];
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}
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/* Canonical names for the 49 registers. */
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static const char *const nios2_reg_names[NIOS2_NUM_REGS] =
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{
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"zero", "at", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
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2013-10-14 03:02:39 +02:00
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"et", "bt", "gp", "sp", "fp", "ea", "sstatus", "ra",
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2013-05-07 03:09:29 +02:00
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"pc",
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"status", "estatus", "bstatus", "ienable",
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"ipending", "cpuid", "ctl6", "exception",
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"pteaddr", "tlbacc", "tlbmisc", "eccinj",
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"badaddr", "config", "mpubase", "mpuacc"
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};
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/* Implement the register_name gdbarch method. */
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static const char *
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nios2_register_name (struct gdbarch *gdbarch, int regno)
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{
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/* Use mnemonic aliases for GPRs. */
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if (regno >= 0 && regno < NIOS2_NUM_REGS)
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return nios2_reg_names[regno];
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else
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return tdesc_register_name (gdbarch, regno);
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}
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/* Implement the register_type gdbarch method. */
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static struct type *
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nios2_register_type (struct gdbarch *gdbarch, int regno)
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{
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/* If the XML description has register information, use that to
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determine the register type. */
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if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
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return tdesc_register_type (gdbarch, regno);
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if (regno == NIOS2_PC_REGNUM)
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return builtin_type (gdbarch)->builtin_func_ptr;
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else if (regno == NIOS2_SP_REGNUM)
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return builtin_type (gdbarch)->builtin_data_ptr;
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else
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return builtin_type (gdbarch)->builtin_uint32;
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}
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/* Given a return value in REGCACHE with a type VALTYPE,
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extract and copy its value into VALBUF. */
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static void
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nios2_extract_return_value (struct gdbarch *gdbarch, struct type *valtype,
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struct regcache *regcache, gdb_byte *valbuf)
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{
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int len = TYPE_LENGTH (valtype);
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/* Return values of up to 8 bytes are returned in $r2 $r3. */
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if (len <= register_size (gdbarch, NIOS2_R2_REGNUM))
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2018-05-30 20:54:38 +02:00
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regcache->cooked_read (NIOS2_R2_REGNUM, valbuf);
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2013-05-07 03:09:29 +02:00
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else
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{
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gdb_assert (len <= (register_size (gdbarch, NIOS2_R2_REGNUM)
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+ register_size (gdbarch, NIOS2_R3_REGNUM)));
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2018-05-30 20:54:38 +02:00
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regcache->cooked_read (NIOS2_R2_REGNUM, valbuf);
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regcache->cooked_read (NIOS2_R3_REGNUM, valbuf + 4);
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2013-05-07 03:09:29 +02:00
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}
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}
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/* Write into appropriate registers a function return value
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of type TYPE, given in virtual format. */
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static void
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nios2_store_return_value (struct gdbarch *gdbarch, struct type *valtype,
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struct regcache *regcache, const gdb_byte *valbuf)
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{
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int len = TYPE_LENGTH (valtype);
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/* Return values of up to 8 bytes are returned in $r2 $r3. */
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if (len <= register_size (gdbarch, NIOS2_R2_REGNUM))
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2018-05-30 20:54:42 +02:00
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regcache->cooked_write (NIOS2_R2_REGNUM, valbuf);
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2013-05-07 03:09:29 +02:00
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else
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{
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gdb_assert (len <= (register_size (gdbarch, NIOS2_R2_REGNUM)
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+ register_size (gdbarch, NIOS2_R3_REGNUM)));
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2018-05-30 20:54:42 +02:00
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regcache->cooked_write (NIOS2_R2_REGNUM, valbuf);
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regcache->cooked_write (NIOS2_R3_REGNUM, valbuf + 4);
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2013-05-07 03:09:29 +02:00
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}
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}
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/* Set up the default values of the registers. */
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static void
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nios2_setup_default (struct nios2_unwind_cache *cache)
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{
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int i;
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for (i = 0; i < NIOS2_NUM_REGS; i++)
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{
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/* All registers start off holding their previous values. */
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cache->reg_value[i].reg = i;
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cache->reg_value[i].offset = 0;
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/* All registers start off not saved. */
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cache->reg_saved[i].basereg = -1;
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cache->reg_saved[i].addr = 0;
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}
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}
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/* Initialize the unwind cache. */
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static void
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nios2_init_cache (struct nios2_unwind_cache *cache, CORE_ADDR pc)
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{
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cache->base = 0;
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cache->cfa = 0;
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cache->pc = pc;
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cache->return_regnum = NIOS2_RA_REGNUM;
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nios2_setup_default (cache);
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}
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2014-11-26 03:34:51 +01:00
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/* Read and identify an instruction at PC. If INSNP is non-null,
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store the instruction word into that location. Return the opcode
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pointer or NULL if the memory couldn't be read or disassembled. */
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static const struct nios2_opcode *
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nios2_fetch_insn (struct gdbarch *gdbarch, CORE_ADDR pc,
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unsigned int *insnp)
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{
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LONGEST memword;
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unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
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unsigned int insn;
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2015-08-03 20:39:52 +02:00
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if (mach == bfd_mach_nios2r2)
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{
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if (!safe_read_memory_integer (pc, NIOS2_OPCODE_SIZE,
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BFD_ENDIAN_LITTLE, &memword)
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&& !safe_read_memory_integer (pc, NIOS2_CDX_OPCODE_SIZE,
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BFD_ENDIAN_LITTLE, &memword))
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return NULL;
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}
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else if (!safe_read_memory_integer (pc, NIOS2_OPCODE_SIZE,
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gdbarch_byte_order (gdbarch), &memword))
|
2014-11-26 03:34:51 +01:00
|
|
|
return NULL;
|
|
|
|
|
|
|
|
insn = (unsigned int) memword;
|
|
|
|
if (insnp)
|
|
|
|
*insnp = insn;
|
|
|
|
return nios2_find_opcode_hash (insn, mach);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Match and disassemble an ADD-type instruction, with 3 register operands.
|
|
|
|
Returns true on success, and fills in the operand pointers. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_add (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, int *ra, int *rb, int *rc)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && (op->match == MATCH_R1_ADD || op->match == MATCH_R1_MOV))
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*ra = GET_IW_R_A (insn);
|
|
|
|
*rb = GET_IW_R_B (insn);
|
|
|
|
*rc = GET_IW_R_C (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_ADD || op->match == MATCH_R2_MOV)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F3X6L5_A (insn);
|
|
|
|
*rb = GET_IW_F3X6L5_B (insn);
|
|
|
|
*rc = GET_IW_F3X6L5_C (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_ADD_N)
|
|
|
|
{
|
|
|
|
*ra = nios2_r2_reg3_mappings[GET_IW_T3X1_A3 (insn)];
|
|
|
|
*rb = nios2_r2_reg3_mappings[GET_IW_T3X1_B3 (insn)];
|
|
|
|
*rc = nios2_r2_reg3_mappings[GET_IW_T3X1_C3 (insn)];
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_MOV_N)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F2_A (insn);
|
|
|
|
*rb = 0;
|
|
|
|
*rc = GET_IW_F2_B (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble a SUB-type instruction, with 3 register operands.
|
|
|
|
Returns true on success, and fills in the operand pointers. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_sub (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, int *ra, int *rb, int *rc)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && op->match == MATCH_R1_SUB)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*ra = GET_IW_R_A (insn);
|
|
|
|
*rb = GET_IW_R_B (insn);
|
|
|
|
*rc = GET_IW_R_C (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_SUB)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F3X6L5_A (insn);
|
|
|
|
*rb = GET_IW_F3X6L5_B (insn);
|
|
|
|
*rc = GET_IW_F3X6L5_C (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_SUB_N)
|
|
|
|
{
|
|
|
|
*ra = nios2_r2_reg3_mappings[GET_IW_T3X1_A3 (insn)];
|
|
|
|
*rb = nios2_r2_reg3_mappings[GET_IW_T3X1_B3 (insn)];
|
|
|
|
*rc = nios2_r2_reg3_mappings[GET_IW_T3X1_C3 (insn)];
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble an ADDI-type instruction, with 2 register operands
|
|
|
|
and one immediate operand.
|
|
|
|
Returns true on success, and fills in the operand pointers. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_addi (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, int *ra, int *rb, int *imm)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && op->match == MATCH_R1_ADDI)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*ra = GET_IW_I_A (insn);
|
|
|
|
*rb = GET_IW_I_B (insn);
|
|
|
|
*imm = (signed) (GET_IW_I_IMM16 (insn) << 16) >> 16;
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_ADDI)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F2I16_A (insn);
|
|
|
|
*rb = GET_IW_F2I16_B (insn);
|
|
|
|
*imm = (signed) (GET_IW_F2I16_IMM16 (insn) << 16) >> 16;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_ADDI_N || op->match == MATCH_R2_SUBI_N)
|
|
|
|
{
|
|
|
|
*ra = nios2_r2_reg3_mappings[GET_IW_T2X1I3_A3 (insn)];
|
|
|
|
*rb = nios2_r2_reg3_mappings[GET_IW_T2X1I3_B3 (insn)];
|
|
|
|
*imm = nios2_r2_asi_n_mappings[GET_IW_T2X1I3_IMM3 (insn)];
|
|
|
|
if (op->match == MATCH_R2_SUBI_N)
|
|
|
|
*imm = - (*imm);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_SPADDI_N)
|
|
|
|
{
|
|
|
|
*ra = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (insn)];
|
|
|
|
*rb = NIOS2_SP_REGNUM;
|
|
|
|
*imm = GET_IW_T1I7_IMM7 (insn) << 2;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_SPINCI_N || op->match == MATCH_R2_SPDECI_N)
|
|
|
|
{
|
|
|
|
*ra = NIOS2_SP_REGNUM;
|
|
|
|
*rb = NIOS2_SP_REGNUM;
|
|
|
|
*imm = GET_IW_X1I7_IMM7 (insn) << 2;
|
|
|
|
if (op->match == MATCH_R2_SPDECI_N)
|
|
|
|
*imm = - (*imm);
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble an ORHI-type instruction, with 2 register operands
|
|
|
|
and one unsigned immediate operand.
|
|
|
|
Returns true on success, and fills in the operand pointers. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_orhi (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, int *ra, int *rb, unsigned int *uimm)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && op->match == MATCH_R1_ORHI)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*ra = GET_IW_I_A (insn);
|
|
|
|
*rb = GET_IW_I_B (insn);
|
|
|
|
*uimm = GET_IW_I_IMM16 (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_ORHI)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F2I16_A (insn);
|
|
|
|
*rb = GET_IW_F2I16_B (insn);
|
|
|
|
*uimm = GET_IW_F2I16_IMM16 (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble a STW-type instruction, with 2 register operands
|
|
|
|
and one immediate operand.
|
|
|
|
Returns true on success, and fills in the operand pointers. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_stw (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, int *ra, int *rb, int *imm)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && (op->match == MATCH_R1_STW || op->match == MATCH_R1_STWIO))
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*ra = GET_IW_I_A (insn);
|
|
|
|
*rb = GET_IW_I_B (insn);
|
|
|
|
*imm = (signed) (GET_IW_I_IMM16 (insn) << 16) >> 16;
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_STW)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F2I16_A (insn);
|
|
|
|
*rb = GET_IW_F2I16_B (insn);
|
|
|
|
*imm = (signed) (GET_IW_F2I16_IMM16 (insn) << 16) >> 16;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_STWIO)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F2X4I12_A (insn);
|
|
|
|
*rb = GET_IW_F2X4I12_B (insn);
|
|
|
|
*imm = (signed) (GET_IW_F2X4I12_IMM12 (insn) << 20) >> 20;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_STW_N)
|
|
|
|
{
|
|
|
|
*ra = nios2_r2_reg3_mappings[GET_IW_T2I4_A3 (insn)];
|
|
|
|
*rb = nios2_r2_reg3_mappings[GET_IW_T2I4_B3 (insn)];
|
|
|
|
*imm = GET_IW_T2I4_IMM4 (insn) << 2;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_STWSP_N)
|
|
|
|
{
|
|
|
|
*ra = NIOS2_SP_REGNUM;
|
|
|
|
*rb = GET_IW_F1I5_B (insn);
|
|
|
|
*imm = GET_IW_F1I5_IMM5 (insn) << 2;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_STWZ_N)
|
|
|
|
{
|
|
|
|
*ra = nios2_r2_reg3_mappings[GET_IW_T1X1I6_A3 (insn)];
|
|
|
|
*rb = 0;
|
|
|
|
*imm = GET_IW_T1X1I6_IMM6 (insn) << 2;
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble a LDW-type instruction, with 2 register operands
|
|
|
|
and one immediate operand.
|
|
|
|
Returns true on success, and fills in the operand pointers. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_ldw (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, int *ra, int *rb, int *imm)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && (op->match == MATCH_R1_LDW || op->match == MATCH_R1_LDWIO))
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*ra = GET_IW_I_A (insn);
|
|
|
|
*rb = GET_IW_I_B (insn);
|
|
|
|
*imm = (signed) (GET_IW_I_IMM16 (insn) << 16) >> 16;
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_LDW)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F2I16_A (insn);
|
|
|
|
*rb = GET_IW_F2I16_B (insn);
|
|
|
|
*imm = (signed) (GET_IW_F2I16_IMM16 (insn) << 16) >> 16;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_LDWIO)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F2X4I12_A (insn);
|
|
|
|
*rb = GET_IW_F2X4I12_B (insn);
|
|
|
|
*imm = (signed) (GET_IW_F2X4I12_IMM12 (insn) << 20) >> 20;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_LDW_N)
|
|
|
|
{
|
|
|
|
*ra = nios2_r2_reg3_mappings[GET_IW_T2I4_A3 (insn)];
|
|
|
|
*rb = nios2_r2_reg3_mappings[GET_IW_T2I4_B3 (insn)];
|
|
|
|
*imm = GET_IW_T2I4_IMM4 (insn) << 2;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_LDWSP_N)
|
|
|
|
{
|
|
|
|
*ra = NIOS2_SP_REGNUM;
|
|
|
|
*rb = GET_IW_F1I5_B (insn);
|
|
|
|
*imm = GET_IW_F1I5_IMM5 (insn) << 2;
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble a RDCTL instruction, with 2 register operands.
|
|
|
|
Returns true on success, and fills in the operand pointers. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_rdctl (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, int *ra, int *rc)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && (op->match == MATCH_R1_RDCTL))
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*ra = GET_IW_R_IMM5 (insn);
|
|
|
|
*rc = GET_IW_R_C (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_RDCTL)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F3X6L5_IMM5 (insn);
|
|
|
|
*rc = GET_IW_F3X6L5_C (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-08-03 20:39:52 +02:00
|
|
|
/* Match and disassemble a PUSH.N or STWM instruction.
|
|
|
|
Returns true on success, and fills in the operand pointers. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_stwm (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, unsigned int *reglist,
|
|
|
|
int *ra, int *imm, int *wb, int *id)
|
|
|
|
{
|
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_PUSH_N)
|
|
|
|
{
|
|
|
|
*reglist = 1 << 31;
|
|
|
|
if (GET_IW_L5I4X1_FP (insn))
|
|
|
|
*reglist |= (1 << 28);
|
|
|
|
if (GET_IW_L5I4X1_CS (insn))
|
|
|
|
{
|
|
|
|
int val = GET_IW_L5I4X1_REGRANGE (insn);
|
|
|
|
*reglist |= nios2_r2_reg_range_mappings[val];
|
|
|
|
}
|
|
|
|
*ra = NIOS2_SP_REGNUM;
|
|
|
|
*imm = GET_IW_L5I4X1_IMM4 (insn) << 2;
|
|
|
|
*wb = 1;
|
|
|
|
*id = 0;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_STWM)
|
|
|
|
{
|
|
|
|
unsigned int rawmask = GET_IW_F1X4L17_REGMASK (insn);
|
|
|
|
if (GET_IW_F1X4L17_RS (insn))
|
|
|
|
{
|
|
|
|
*reglist = ((rawmask << 14) & 0x00ffc000);
|
|
|
|
if (rawmask & (1 << 10))
|
|
|
|
*reglist |= (1 << 28);
|
|
|
|
if (rawmask & (1 << 11))
|
|
|
|
*reglist |= (1 << 31);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
*reglist = rawmask << 2;
|
|
|
|
*ra = GET_IW_F1X4L17_A (insn);
|
|
|
|
*imm = 0;
|
|
|
|
*wb = GET_IW_F1X4L17_WB (insn);
|
|
|
|
*id = GET_IW_F1X4L17_ID (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble a POP.N or LDWM instruction.
|
|
|
|
Returns true on success, and fills in the operand pointers. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_ldwm (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, unsigned int *reglist,
|
|
|
|
int *ra, int *imm, int *wb, int *id, int *ret)
|
|
|
|
{
|
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_POP_N)
|
|
|
|
{
|
|
|
|
*reglist = 1 << 31;
|
|
|
|
if (GET_IW_L5I4X1_FP (insn))
|
|
|
|
*reglist |= (1 << 28);
|
|
|
|
if (GET_IW_L5I4X1_CS (insn))
|
|
|
|
{
|
|
|
|
int val = GET_IW_L5I4X1_REGRANGE (insn);
|
|
|
|
*reglist |= nios2_r2_reg_range_mappings[val];
|
|
|
|
}
|
|
|
|
*ra = NIOS2_SP_REGNUM;
|
|
|
|
*imm = GET_IW_L5I4X1_IMM4 (insn) << 2;
|
|
|
|
*wb = 1;
|
|
|
|
*id = 1;
|
|
|
|
*ret = 1;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_LDWM)
|
|
|
|
{
|
|
|
|
unsigned int rawmask = GET_IW_F1X4L17_REGMASK (insn);
|
|
|
|
if (GET_IW_F1X4L17_RS (insn))
|
|
|
|
{
|
|
|
|
*reglist = ((rawmask << 14) & 0x00ffc000);
|
|
|
|
if (rawmask & (1 << 10))
|
|
|
|
*reglist |= (1 << 28);
|
|
|
|
if (rawmask & (1 << 11))
|
|
|
|
*reglist |= (1 << 31);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
*reglist = rawmask << 2;
|
|
|
|
*ra = GET_IW_F1X4L17_A (insn);
|
|
|
|
*imm = 0;
|
|
|
|
*wb = GET_IW_F1X4L17_WB (insn);
|
|
|
|
*id = GET_IW_F1X4L17_ID (insn);
|
|
|
|
*ret = GET_IW_F1X4L17_PC (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
|
|
|
|
/* Match and disassemble a branch instruction, with (potentially)
|
|
|
|
2 register operands and one immediate operand.
|
|
|
|
Returns true on success, and fills in the operand pointers. */
|
|
|
|
|
|
|
|
enum branch_condition {
|
|
|
|
branch_none,
|
|
|
|
branch_eq,
|
|
|
|
branch_ne,
|
|
|
|
branch_ge,
|
|
|
|
branch_geu,
|
|
|
|
branch_lt,
|
|
|
|
branch_ltu
|
|
|
|
};
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_branch (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, int *ra, int *rb, int *imm,
|
|
|
|
enum branch_condition *cond)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
switch (op->match)
|
|
|
|
{
|
|
|
|
case MATCH_R1_BR:
|
|
|
|
*cond = branch_none;
|
|
|
|
break;
|
|
|
|
case MATCH_R1_BEQ:
|
|
|
|
*cond = branch_eq;
|
|
|
|
break;
|
|
|
|
case MATCH_R1_BNE:
|
|
|
|
*cond = branch_ne;
|
|
|
|
break;
|
|
|
|
case MATCH_R1_BGE:
|
|
|
|
*cond = branch_ge;
|
|
|
|
break;
|
|
|
|
case MATCH_R1_BGEU:
|
|
|
|
*cond = branch_geu;
|
|
|
|
break;
|
|
|
|
case MATCH_R1_BLT:
|
|
|
|
*cond = branch_lt;
|
|
|
|
break;
|
|
|
|
case MATCH_R1_BLTU:
|
|
|
|
*cond = branch_ltu;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
*imm = (signed) (GET_IW_I_IMM16 (insn) << 16) >> 16;
|
|
|
|
*ra = GET_IW_I_A (insn);
|
|
|
|
*rb = GET_IW_I_B (insn);
|
|
|
|
return 1;
|
2014-11-26 03:34:51 +01:00
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else
|
|
|
|
{
|
|
|
|
switch (op->match)
|
|
|
|
{
|
|
|
|
case MATCH_R2_BR_N:
|
|
|
|
*cond = branch_none;
|
|
|
|
*ra = NIOS2_Z_REGNUM;
|
|
|
|
*rb = NIOS2_Z_REGNUM;
|
|
|
|
*imm = (signed) ((GET_IW_I10_IMM10 (insn) << 1) << 21) >> 21;
|
|
|
|
return 1;
|
|
|
|
case MATCH_R2_BEQZ_N:
|
|
|
|
*cond = branch_eq;
|
|
|
|
*ra = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (insn)];
|
|
|
|
*rb = NIOS2_Z_REGNUM;
|
|
|
|
*imm = (signed) ((GET_IW_T1I7_IMM7 (insn) << 1) << 24) >> 24;
|
|
|
|
return 1;
|
|
|
|
case MATCH_R2_BNEZ_N:
|
|
|
|
*cond = branch_ne;
|
|
|
|
*ra = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (insn)];
|
|
|
|
*rb = NIOS2_Z_REGNUM;
|
|
|
|
*imm = (signed) ((GET_IW_T1I7_IMM7 (insn) << 1) << 24) >> 24;
|
|
|
|
return 1;
|
|
|
|
case MATCH_R2_BR:
|
|
|
|
*cond = branch_none;
|
|
|
|
break;
|
|
|
|
case MATCH_R2_BEQ:
|
|
|
|
*cond = branch_eq;
|
|
|
|
break;
|
|
|
|
case MATCH_R2_BNE:
|
|
|
|
*cond = branch_ne;
|
|
|
|
break;
|
|
|
|
case MATCH_R2_BGE:
|
|
|
|
*cond = branch_ge;
|
|
|
|
break;
|
|
|
|
case MATCH_R2_BGEU:
|
|
|
|
*cond = branch_geu;
|
|
|
|
break;
|
|
|
|
case MATCH_R2_BLT:
|
|
|
|
*cond = branch_lt;
|
|
|
|
break;
|
|
|
|
case MATCH_R2_BLTU:
|
|
|
|
*cond = branch_ltu;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
*ra = GET_IW_F2I16_A (insn);
|
|
|
|
*rb = GET_IW_F2I16_B (insn);
|
|
|
|
*imm = (signed) (GET_IW_F2I16_IMM16 (insn) << 16) >> 16;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
return 0;
|
2014-11-26 03:34:51 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble a direct jump instruction, with an
|
|
|
|
unsigned operand. Returns true on success, and fills in the operand
|
|
|
|
pointer. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_jmpi (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, unsigned int *uimm)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && op->match == MATCH_R1_JMPI)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*uimm = GET_IW_J_IMM26 (insn) << 2;
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_JMPI)
|
|
|
|
{
|
|
|
|
*uimm = GET_IW_L26_IMM26 (insn) << 2;
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble a direct call instruction, with an
|
|
|
|
unsigned operand. Returns true on success, and fills in the operand
|
|
|
|
pointer. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_calli (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, unsigned int *uimm)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && op->match == MATCH_R1_CALL)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*uimm = GET_IW_J_IMM26 (insn) << 2;
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_CALL)
|
|
|
|
{
|
|
|
|
*uimm = GET_IW_L26_IMM26 (insn) << 2;
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble an indirect jump instruction, with a
|
|
|
|
(possibly implicit) register operand. Returns true on success, and fills
|
|
|
|
in the operand pointer. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_jmpr (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, int *ra)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2)
|
|
|
|
switch (op->match)
|
|
|
|
{
|
|
|
|
case MATCH_R1_JMP:
|
|
|
|
*ra = GET_IW_I_A (insn);
|
|
|
|
return 1;
|
|
|
|
case MATCH_R1_RET:
|
|
|
|
*ra = NIOS2_RA_REGNUM;
|
|
|
|
return 1;
|
|
|
|
case MATCH_R1_ERET:
|
|
|
|
*ra = NIOS2_EA_REGNUM;
|
|
|
|
return 1;
|
|
|
|
case MATCH_R1_BRET:
|
|
|
|
*ra = NIOS2_BA_REGNUM;
|
|
|
|
return 1;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
switch (op->match)
|
|
|
|
{
|
|
|
|
case MATCH_R2_JMP:
|
|
|
|
*ra = GET_IW_F2I16_A (insn);
|
|
|
|
return 1;
|
|
|
|
case MATCH_R2_JMPR_N:
|
|
|
|
*ra = GET_IW_F1X1_A (insn);
|
|
|
|
return 1;
|
|
|
|
case MATCH_R2_RET:
|
|
|
|
case MATCH_R2_RET_N:
|
|
|
|
*ra = NIOS2_RA_REGNUM;
|
|
|
|
return 1;
|
|
|
|
case MATCH_R2_ERET:
|
|
|
|
*ra = NIOS2_EA_REGNUM;
|
|
|
|
return 1;
|
|
|
|
case MATCH_R2_BRET:
|
|
|
|
*ra = NIOS2_BA_REGNUM;
|
|
|
|
return 1;
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
return 0;
|
2014-11-26 03:34:51 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble an indirect call instruction, with a register
|
|
|
|
operand. Returns true on success, and fills in the operand pointer. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_callr (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, int *ra)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && op->match == MATCH_R1_CALLR)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*ra = GET_IW_I_A (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_CALLR)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F2I16_A (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_CALLR_N)
|
|
|
|
{
|
|
|
|
*ra = GET_IW_F1X1_A (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble a break instruction, with an unsigned operand.
|
|
|
|
Returns true on success, and fills in the operand pointer. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_break (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, unsigned int *uimm)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && op->match == MATCH_R1_BREAK)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*uimm = GET_IW_R_IMM5 (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_BREAK)
|
|
|
|
{
|
|
|
|
*uimm = GET_IW_F3X6L5_IMM5 (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_BREAK_N)
|
|
|
|
{
|
|
|
|
*uimm = GET_IW_X2L5_IMM5 (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Match and disassemble a trap instruction, with an unsigned operand.
|
|
|
|
Returns true on success, and fills in the operand pointer. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_match_trap (uint32_t insn, const struct nios2_opcode *op,
|
|
|
|
unsigned long mach, unsigned int *uimm)
|
|
|
|
{
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
|
|
|
|
|
|
|
if (!is_r2 && op->match == MATCH_R1_TRAP)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
*uimm = GET_IW_R_IMM5 (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (!is_r2)
|
|
|
|
return 0;
|
|
|
|
else if (op->match == MATCH_R2_TRAP)
|
|
|
|
{
|
|
|
|
*uimm = GET_IW_F3X6L5_IMM5 (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
else if (op->match == MATCH_R2_TRAP_N)
|
|
|
|
{
|
|
|
|
*uimm = GET_IW_X2L5_IMM5 (insn);
|
|
|
|
return 1;
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-05-07 03:09:29 +02:00
|
|
|
/* Helper function to identify when we're in a function epilogue;
|
|
|
|
that is, the part of the function from the point at which the
|
2014-11-26 03:34:51 +01:00
|
|
|
stack adjustments are made, to the return or sibcall.
|
|
|
|
Note that we may have several stack adjustment instructions, and
|
|
|
|
this function needs to test whether the stack teardown has already
|
|
|
|
started before current_pc, not whether it has completed. */
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_in_epilogue_p (struct gdbarch *gdbarch,
|
|
|
|
CORE_ADDR current_pc,
|
|
|
|
CORE_ADDR start_pc)
|
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
|
2015-08-03 20:39:52 +02:00
|
|
|
int is_r2 = (mach == bfd_mach_nios2r2);
|
2014-11-26 03:37:41 +01:00
|
|
|
/* Maximum number of possibly-epilogue instructions to check.
|
|
|
|
Note that this number should not be too large, else we can
|
|
|
|
potentially end up iterating through unmapped memory. */
|
|
|
|
int ninsns, max_insns = 5;
|
2014-11-26 03:34:51 +01:00
|
|
|
unsigned int insn;
|
|
|
|
const struct nios2_opcode *op = NULL;
|
|
|
|
unsigned int uimm;
|
|
|
|
int imm;
|
2015-08-03 20:39:52 +02:00
|
|
|
int wb, id, ret;
|
2014-11-26 03:34:51 +01:00
|
|
|
int ra, rb, rc;
|
|
|
|
enum branch_condition cond;
|
2014-11-26 03:37:41 +01:00
|
|
|
CORE_ADDR pc;
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
/* There has to be a previous instruction in the function. */
|
2014-11-26 03:37:41 +01:00
|
|
|
if (current_pc <= start_pc)
|
|
|
|
return 0;
|
|
|
|
|
2015-08-03 20:39:52 +02:00
|
|
|
/* Find the previous instruction before current_pc. For R2, it might
|
|
|
|
be either a 16-bit or 32-bit instruction; the only way to know for
|
|
|
|
sure is to scan through from the beginning of the function,
|
|
|
|
disassembling as we go. */
|
|
|
|
if (is_r2)
|
|
|
|
for (pc = start_pc; ; )
|
|
|
|
{
|
|
|
|
op = nios2_fetch_insn (gdbarch, pc, &insn);
|
|
|
|
if (op == NULL)
|
|
|
|
return 0;
|
|
|
|
if (pc + op->size < current_pc)
|
|
|
|
pc += op->size;
|
|
|
|
else
|
|
|
|
break;
|
|
|
|
/* We can skip over insns to a forward branch target. Since
|
|
|
|
the branch offset is relative to the next instruction,
|
|
|
|
it's correct to do this after incrementing the pc above. */
|
|
|
|
if (nios2_match_branch (insn, op, mach, &ra, &rb, &imm, &cond)
|
|
|
|
&& imm > 0
|
|
|
|
&& pc + imm < current_pc)
|
|
|
|
pc += imm;
|
|
|
|
}
|
|
|
|
/* Otherwise just go back to the previous 32-bit insn. */
|
|
|
|
else
|
|
|
|
pc = current_pc - NIOS2_OPCODE_SIZE;
|
2014-11-26 03:34:51 +01:00
|
|
|
|
2014-11-26 03:37:41 +01:00
|
|
|
/* Beginning with the previous instruction we just located, check whether
|
|
|
|
we are in a sequence of at least one stack adjustment instruction.
|
|
|
|
Possible instructions here include:
|
2014-11-26 03:34:51 +01:00
|
|
|
ADDI sp, sp, n
|
|
|
|
ADD sp, sp, rn
|
2015-08-03 20:39:52 +02:00
|
|
|
LDW sp, n(sp)
|
|
|
|
SPINCI.N n
|
|
|
|
LDWSP.N sp, n(sp)
|
|
|
|
LDWM {reglist}, (sp)++, wb */
|
2014-11-26 03:37:41 +01:00
|
|
|
for (ninsns = 0; ninsns < max_insns; ninsns++)
|
|
|
|
{
|
|
|
|
int ok = 0;
|
|
|
|
|
|
|
|
/* Fetch the insn at pc. */
|
|
|
|
op = nios2_fetch_insn (gdbarch, pc, &insn);
|
2014-11-26 03:34:51 +01:00
|
|
|
if (op == NULL)
|
|
|
|
return 0;
|
2014-11-26 03:37:41 +01:00
|
|
|
pc += op->size;
|
2014-11-26 03:34:51 +01:00
|
|
|
|
|
|
|
/* Was it a stack adjustment? */
|
|
|
|
if (nios2_match_addi (insn, op, mach, &ra, &rb, &imm))
|
|
|
|
ok = (rb == NIOS2_SP_REGNUM);
|
|
|
|
else if (nios2_match_add (insn, op, mach, &ra, &rb, &rc))
|
|
|
|
ok = (rc == NIOS2_SP_REGNUM);
|
|
|
|
else if (nios2_match_ldw (insn, op, mach, &ra, &rb, &imm))
|
|
|
|
ok = (rb == NIOS2_SP_REGNUM);
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (nios2_match_ldwm (insn, op, mach, &uimm, &ra,
|
|
|
|
&imm, &wb, &ret, &id))
|
|
|
|
ok = (ra == NIOS2_SP_REGNUM && wb && id);
|
2014-11-26 03:34:51 +01:00
|
|
|
if (!ok)
|
2014-11-26 03:37:41 +01:00
|
|
|
break;
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
2014-11-26 03:37:41 +01:00
|
|
|
|
|
|
|
/* No stack adjustments found. */
|
|
|
|
if (ninsns == 0)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* We found more stack adjustments than we expect GCC to be generating.
|
|
|
|
Since it looks like a stack unwind might be in progress tell GDB to
|
|
|
|
treat it as such. */
|
|
|
|
if (ninsns == max_insns)
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
/* The next instruction following the stack adjustments must be a
|
2015-08-03 20:39:52 +02:00
|
|
|
return, jump, or unconditional branch, or a CDX pop.n or ldwm
|
|
|
|
that does an implicit return. */
|
2014-11-26 03:37:41 +01:00
|
|
|
if (nios2_match_jmpr (insn, op, mach, &ra)
|
|
|
|
|| nios2_match_jmpi (insn, op, mach, &uimm)
|
2015-08-03 20:39:52 +02:00
|
|
|
|| (nios2_match_ldwm (insn, op, mach, &uimm, &ra, &imm, &wb, &id, &ret)
|
|
|
|
&& ret)
|
2014-11-26 03:37:41 +01:00
|
|
|
|| (nios2_match_branch (insn, op, mach, &ra, &rb, &imm, &cond)
|
|
|
|
&& cond == branch_none))
|
|
|
|
return 1;
|
|
|
|
|
2013-05-07 03:09:29 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-05-26 12:59:17 +02:00
|
|
|
/* Implement the stack_frame_destroyed_p gdbarch method. */
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
static int
|
2015-05-26 12:59:17 +02:00
|
|
|
nios2_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
|
|
|
CORE_ADDR func_addr;
|
|
|
|
|
|
|
|
if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
|
|
|
|
return nios2_in_epilogue_p (gdbarch, pc, func_addr);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Do prologue analysis, returning the PC of the first instruction
|
|
|
|
after the function prologue. Assumes CACHE has already been
|
|
|
|
initialized. THIS_FRAME can be null, in which case we are only
|
|
|
|
interested in skipping the prologue. Otherwise CACHE is filled in
|
|
|
|
from the frame information.
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
The prologue may consist of the following parts:
|
|
|
|
1) Profiling instrumentation. For non-PIC code it looks like:
|
2013-05-07 03:09:29 +02:00
|
|
|
mov r8, ra
|
|
|
|
call mcount
|
|
|
|
mov ra, r8
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
2) A stack adjustment and save of R4-R7 for varargs functions.
|
2015-08-03 20:39:52 +02:00
|
|
|
For R2 CDX this is typically handled with a STWM, otherwise
|
|
|
|
this is typically merged with item 3.
|
2014-11-26 03:34:51 +01:00
|
|
|
|
2015-08-03 20:39:52 +02:00
|
|
|
3) A stack adjustment and save of the callee-saved registers.
|
|
|
|
For R2 CDX these are typically handled with a PUSH.N or STWM,
|
|
|
|
otherwise as an explicit SP decrement and individual register
|
2014-11-26 03:34:51 +01:00
|
|
|
saves.
|
|
|
|
|
|
|
|
There may also be a stack switch here in an exception handler
|
|
|
|
in place of a stack adjustment. It looks like:
|
2013-05-07 03:09:29 +02:00
|
|
|
movhi rx, %hiadj(newstack)
|
|
|
|
addhi rx, rx, %lo(newstack)
|
|
|
|
stw sp, constant(rx)
|
|
|
|
mov sp, rx
|
|
|
|
|
2015-07-30 22:23:43 +02:00
|
|
|
4) A frame pointer save, which can be either a MOV or ADDI.
|
2014-11-26 03:34:51 +01:00
|
|
|
|
2015-07-30 22:23:43 +02:00
|
|
|
5) A further stack pointer adjustment. This is normally included
|
|
|
|
adjustment in step 3 unless the total adjustment is too large
|
2014-11-26 03:34:51 +01:00
|
|
|
to be done in one step.
|
|
|
|
|
|
|
|
7) A stack overflow check, which can take either of these forms:
|
2013-05-07 03:09:29 +02:00
|
|
|
bgeu sp, rx, +8
|
2015-07-30 22:23:43 +02:00
|
|
|
trap 3
|
2013-05-07 03:09:29 +02:00
|
|
|
or
|
|
|
|
bltu sp, rx, .Lstack_overflow
|
|
|
|
...
|
|
|
|
.Lstack_overflow:
|
2015-07-30 22:23:43 +02:00
|
|
|
trap 3
|
|
|
|
|
|
|
|
Older versions of GCC emitted "break 3" instead of "trap 3" here,
|
|
|
|
so we check for both cases.
|
|
|
|
|
|
|
|
Older GCC versions emitted stack overflow checks after the SP
|
|
|
|
adjustments in both steps 3 and 4. Starting with GCC 6, there is
|
|
|
|
at most one overflow check, which is placed before the first
|
|
|
|
stack adjustment for R2 CDX and after the first stack adjustment
|
|
|
|
otherwise.
|
2013-05-07 03:09:29 +02:00
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
The prologue instructions may be combined or interleaved with other
|
|
|
|
instructions.
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
To cope with all this variability we decode all the instructions
|
2014-11-26 03:34:51 +01:00
|
|
|
from the start of the prologue until we hit an instruction that
|
|
|
|
cannot possibly be a prologue instruction, such as a branch, call,
|
|
|
|
return, or epilogue instruction. The prologue is considered to end
|
|
|
|
at the last instruction that can definitely be considered a
|
|
|
|
prologue instruction. */
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
nios2_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
|
|
|
|
const CORE_ADDR current_pc,
|
|
|
|
struct nios2_unwind_cache *cache,
|
|
|
|
struct frame_info *this_frame)
|
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
/* Maximum number of possibly-prologue instructions to check.
|
2013-05-07 03:09:29 +02:00
|
|
|
Note that this number should not be too large, else we can
|
|
|
|
potentially end up iterating through unmapped memory. */
|
2014-11-26 03:34:51 +01:00
|
|
|
int ninsns, max_insns = 50;
|
2013-05-07 03:09:29 +02:00
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
2014-11-26 03:34:51 +01:00
|
|
|
unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
/* Does the frame set up the FP register? */
|
|
|
|
int base_reg = 0;
|
|
|
|
|
|
|
|
struct reg_value *value = cache->reg_value;
|
|
|
|
struct reg_value temp_value[NIOS2_NUM_REGS];
|
|
|
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Save the starting PC so we can correct the pc after running
|
|
|
|
through the prolog, using symbol info. */
|
|
|
|
CORE_ADDR pc = start_pc;
|
|
|
|
|
|
|
|
/* Is this an exception handler? */
|
|
|
|
int exception_handler = 0;
|
|
|
|
|
|
|
|
/* What was the original value of SP (or fake original value for
|
|
|
|
functions which switch stacks? */
|
|
|
|
CORE_ADDR frame_high;
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
/* The last definitely-prologue instruction seen. */
|
2013-05-07 03:09:29 +02:00
|
|
|
CORE_ADDR prologue_end;
|
|
|
|
|
|
|
|
/* Is this the innermost function? */
|
|
|
|
int innermost = (this_frame ? (frame_relative_level (this_frame) == 0) : 1);
|
|
|
|
|
|
|
|
if (nios2_debug)
|
|
|
|
fprintf_unfiltered (gdb_stdlog,
|
|
|
|
"{ nios2_analyze_prologue start=%s, current=%s ",
|
|
|
|
paddress (gdbarch, start_pc),
|
|
|
|
paddress (gdbarch, current_pc));
|
|
|
|
|
|
|
|
/* Set up the default values of the registers. */
|
|
|
|
nios2_setup_default (cache);
|
|
|
|
|
|
|
|
/* Find the prologue instructions. */
|
2014-11-26 03:34:51 +01:00
|
|
|
prologue_end = start_pc;
|
|
|
|
for (ninsns = 0; ninsns < max_insns; ninsns++)
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
|
|
|
/* Present instruction. */
|
|
|
|
uint32_t insn;
|
2014-11-26 03:34:51 +01:00
|
|
|
const struct nios2_opcode *op;
|
|
|
|
int ra, rb, rc, imm;
|
|
|
|
unsigned int uimm;
|
|
|
|
unsigned int reglist;
|
2015-08-03 20:39:52 +02:00
|
|
|
int wb, id, ret;
|
2014-11-26 03:34:51 +01:00
|
|
|
enum branch_condition cond;
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
if (pc == current_pc)
|
|
|
|
{
|
|
|
|
/* When we reach the current PC we must save the current
|
|
|
|
register state (for the backtrace) but keep analysing
|
|
|
|
because there might be more to find out (eg. is this an
|
|
|
|
exception handler). */
|
|
|
|
memcpy (temp_value, value, sizeof (temp_value));
|
|
|
|
value = temp_value;
|
|
|
|
if (nios2_debug)
|
|
|
|
fprintf_unfiltered (gdb_stdlog, "*");
|
|
|
|
}
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
op = nios2_fetch_insn (gdbarch, pc, &insn);
|
|
|
|
|
|
|
|
/* Unknown opcode? Stop scanning. */
|
|
|
|
if (op == NULL)
|
|
|
|
break;
|
|
|
|
pc += op->size;
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
if (nios2_debug)
|
2015-08-03 20:39:52 +02:00
|
|
|
{
|
|
|
|
if (op->size == 2)
|
|
|
|
fprintf_unfiltered (gdb_stdlog, "[%04X]", insn & 0xffff);
|
|
|
|
else
|
|
|
|
fprintf_unfiltered (gdb_stdlog, "[%08X]", insn);
|
|
|
|
}
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
/* The following instructions can appear in the prologue. */
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
if (nios2_match_add (insn, op, mach, &ra, &rb, &rc))
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
|
|
|
/* ADD rc, ra, rb (also used for MOV) */
|
|
|
|
if (rc == NIOS2_SP_REGNUM
|
|
|
|
&& rb == 0
|
|
|
|
&& value[ra].reg == cache->reg_saved[NIOS2_SP_REGNUM].basereg)
|
|
|
|
{
|
|
|
|
/* If the previous value of SP is available somewhere
|
|
|
|
near the new stack pointer value then this is a
|
|
|
|
stack switch. */
|
|
|
|
|
|
|
|
/* If any registers were saved on the stack before then
|
|
|
|
we can't backtrace into them now. */
|
|
|
|
for (i = 0 ; i < NIOS2_NUM_REGS ; i++)
|
|
|
|
{
|
|
|
|
if (cache->reg_saved[i].basereg == NIOS2_SP_REGNUM)
|
|
|
|
cache->reg_saved[i].basereg = -1;
|
|
|
|
if (value[i].reg == NIOS2_SP_REGNUM)
|
|
|
|
value[i].reg = -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Create a fake "high water mark" 4 bytes above where SP
|
|
|
|
was stored and fake up the registers to be consistent
|
|
|
|
with that. */
|
|
|
|
value[NIOS2_SP_REGNUM].reg = NIOS2_SP_REGNUM;
|
|
|
|
value[NIOS2_SP_REGNUM].offset
|
|
|
|
= (value[ra].offset
|
|
|
|
- cache->reg_saved[NIOS2_SP_REGNUM].addr
|
|
|
|
- 4);
|
|
|
|
cache->reg_saved[NIOS2_SP_REGNUM].basereg = NIOS2_SP_REGNUM;
|
|
|
|
cache->reg_saved[NIOS2_SP_REGNUM].addr = -4;
|
|
|
|
}
|
|
|
|
|
2014-11-26 03:40:28 +01:00
|
|
|
else if (rc == NIOS2_SP_REGNUM && ra == NIOS2_FP_REGNUM)
|
|
|
|
/* This is setting SP from FP. This only happens in the
|
|
|
|
function epilogue. */
|
|
|
|
break;
|
|
|
|
|
2013-05-07 03:09:29 +02:00
|
|
|
else if (rc != 0)
|
|
|
|
{
|
|
|
|
if (value[rb].reg == 0)
|
|
|
|
value[rc].reg = value[ra].reg;
|
|
|
|
else if (value[ra].reg == 0)
|
|
|
|
value[rc].reg = value[rb].reg;
|
|
|
|
else
|
|
|
|
value[rc].reg = -1;
|
|
|
|
value[rc].offset = value[ra].offset + value[rb].offset;
|
|
|
|
}
|
|
|
|
|
2014-11-26 03:40:28 +01:00
|
|
|
/* The add/move is only considered a prologue instruction
|
|
|
|
if the destination is SP or FP. */
|
|
|
|
if (rc == NIOS2_SP_REGNUM || rc == NIOS2_FP_REGNUM)
|
|
|
|
prologue_end = pc;
|
2014-11-26 03:34:51 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
else if (nios2_match_sub (insn, op, mach, &ra, &rb, &rc))
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
|
|
|
/* SUB rc, ra, rb */
|
2014-11-26 03:40:28 +01:00
|
|
|
if (rc == NIOS2_SP_REGNUM && rb == NIOS2_SP_REGNUM
|
|
|
|
&& value[rc].reg != 0)
|
|
|
|
/* If we are decrementing the SP by a non-constant amount,
|
|
|
|
this is alloca, not part of the prologue. */
|
|
|
|
break;
|
|
|
|
else if (rc != 0)
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
|
|
|
if (value[rb].reg == 0)
|
|
|
|
value[rc].reg = value[ra].reg;
|
|
|
|
else
|
|
|
|
value[rc].reg = -1;
|
|
|
|
value[rc].offset = value[ra].offset - value[rb].offset;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
else if (nios2_match_addi (insn, op, mach, &ra, &rb, &imm))
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
/* ADDI rb, ra, imm */
|
2013-05-07 03:09:29 +02:00
|
|
|
|
2014-11-26 03:40:28 +01:00
|
|
|
/* A positive stack adjustment has to be part of the epilogue. */
|
2013-05-07 03:09:29 +02:00
|
|
|
if (rb == NIOS2_SP_REGNUM
|
2014-11-26 03:40:28 +01:00
|
|
|
&& (imm > 0 || value[ra].reg != NIOS2_SP_REGNUM))
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* Likewise restoring SP from FP. */
|
|
|
|
else if (rb == NIOS2_SP_REGNUM && ra == NIOS2_FP_REGNUM)
|
2013-05-07 03:09:29 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
if (rb != 0)
|
|
|
|
{
|
|
|
|
value[rb].reg = value[ra].reg;
|
2014-11-26 03:34:51 +01:00
|
|
|
value[rb].offset = value[ra].offset + imm;
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
|
2014-11-26 03:40:28 +01:00
|
|
|
/* The add is only considered a prologue instruction
|
|
|
|
if the destination is SP or FP. */
|
|
|
|
if (rb == NIOS2_SP_REGNUM || rb == NIOS2_FP_REGNUM)
|
|
|
|
prologue_end = pc;
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
else if (nios2_match_orhi (insn, op, mach, &ra, &rb, &uimm))
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
/* ORHI rb, ra, uimm (also used for MOVHI) */
|
2013-05-07 03:09:29 +02:00
|
|
|
if (rb != 0)
|
|
|
|
{
|
|
|
|
value[rb].reg = (value[ra].reg == 0) ? 0 : -1;
|
2014-11-26 03:34:51 +01:00
|
|
|
value[rb].offset = value[ra].offset | (uimm << 16);
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
else if (nios2_match_stw (insn, op, mach, &ra, &rb, &imm))
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
/* STW rb, imm(ra) */
|
2013-05-07 03:09:29 +02:00
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
/* Are we storing the original value of a register to the stack?
|
2013-05-07 03:09:29 +02:00
|
|
|
For exception handlers the value of EA-4 (return
|
|
|
|
address from interrupts etc) is sometimes stored. */
|
|
|
|
int orig = value[rb].reg;
|
|
|
|
if (orig > 0
|
|
|
|
&& (value[rb].offset == 0
|
2014-11-26 03:34:51 +01:00
|
|
|
|| (orig == NIOS2_EA_REGNUM && value[rb].offset == -4))
|
2015-07-30 22:26:03 +02:00
|
|
|
&& value[ra].reg == NIOS2_SP_REGNUM)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
if (pc < current_pc)
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
/* Save off callee saved registers. */
|
|
|
|
cache->reg_saved[orig].basereg = value[ra].reg;
|
|
|
|
cache->reg_saved[orig].addr = value[ra].offset + imm;
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
|
|
|
|
prologue_end = pc;
|
|
|
|
|
|
|
|
if (orig == NIOS2_EA_REGNUM || orig == NIOS2_ESTATUS_REGNUM)
|
|
|
|
exception_handler = 1;
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
else
|
2014-11-26 03:34:51 +01:00
|
|
|
/* Non-stack memory writes cannot appear in the prologue. */
|
|
|
|
break;
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (nios2_match_stwm (insn, op, mach,
|
|
|
|
®list, &ra, &imm, &wb, &id))
|
|
|
|
{
|
|
|
|
/* PUSH.N {reglist}, adjust
|
|
|
|
or
|
|
|
|
STWM {reglist}, --(SP)[, writeback] */
|
|
|
|
int i;
|
|
|
|
int off = 0;
|
|
|
|
|
|
|
|
if (ra != NIOS2_SP_REGNUM || id != 0)
|
|
|
|
/* This is a non-stack-push memory write and cannot be
|
|
|
|
part of the prologue. */
|
|
|
|
break;
|
|
|
|
|
|
|
|
for (i = 31; i >= 0; i--)
|
|
|
|
if (reglist & (1 << i))
|
|
|
|
{
|
|
|
|
int orig = value[i].reg;
|
|
|
|
|
|
|
|
off += 4;
|
|
|
|
if (orig > 0 && value[i].offset == 0 && pc < current_pc)
|
|
|
|
{
|
|
|
|
cache->reg_saved[orig].basereg
|
|
|
|
= value[NIOS2_SP_REGNUM].reg;
|
|
|
|
cache->reg_saved[orig].addr
|
|
|
|
= value[NIOS2_SP_REGNUM].offset - off;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (wb)
|
|
|
|
value[NIOS2_SP_REGNUM].offset -= off;
|
|
|
|
value[NIOS2_SP_REGNUM].offset -= imm;
|
|
|
|
|
|
|
|
prologue_end = pc;
|
|
|
|
}
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
else if (nios2_match_rdctl (insn, op, mach, &ra, &rc))
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
/* RDCTL rC, ctlN
|
|
|
|
This can appear in exception handlers in combination with
|
|
|
|
a subsequent save to the stack frame. */
|
2013-05-07 03:09:29 +02:00
|
|
|
if (rc != 0)
|
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
value[rc].reg = NIOS2_STATUS_REGNUM + ra;
|
2013-05-07 03:09:29 +02:00
|
|
|
value[rc].offset = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
else if (nios2_match_calli (insn, op, mach, &uimm))
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
if (value[8].reg == NIOS2_RA_REGNUM
|
|
|
|
&& value[8].offset == 0
|
|
|
|
&& value[NIOS2_SP_REGNUM].reg == NIOS2_SP_REGNUM
|
|
|
|
&& value[NIOS2_SP_REGNUM].offset == 0)
|
|
|
|
{
|
|
|
|
/* A CALL instruction. This is treated as a call to mcount
|
|
|
|
if ra has been stored into r8 beforehand and if it's
|
|
|
|
before the stack adjust.
|
|
|
|
Note mcount corrupts r2-r3, r9-r15 & ra. */
|
|
|
|
for (i = 2 ; i <= 3 ; i++)
|
|
|
|
value[i].reg = -1;
|
|
|
|
for (i = 9 ; i <= 15 ; i++)
|
|
|
|
value[i].reg = -1;
|
|
|
|
value[NIOS2_RA_REGNUM].reg = -1;
|
|
|
|
|
|
|
|
prologue_end = pc;
|
|
|
|
}
|
2013-05-07 03:09:29 +02:00
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
/* Other calls are not part of the prologue. */
|
2013-05-07 03:09:29 +02:00
|
|
|
else
|
2014-11-26 03:34:51 +01:00
|
|
|
break;
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
else if (nios2_match_branch (insn, op, mach, &ra, &rb, &imm, &cond))
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
/* Branches not involving a stack overflow check aren't part of
|
|
|
|
the prologue. */
|
|
|
|
if (ra != NIOS2_SP_REGNUM)
|
|
|
|
break;
|
|
|
|
else if (cond == branch_geu)
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
/* BGEU sp, rx, +8
|
2015-07-30 22:23:43 +02:00
|
|
|
TRAP 3 (or BREAK 3)
|
2014-11-26 03:34:51 +01:00
|
|
|
This instruction sequence is used in stack checking;
|
|
|
|
we can ignore it. */
|
|
|
|
unsigned int next_insn;
|
|
|
|
const struct nios2_opcode *next_op
|
|
|
|
= nios2_fetch_insn (gdbarch, pc, &next_insn);
|
|
|
|
if (next_op != NULL
|
2015-07-30 22:23:43 +02:00
|
|
|
&& (nios2_match_trap (next_insn, op, mach, &uimm)
|
|
|
|
|| nios2_match_break (next_insn, op, mach, &uimm)))
|
2014-11-26 03:34:51 +01:00
|
|
|
pc += next_op->size;
|
|
|
|
else
|
|
|
|
break;
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
else if (cond == branch_ltu)
|
|
|
|
{
|
|
|
|
/* BLTU sp, rx, .Lstackoverflow
|
2015-07-30 22:23:43 +02:00
|
|
|
If the location branched to holds a TRAP or BREAK
|
|
|
|
instruction then this is also stack overflow detection. */
|
2014-11-26 03:34:51 +01:00
|
|
|
unsigned int next_insn;
|
|
|
|
const struct nios2_opcode *next_op
|
|
|
|
= nios2_fetch_insn (gdbarch, pc + imm, &next_insn);
|
|
|
|
if (next_op != NULL
|
2015-07-30 22:23:43 +02:00
|
|
|
&& (nios2_match_trap (next_insn, op, mach, &uimm)
|
|
|
|
|| nios2_match_break (next_insn, op, mach, &uimm)))
|
2014-11-26 03:34:51 +01:00
|
|
|
;
|
|
|
|
else
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
break;
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
|
2015-07-30 22:23:43 +02:00
|
|
|
/* All other calls, jumps, returns, TRAPs, or BREAKs terminate
|
2014-11-26 03:34:51 +01:00
|
|
|
the prologue. */
|
|
|
|
else if (nios2_match_callr (insn, op, mach, &ra)
|
|
|
|
|| nios2_match_jmpr (insn, op, mach, &ra)
|
2015-07-30 22:23:43 +02:00
|
|
|
|| nios2_match_jmpi (insn, op, mach, &uimm)
|
2015-08-03 20:39:52 +02:00
|
|
|
|| (nios2_match_ldwm (insn, op, mach, ®list, &ra,
|
|
|
|
&imm, &wb, &id, &ret)
|
|
|
|
&& ret)
|
2015-07-30 22:23:43 +02:00
|
|
|
|| nios2_match_trap (insn, op, mach, &uimm)
|
|
|
|
|| nios2_match_break (insn, op, mach, &uimm))
|
2014-11-26 03:34:51 +01:00
|
|
|
break;
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* If THIS_FRAME is NULL, we are being called from skip_prologue
|
|
|
|
and are only interested in the PROLOGUE_END value, so just
|
|
|
|
return that now and skip over the cache updates, which depend
|
|
|
|
on having frame information. */
|
|
|
|
if (this_frame == NULL)
|
|
|
|
return prologue_end;
|
|
|
|
|
|
|
|
/* If we are in the function epilogue and have already popped
|
|
|
|
registers off the stack in preparation for returning, then we
|
|
|
|
want to go back to the original register values. */
|
|
|
|
if (innermost && nios2_in_epilogue_p (gdbarch, current_pc, start_pc))
|
|
|
|
nios2_setup_default (cache);
|
|
|
|
|
|
|
|
/* Exception handlers use a different return address register. */
|
|
|
|
if (exception_handler)
|
|
|
|
cache->return_regnum = NIOS2_EA_REGNUM;
|
|
|
|
|
|
|
|
if (nios2_debug)
|
|
|
|
fprintf_unfiltered (gdb_stdlog, "\n-> retreg=%d, ", cache->return_regnum);
|
|
|
|
|
|
|
|
if (cache->reg_value[NIOS2_FP_REGNUM].reg == NIOS2_SP_REGNUM)
|
|
|
|
/* If the FP now holds an offset from the CFA then this is a
|
|
|
|
normal frame which uses the frame pointer. */
|
|
|
|
base_reg = NIOS2_FP_REGNUM;
|
|
|
|
else if (cache->reg_value[NIOS2_SP_REGNUM].reg == NIOS2_SP_REGNUM)
|
|
|
|
/* FP doesn't hold an offset from the CFA. If SP still holds an
|
|
|
|
offset from the CFA then we might be in a function which omits
|
|
|
|
the frame pointer, or we might be partway through the prologue.
|
|
|
|
In both cases we can find the CFA using SP. */
|
|
|
|
base_reg = NIOS2_SP_REGNUM;
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Somehow the stack pointer has been corrupted.
|
|
|
|
We can't return. */
|
|
|
|
if (nios2_debug)
|
|
|
|
fprintf_unfiltered (gdb_stdlog, "<can't reach cfa> }\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cache->reg_value[base_reg].offset == 0
|
|
|
|
|| cache->reg_saved[NIOS2_RA_REGNUM].basereg != NIOS2_SP_REGNUM
|
|
|
|
|| cache->reg_saved[cache->return_regnum].basereg != NIOS2_SP_REGNUM)
|
|
|
|
{
|
|
|
|
/* If the frame didn't adjust the stack, didn't save RA or
|
|
|
|
didn't save EA in an exception handler then it must either
|
|
|
|
be a leaf function (doesn't call any other functions) or it
|
|
|
|
can't return. If it has called another function then it
|
|
|
|
can't be a leaf, so set base == 0 to indicate that we can't
|
|
|
|
backtrace past it. */
|
|
|
|
|
|
|
|
if (!innermost)
|
|
|
|
{
|
|
|
|
/* If it isn't the innermost function then it can't be a
|
|
|
|
leaf, unless it was interrupted. Check whether RA for
|
|
|
|
this frame is the same as PC. If so then it probably
|
|
|
|
wasn't interrupted. */
|
|
|
|
CORE_ADDR ra
|
|
|
|
= get_frame_register_unsigned (this_frame, NIOS2_RA_REGNUM);
|
|
|
|
|
|
|
|
if (ra == current_pc)
|
|
|
|
{
|
|
|
|
if (nios2_debug)
|
|
|
|
fprintf_unfiltered
|
|
|
|
(gdb_stdlog,
|
|
|
|
"<noreturn ADJUST %s, r31@r%d+?>, r%d@r%d+?> }\n",
|
|
|
|
paddress (gdbarch, cache->reg_value[base_reg].offset),
|
|
|
|
cache->reg_saved[NIOS2_RA_REGNUM].basereg,
|
|
|
|
cache->return_regnum,
|
|
|
|
cache->reg_saved[cache->return_regnum].basereg);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of whichever register we are using for the
|
|
|
|
base. */
|
|
|
|
cache->base = get_frame_register_unsigned (this_frame, base_reg);
|
|
|
|
|
|
|
|
/* What was the value of SP at the start of this function (or just
|
|
|
|
after the stack switch). */
|
|
|
|
frame_high = cache->base - cache->reg_value[base_reg].offset;
|
|
|
|
|
|
|
|
/* Adjust all the saved registers such that they contain addresses
|
|
|
|
instead of offsets. */
|
|
|
|
for (i = 0; i < NIOS2_NUM_REGS; i++)
|
|
|
|
if (cache->reg_saved[i].basereg == NIOS2_SP_REGNUM)
|
|
|
|
{
|
|
|
|
cache->reg_saved[i].basereg = NIOS2_Z_REGNUM;
|
|
|
|
cache->reg_saved[i].addr += frame_high;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < NIOS2_NUM_REGS; i++)
|
|
|
|
if (cache->reg_saved[i].basereg == NIOS2_GP_REGNUM)
|
|
|
|
{
|
|
|
|
CORE_ADDR gp = get_frame_register_unsigned (this_frame,
|
|
|
|
NIOS2_GP_REGNUM);
|
|
|
|
|
|
|
|
for ( ; i < NIOS2_NUM_REGS; i++)
|
|
|
|
if (cache->reg_saved[i].basereg == NIOS2_GP_REGNUM)
|
|
|
|
{
|
|
|
|
cache->reg_saved[i].basereg = NIOS2_Z_REGNUM;
|
|
|
|
cache->reg_saved[i].addr += gp;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Work out what the value of SP was on the first instruction of
|
|
|
|
this function. If we didn't switch stacks then this can be
|
|
|
|
trivially computed from the base address. */
|
|
|
|
if (cache->reg_saved[NIOS2_SP_REGNUM].basereg == NIOS2_Z_REGNUM)
|
|
|
|
cache->cfa
|
|
|
|
= read_memory_unsigned_integer (cache->reg_saved[NIOS2_SP_REGNUM].addr,
|
|
|
|
4, byte_order);
|
|
|
|
else
|
|
|
|
cache->cfa = frame_high;
|
|
|
|
|
|
|
|
/* Exception handlers restore ESTATUS into STATUS. */
|
|
|
|
if (exception_handler)
|
|
|
|
{
|
|
|
|
cache->reg_saved[NIOS2_STATUS_REGNUM]
|
|
|
|
= cache->reg_saved[NIOS2_ESTATUS_REGNUM];
|
|
|
|
cache->reg_saved[NIOS2_ESTATUS_REGNUM].basereg = -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (nios2_debug)
|
|
|
|
fprintf_unfiltered (gdb_stdlog, "cfa=%s }\n",
|
|
|
|
paddress (gdbarch, cache->cfa));
|
|
|
|
|
|
|
|
return prologue_end;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the skip_prologue gdbarch hook. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
nios2_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
|
|
|
|
{
|
|
|
|
CORE_ADDR func_addr;
|
|
|
|
|
|
|
|
struct nios2_unwind_cache cache;
|
|
|
|
|
|
|
|
/* See if we can determine the end of the prologue via the symbol
|
|
|
|
table. If so, then return either PC, or the PC after the
|
|
|
|
prologue, whichever is greater. */
|
|
|
|
if (find_pc_partial_function (start_pc, NULL, &func_addr, NULL))
|
|
|
|
{
|
|
|
|
CORE_ADDR post_prologue_pc
|
|
|
|
= skip_prologue_using_sal (gdbarch, func_addr);
|
|
|
|
|
|
|
|
if (post_prologue_pc != 0)
|
gdb: Use std::min and std::max throughout
Otherwise including <string> or some other C++ header is broken.
E.g.:
In file included from /opt/gcc/include/c++/7.0.0/bits/char_traits.h:39:0,
from /opt/gcc/include/c++/7.0.0/string:40,
from /home/pedro/gdb/mygit/cxx-convertion/src/gdb/infrun.c:68:
/opt/gcc/include/c++/7.0.0/bits/stl_algobase.h:243:56: error: macro "min" passed 3 arguments, but takes just 2
min(const _Tp& __a, const _Tp& __b, _Compare __comp)
^
/opt/gcc/include/c++/7.0.0/bits/stl_algobase.h:265:56: error: macro "max" passed 3 arguments, but takes just 2
max(const _Tp& __a, const _Tp& __b, _Compare __comp)
^
In file included from .../src/gdb/infrun.c:21:0:
To the best of my grepping abilities, I believe I adjusted all min/max
calls.
gdb/ChangeLog:
2016-09-16 Pedro Alves <palves@redhat.com>
* defs.h (min, max): Delete.
* aarch64-tdep.c: Include <algorithm> and use std::min and
std::max throughout.
* aarch64-tdep.c: Likewise.
* alpha-tdep.c: Likewise.
* amd64-tdep.c: Likewise.
* amd64-windows-tdep.c: Likewise.
* arm-tdep.c: Likewise.
* avr-tdep.c: Likewise.
* breakpoint.c: Likewise.
* btrace.c: Likewise.
* ctf.c: Likewise.
* disasm.c: Likewise.
* doublest.c: Likewise.
* dwarf2loc.c: Likewise.
* dwarf2read.c: Likewise.
* environ.c: Likewise.
* exec.c: Likewise.
* f-exp.y: Likewise.
* findcmd.c: Likewise.
* ft32-tdep.c: Likewise.
* gcore.c: Likewise.
* hppa-tdep.c: Likewise.
* i386-darwin-tdep.c: Likewise.
* i386-tdep.c: Likewise.
* linux-thread-db.c: Likewise.
* lm32-tdep.c: Likewise.
* m32r-tdep.c: Likewise.
* m88k-tdep.c: Likewise.
* memrange.c: Likewise.
* minidebug.c: Likewise.
* mips-tdep.c: Likewise.
* moxie-tdep.c: Likewise.
* nds32-tdep.c: Likewise.
* nios2-tdep.c: Likewise.
* nto-procfs.c: Likewise.
* parse.c: Likewise.
* ppc-sysv-tdep.c: Likewise.
* probe.c: Likewise.
* record-btrace.c: Likewise.
* remote.c: Likewise.
* rs6000-tdep.c: Likewise.
* rx-tdep.c: Likewise.
* s390-linux-nat.c: Likewise.
* s390-linux-tdep.c: Likewise.
* ser-tcp.c: Likewise.
* sh-tdep.c: Likewise.
* sh64-tdep.c: Likewise.
* source.c: Likewise.
* sparc-tdep.c: Likewise.
* symfile.c: Likewise.
* target-memory.c: Likewise.
* target.c: Likewise.
* tic6x-tdep.c: Likewise.
* tilegx-tdep.c: Likewise.
* tracefile-tfile.c: Likewise.
* tracepoint.c: Likewise.
* valprint.c: Likewise.
* value.c: Likewise.
* xtensa-tdep.c: Likewise.
* cli/cli-cmds.c: Likewise.
* compile/compile-object-load.c: Likewise.
2016-09-16 20:55:17 +02:00
|
|
|
return std::max (start_pc, post_prologue_pc);
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Prologue analysis does the rest.... */
|
|
|
|
nios2_init_cache (&cache, start_pc);
|
|
|
|
return nios2_analyze_prologue (gdbarch, start_pc, start_pc, &cache, NULL);
|
|
|
|
}
|
|
|
|
|
New gdbarch methods breakpoint_kind_from_pc and sw_breakpoint_from_kind
This patch adds two gdbarch methods breakpoint_kind_from_pc and
sw_breakpoint_from_kind, and uses target_info.placed_size as "kind"
of the breakpoint. This patch updates the usages of
target_info.placed_size.
The "kind" of a breakpoint is determined by gdbarch rather than
target, so we have gdbarch method breakpoint_kind_from_pc, and we
should set target_info.placed_size out of each implementation of
target to_insert_breakpoint. In this way, each target doesn't have
to set target_info.placed_size any more.
This patch also sets target_info.placed_address before
target_insert_breakpoint too, so that target to_insert_breakpoint
can use it, see record_full_insert_breakpoint.
Before we call target_insert_breakpoint, we set
target_info.placed_address and target_info.placed_size like this,
CORE_ADDR addr = bl->target_info.reqstd_address;
bl->target_info.placed_size = gdbarch_breakpoint_kind_from_pc (bl->gdbarch, &addr);
bl->target_info.placed_address = addr;
return target_insert_breakpoint (bl->gdbarch, &bl->target_info);
target_insert_breakpoint may fail, but it doesn't matter to the "kind"
and "placed_address" of a breakpoint. They should be determined by
gdbarch.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arch-utils.h (GDBARCH_BREAKPOINT_MANIPULATION): Define
breakpoint_kind_from_pc and sw_breakpoint_from_kind.
(GDBARCH_BREAKPOINT_MANIPULATION_ENDIAN): Likewise.
(SET_GDBARCH_BREAKPOINT_MANIPULATION): Call
set_gdbarch_breakpoint_kind_from_pc and
set_gdbarch_sw_breakpoint_from_kind.
* arm-tdep.c: Add comments.
* bfin-tdep.c: Likewise.
* breakpoint.c (breakpoint_kind): New function.
(insert_bp_location): Set target_info.placed_size and
target_info.placed_address.
(bkpt_insert_location): Likewise.
* cris-tdep.c: Add comments.
* gdbarch.sh (breakpoint_kind_from_pc): New.
(sw_breakpoint_from_kind): New.
* gdbarch.c, gdbarch.h: Regenerated.
* ia64-tdep.c (ia64_memory_insert_breakpoint): Don't set
bp_tgt->placed_size.
(ia64_memory_remove_breakpoint): Don't assert
bp_tgt->placed_size.
(ia64_breakpoint_kind_from_pc): New function.
(ia64_gdbarch_init): Install ia64_breakpoint_kind_from_pc.
* m32r-tdep.c (m32r_memory_insert_breakpoint): Don't set
bp_tgt->placed_size.
* mem-break.c (default_memory_insert_breakpoint): Don't set
bp_tgt->placed_size. Call gdbarch_sw_breakpoint_from_kind.
(default_memory_remove_breakpoint): Call
gdbarch_sw_breakpoint_from_kind.
(memory_validate_breakpoint): Don't check bp_tgt->placed_size.
* mips-tdep.c: Add comments.
* mt-tdep.c: Likewise.
* nios2-tdep.c: Likewise.
* record-full.c (record_full_insert_breakpoint): Don't call
gdbarch_breakpoint_from_pc. Don't set bp_tgt->placed_address
and bp_tgt->placed_size.
* remote.c (remote_insert_breakpoint): Don't call
gdbarch_remote_breakpoint_from_pc. Use bp_tgt->placed_size.
Don't set bp_tgt->placed_address and bp_tgt->placed_size.
(remote_insert_hw_breakpoint): Likewise.
* score-tdep.c: Likewise.
* sh-tdep.c: Likewise.
* tic6x-tdep.c: Likewise.
* v850-tdep.c: Likewise.
* xtensa-tdep.c: Likewise.
2016-11-03 15:35:13 +01:00
|
|
|
/* Implement the breakpoint_kind_from_pc gdbarch method. */
|
|
|
|
|
2016-11-03 15:35:13 +01:00
|
|
|
static int
|
|
|
|
nios2_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
|
|
|
|
{
|
|
|
|
unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
|
|
|
|
|
|
|
|
if (mach == bfd_mach_nios2r2)
|
|
|
|
{
|
|
|
|
unsigned int insn;
|
|
|
|
const struct nios2_opcode *op
|
|
|
|
= nios2_fetch_insn (gdbarch, *pcptr, &insn);
|
|
|
|
|
|
|
|
if (op && op->size == NIOS2_CDX_OPCODE_SIZE)
|
|
|
|
return NIOS2_CDX_OPCODE_SIZE;
|
|
|
|
else
|
|
|
|
return NIOS2_OPCODE_SIZE;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
return NIOS2_OPCODE_SIZE;
|
|
|
|
}
|
2015-05-08 21:24:41 +02:00
|
|
|
|
New gdbarch methods breakpoint_kind_from_pc and sw_breakpoint_from_kind
This patch adds two gdbarch methods breakpoint_kind_from_pc and
sw_breakpoint_from_kind, and uses target_info.placed_size as "kind"
of the breakpoint. This patch updates the usages of
target_info.placed_size.
The "kind" of a breakpoint is determined by gdbarch rather than
target, so we have gdbarch method breakpoint_kind_from_pc, and we
should set target_info.placed_size out of each implementation of
target to_insert_breakpoint. In this way, each target doesn't have
to set target_info.placed_size any more.
This patch also sets target_info.placed_address before
target_insert_breakpoint too, so that target to_insert_breakpoint
can use it, see record_full_insert_breakpoint.
Before we call target_insert_breakpoint, we set
target_info.placed_address and target_info.placed_size like this,
CORE_ADDR addr = bl->target_info.reqstd_address;
bl->target_info.placed_size = gdbarch_breakpoint_kind_from_pc (bl->gdbarch, &addr);
bl->target_info.placed_address = addr;
return target_insert_breakpoint (bl->gdbarch, &bl->target_info);
target_insert_breakpoint may fail, but it doesn't matter to the "kind"
and "placed_address" of a breakpoint. They should be determined by
gdbarch.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arch-utils.h (GDBARCH_BREAKPOINT_MANIPULATION): Define
breakpoint_kind_from_pc and sw_breakpoint_from_kind.
(GDBARCH_BREAKPOINT_MANIPULATION_ENDIAN): Likewise.
(SET_GDBARCH_BREAKPOINT_MANIPULATION): Call
set_gdbarch_breakpoint_kind_from_pc and
set_gdbarch_sw_breakpoint_from_kind.
* arm-tdep.c: Add comments.
* bfin-tdep.c: Likewise.
* breakpoint.c (breakpoint_kind): New function.
(insert_bp_location): Set target_info.placed_size and
target_info.placed_address.
(bkpt_insert_location): Likewise.
* cris-tdep.c: Add comments.
* gdbarch.sh (breakpoint_kind_from_pc): New.
(sw_breakpoint_from_kind): New.
* gdbarch.c, gdbarch.h: Regenerated.
* ia64-tdep.c (ia64_memory_insert_breakpoint): Don't set
bp_tgt->placed_size.
(ia64_memory_remove_breakpoint): Don't assert
bp_tgt->placed_size.
(ia64_breakpoint_kind_from_pc): New function.
(ia64_gdbarch_init): Install ia64_breakpoint_kind_from_pc.
* m32r-tdep.c (m32r_memory_insert_breakpoint): Don't set
bp_tgt->placed_size.
* mem-break.c (default_memory_insert_breakpoint): Don't set
bp_tgt->placed_size. Call gdbarch_sw_breakpoint_from_kind.
(default_memory_remove_breakpoint): Call
gdbarch_sw_breakpoint_from_kind.
(memory_validate_breakpoint): Don't check bp_tgt->placed_size.
* mips-tdep.c: Add comments.
* mt-tdep.c: Likewise.
* nios2-tdep.c: Likewise.
* record-full.c (record_full_insert_breakpoint): Don't call
gdbarch_breakpoint_from_pc. Don't set bp_tgt->placed_address
and bp_tgt->placed_size.
* remote.c (remote_insert_breakpoint): Don't call
gdbarch_remote_breakpoint_from_pc. Use bp_tgt->placed_size.
Don't set bp_tgt->placed_address and bp_tgt->placed_size.
(remote_insert_hw_breakpoint): Likewise.
* score-tdep.c: Likewise.
* sh-tdep.c: Likewise.
* tic6x-tdep.c: Likewise.
* v850-tdep.c: Likewise.
* xtensa-tdep.c: Likewise.
2016-11-03 15:35:13 +01:00
|
|
|
/* Implement the sw_breakpoint_from_kind gdbarch method. */
|
|
|
|
|
2016-11-03 15:35:13 +01:00
|
|
|
static const gdb_byte *
|
|
|
|
nios2_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
|
|
|
|
{
|
|
|
|
/* The Nios II ABI for Linux says: "Userspace programs should not use
|
2015-05-08 21:24:41 +02:00
|
|
|
the break instruction and userspace debuggers should not insert
|
|
|
|
one." and "Userspace breakpoints are accomplished using the trap
|
|
|
|
instruction with immediate operand 31 (all ones)."
|
|
|
|
|
|
|
|
So, we use "trap 31" consistently as the breakpoint on bare-metal
|
|
|
|
as well as Linux targets. */
|
2013-05-07 03:09:29 +02:00
|
|
|
|
2016-11-03 15:35:13 +01:00
|
|
|
/* R2 trap encoding:
|
|
|
|
((0x2d << 26) | (0x1f << 21) | (0x1d << 16) | (0x20 << 0))
|
|
|
|
0xb7fd0020
|
|
|
|
CDX trap.n encoding:
|
|
|
|
((0xd << 12) | (0x1f << 6) | (0x9 << 0))
|
|
|
|
0xd7c9
|
|
|
|
Note that code is always little-endian on R2. */
|
|
|
|
*size = kind;
|
2014-11-26 03:34:51 +01:00
|
|
|
|
2016-11-03 15:35:13 +01:00
|
|
|
if (kind == NIOS2_CDX_OPCODE_SIZE)
|
2015-08-03 20:39:52 +02:00
|
|
|
{
|
|
|
|
static const gdb_byte cdx_breakpoint_le[] = {0xc9, 0xd7};
|
|
|
|
|
2016-11-03 15:35:13 +01:00
|
|
|
return cdx_breakpoint_le;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
|
|
|
|
|
|
|
|
if (mach == bfd_mach_nios2r2)
|
2015-08-03 20:39:52 +02:00
|
|
|
{
|
2016-11-03 15:35:13 +01:00
|
|
|
static const gdb_byte r2_breakpoint_le[] = {0x20, 0x00, 0xfd, 0xb7};
|
|
|
|
|
|
|
|
return r2_breakpoint_le;
|
2015-08-03 20:39:52 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2016-11-03 15:35:13 +01:00
|
|
|
enum bfd_endian byte_order_for_code
|
|
|
|
= gdbarch_byte_order_for_code (gdbarch);
|
|
|
|
/* R1 trap encoding:
|
|
|
|
((0x1d << 17) | (0x2d << 11) | (0x1f << 6) | (0x3a << 0))
|
|
|
|
0x003b6ffa */
|
|
|
|
static const gdb_byte r1_breakpoint_le[] = {0xfa, 0x6f, 0x3b, 0x0};
|
|
|
|
static const gdb_byte r1_breakpoint_be[] = {0x0, 0x3b, 0x6f, 0xfa};
|
|
|
|
|
|
|
|
if (byte_order_for_code == BFD_ENDIAN_BIG)
|
|
|
|
return r1_breakpoint_be;
|
|
|
|
else
|
|
|
|
return r1_breakpoint_le;
|
2015-08-03 20:39:52 +02:00
|
|
|
}
|
|
|
|
}
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the frame_align gdbarch method. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
nios2_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
|
|
|
|
{
|
|
|
|
return align_down (addr, 4);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Implement the return_value gdbarch method. */
|
|
|
|
|
|
|
|
static enum return_value_convention
|
|
|
|
nios2_return_value (struct gdbarch *gdbarch, struct value *function,
|
|
|
|
struct type *type, struct regcache *regcache,
|
|
|
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
|
|
|
{
|
|
|
|
if (TYPE_LENGTH (type) > 8)
|
|
|
|
return RETURN_VALUE_STRUCT_CONVENTION;
|
|
|
|
|
|
|
|
if (readbuf)
|
|
|
|
nios2_extract_return_value (gdbarch, type, regcache, readbuf);
|
|
|
|
if (writebuf)
|
|
|
|
nios2_store_return_value (gdbarch, type, regcache, writebuf);
|
|
|
|
|
|
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the dummy_id gdbarch method. */
|
|
|
|
|
|
|
|
static struct frame_id
|
|
|
|
nios2_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
|
|
|
{
|
|
|
|
return frame_id_build
|
|
|
|
(get_frame_register_unsigned (this_frame, NIOS2_SP_REGNUM),
|
|
|
|
get_frame_pc (this_frame));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the push_dummy_call gdbarch method. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
nios2_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|
|
|
struct regcache *regcache, CORE_ADDR bp_addr,
|
|
|
|
int nargs, struct value **args, CORE_ADDR sp,
|
|
|
|
int struct_return, CORE_ADDR struct_addr)
|
|
|
|
{
|
|
|
|
int argreg;
|
|
|
|
int argnum;
|
|
|
|
int len = 0;
|
|
|
|
int stack_offset = 0;
|
|
|
|
CORE_ADDR func_addr = find_function_addr (function, NULL);
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
|
|
|
|
|
|
/* Set the return address register to point to the entry point of
|
|
|
|
the program, where a breakpoint lies in wait. */
|
|
|
|
regcache_cooked_write_signed (regcache, NIOS2_RA_REGNUM, bp_addr);
|
|
|
|
|
|
|
|
/* Now make space on the stack for the args. */
|
|
|
|
for (argnum = 0; argnum < nargs; argnum++)
|
|
|
|
len += align_up (TYPE_LENGTH (value_type (args[argnum])), 4);
|
|
|
|
sp -= len;
|
|
|
|
|
|
|
|
/* Initialize the register pointer. */
|
|
|
|
argreg = NIOS2_FIRST_ARGREG;
|
|
|
|
|
|
|
|
/* The struct_return pointer occupies the first parameter-passing
|
|
|
|
register. */
|
|
|
|
if (struct_return)
|
|
|
|
regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
|
|
|
|
|
|
|
|
/* Now load as many as possible of the first arguments into
|
|
|
|
registers, and push the rest onto the stack. Loop through args
|
|
|
|
from first to last. */
|
|
|
|
for (argnum = 0; argnum < nargs; argnum++)
|
|
|
|
{
|
|
|
|
const gdb_byte *val;
|
|
|
|
struct value *arg = args[argnum];
|
|
|
|
struct type *arg_type = check_typedef (value_type (arg));
|
|
|
|
int len = TYPE_LENGTH (arg_type);
|
|
|
|
|
|
|
|
val = value_contents (arg);
|
|
|
|
|
|
|
|
/* Copy the argument to general registers or the stack in
|
|
|
|
register-sized pieces. Large arguments are split between
|
|
|
|
registers and stack. */
|
|
|
|
while (len > 0)
|
|
|
|
{
|
|
|
|
int partial_len = (len < 4 ? len : 4);
|
|
|
|
|
|
|
|
if (argreg <= NIOS2_LAST_ARGREG)
|
|
|
|
{
|
|
|
|
/* The argument is being passed in a register. */
|
|
|
|
CORE_ADDR regval = extract_unsigned_integer (val, partial_len,
|
|
|
|
byte_order);
|
|
|
|
|
|
|
|
regcache_cooked_write_unsigned (regcache, argreg, regval);
|
|
|
|
argreg++;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* The argument is being passed on the stack. */
|
|
|
|
CORE_ADDR addr = sp + stack_offset;
|
|
|
|
|
|
|
|
write_memory (addr, val, partial_len);
|
|
|
|
stack_offset += align_up (partial_len, 4);
|
|
|
|
}
|
|
|
|
|
|
|
|
len -= partial_len;
|
|
|
|
val += partial_len;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
regcache_cooked_write_signed (regcache, NIOS2_SP_REGNUM, sp);
|
|
|
|
|
|
|
|
/* Return adjusted stack pointer. */
|
|
|
|
return sp;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the unwind_pc gdbarch method. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
nios2_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
|
|
{
|
|
|
|
gdb_byte buf[4];
|
|
|
|
|
|
|
|
frame_unwind_register (next_frame, NIOS2_PC_REGNUM, buf);
|
|
|
|
return extract_typed_address (buf, builtin_type (gdbarch)->builtin_func_ptr);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the unwind_sp gdbarch method. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
nios2_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
|
|
|
{
|
|
|
|
return frame_unwind_register_unsigned (this_frame, NIOS2_SP_REGNUM);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Use prologue analysis to fill in the register cache
|
|
|
|
*THIS_PROLOGUE_CACHE for THIS_FRAME. This function initializes
|
|
|
|
*THIS_PROLOGUE_CACHE first. */
|
|
|
|
|
|
|
|
static struct nios2_unwind_cache *
|
|
|
|
nios2_frame_unwind_cache (struct frame_info *this_frame,
|
|
|
|
void **this_prologue_cache)
|
|
|
|
{
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (this_frame);
|
|
|
|
CORE_ADDR current_pc;
|
|
|
|
struct nios2_unwind_cache *cache;
|
|
|
|
|
|
|
|
if (*this_prologue_cache)
|
2015-09-25 20:08:07 +02:00
|
|
|
return (struct nios2_unwind_cache *) *this_prologue_cache;
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
cache = FRAME_OBSTACK_ZALLOC (struct nios2_unwind_cache);
|
|
|
|
*this_prologue_cache = cache;
|
|
|
|
|
|
|
|
/* Zero all fields. */
|
|
|
|
nios2_init_cache (cache, get_frame_func (this_frame));
|
|
|
|
|
|
|
|
/* Prologue analysis does the rest... */
|
|
|
|
current_pc = get_frame_pc (this_frame);
|
|
|
|
if (cache->pc != 0)
|
|
|
|
nios2_analyze_prologue (gdbarch, cache->pc, current_pc, cache, this_frame);
|
|
|
|
|
|
|
|
return cache;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the this_id function for the normal unwinder. */
|
|
|
|
|
|
|
|
static void
|
|
|
|
nios2_frame_this_id (struct frame_info *this_frame, void **this_cache,
|
|
|
|
struct frame_id *this_id)
|
|
|
|
{
|
|
|
|
struct nios2_unwind_cache *cache =
|
|
|
|
nios2_frame_unwind_cache (this_frame, this_cache);
|
|
|
|
|
|
|
|
/* This marks the outermost frame. */
|
|
|
|
if (cache->base == 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
*this_id = frame_id_build (cache->cfa, cache->pc);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the prev_register function for the normal unwinder. */
|
|
|
|
|
|
|
|
static struct value *
|
|
|
|
nios2_frame_prev_register (struct frame_info *this_frame, void **this_cache,
|
|
|
|
int regnum)
|
|
|
|
{
|
|
|
|
struct nios2_unwind_cache *cache =
|
|
|
|
nios2_frame_unwind_cache (this_frame, this_cache);
|
|
|
|
|
|
|
|
gdb_assert (regnum >= 0 && regnum < NIOS2_NUM_REGS);
|
|
|
|
|
|
|
|
/* The PC of the previous frame is stored in the RA register of
|
|
|
|
the current frame. Frob regnum so that we pull the value from
|
|
|
|
the correct place. */
|
|
|
|
if (regnum == NIOS2_PC_REGNUM)
|
|
|
|
regnum = cache->return_regnum;
|
|
|
|
|
|
|
|
if (regnum == NIOS2_SP_REGNUM && cache->cfa)
|
|
|
|
return frame_unwind_got_constant (this_frame, regnum, cache->cfa);
|
|
|
|
|
|
|
|
/* If we've worked out where a register is stored then load it from
|
|
|
|
there. */
|
|
|
|
if (cache->reg_saved[regnum].basereg == NIOS2_Z_REGNUM)
|
|
|
|
return frame_unwind_got_memory (this_frame, regnum,
|
|
|
|
cache->reg_saved[regnum].addr);
|
|
|
|
|
|
|
|
return frame_unwind_got_register (this_frame, regnum, regnum);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the this_base, this_locals, and this_args hooks
|
|
|
|
for the normal unwinder. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
nios2_frame_base_address (struct frame_info *this_frame, void **this_cache)
|
|
|
|
{
|
|
|
|
struct nios2_unwind_cache *info
|
|
|
|
= nios2_frame_unwind_cache (this_frame, this_cache);
|
|
|
|
|
|
|
|
return info->base;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Data structures for the normal prologue-analysis-based
|
|
|
|
unwinder. */
|
|
|
|
|
|
|
|
static const struct frame_unwind nios2_frame_unwind =
|
|
|
|
{
|
|
|
|
NORMAL_FRAME,
|
|
|
|
default_frame_unwind_stop_reason,
|
|
|
|
nios2_frame_this_id,
|
|
|
|
nios2_frame_prev_register,
|
|
|
|
NULL,
|
|
|
|
default_frame_sniffer
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct frame_base nios2_frame_base =
|
|
|
|
{
|
|
|
|
&nios2_frame_unwind,
|
|
|
|
nios2_frame_base_address,
|
|
|
|
nios2_frame_base_address,
|
|
|
|
nios2_frame_base_address
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Fill in the register cache *THIS_CACHE for THIS_FRAME for use
|
|
|
|
in the stub unwinder. */
|
|
|
|
|
|
|
|
static struct trad_frame_cache *
|
|
|
|
nios2_stub_frame_cache (struct frame_info *this_frame, void **this_cache)
|
|
|
|
{
|
|
|
|
CORE_ADDR pc;
|
|
|
|
CORE_ADDR start_addr;
|
|
|
|
CORE_ADDR stack_addr;
|
|
|
|
struct trad_frame_cache *this_trad_cache;
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (this_frame);
|
|
|
|
|
|
|
|
if (*this_cache != NULL)
|
2015-09-25 20:08:07 +02:00
|
|
|
return (struct trad_frame_cache *) *this_cache;
|
2013-05-07 03:09:29 +02:00
|
|
|
this_trad_cache = trad_frame_cache_zalloc (this_frame);
|
|
|
|
*this_cache = this_trad_cache;
|
|
|
|
|
|
|
|
/* The return address is in the link register. */
|
|
|
|
trad_frame_set_reg_realreg (this_trad_cache,
|
|
|
|
gdbarch_pc_regnum (gdbarch),
|
|
|
|
NIOS2_RA_REGNUM);
|
|
|
|
|
|
|
|
/* Frame ID, since it's a frameless / stackless function, no stack
|
|
|
|
space is allocated and SP on entry is the current SP. */
|
|
|
|
pc = get_frame_pc (this_frame);
|
|
|
|
find_pc_partial_function (pc, NULL, &start_addr, NULL);
|
|
|
|
stack_addr = get_frame_register_unsigned (this_frame, NIOS2_SP_REGNUM);
|
|
|
|
trad_frame_set_id (this_trad_cache, frame_id_build (start_addr, stack_addr));
|
|
|
|
/* Assume that the frame's base is the same as the stack pointer. */
|
|
|
|
trad_frame_set_this_base (this_trad_cache, stack_addr);
|
|
|
|
|
|
|
|
return this_trad_cache;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the this_id function for the stub unwinder. */
|
|
|
|
|
|
|
|
static void
|
|
|
|
nios2_stub_frame_this_id (struct frame_info *this_frame, void **this_cache,
|
|
|
|
struct frame_id *this_id)
|
|
|
|
{
|
|
|
|
struct trad_frame_cache *this_trad_cache
|
|
|
|
= nios2_stub_frame_cache (this_frame, this_cache);
|
|
|
|
|
|
|
|
trad_frame_get_id (this_trad_cache, this_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the prev_register function for the stub unwinder. */
|
|
|
|
|
|
|
|
static struct value *
|
|
|
|
nios2_stub_frame_prev_register (struct frame_info *this_frame,
|
|
|
|
void **this_cache, int regnum)
|
|
|
|
{
|
|
|
|
struct trad_frame_cache *this_trad_cache
|
|
|
|
= nios2_stub_frame_cache (this_frame, this_cache);
|
|
|
|
|
|
|
|
return trad_frame_get_register (this_trad_cache, this_frame, regnum);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the sniffer function for the stub unwinder.
|
|
|
|
This unwinder is used for cases where the normal
|
|
|
|
prologue-analysis-based unwinder can't work,
|
|
|
|
such as PLT stubs. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_stub_frame_sniffer (const struct frame_unwind *self,
|
|
|
|
struct frame_info *this_frame, void **cache)
|
|
|
|
{
|
|
|
|
gdb_byte dummy[4];
|
|
|
|
CORE_ADDR pc = get_frame_address_in_block (this_frame);
|
|
|
|
|
|
|
|
/* Use the stub unwinder for unreadable code. */
|
|
|
|
if (target_read_memory (get_frame_pc (this_frame), dummy, 4) != 0)
|
|
|
|
return 1;
|
|
|
|
|
2013-06-25 00:18:32 +02:00
|
|
|
if (in_plt_section (pc))
|
2013-05-07 03:09:29 +02:00
|
|
|
return 1;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Define the data structures for the stub unwinder. */
|
|
|
|
|
|
|
|
static const struct frame_unwind nios2_stub_frame_unwind =
|
|
|
|
{
|
|
|
|
NORMAL_FRAME,
|
|
|
|
default_frame_unwind_stop_reason,
|
|
|
|
nios2_stub_frame_this_id,
|
|
|
|
nios2_stub_frame_prev_register,
|
|
|
|
NULL,
|
|
|
|
nios2_stub_frame_sniffer
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Determine where to set a single step breakpoint while considering
|
|
|
|
branch prediction. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
2016-11-22 15:05:05 +01:00
|
|
|
nios2_get_next_pc (struct regcache *regcache, CORE_ADDR pc)
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2017-10-25 17:37:03 +02:00
|
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
2013-05-07 03:09:29 +02:00
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
2014-11-26 03:34:51 +01:00
|
|
|
unsigned long mach = gdbarch_bfd_arch_info (gdbarch)->mach;
|
|
|
|
unsigned int insn;
|
|
|
|
const struct nios2_opcode *op = nios2_fetch_insn (gdbarch, pc, &insn);
|
2013-05-07 03:09:29 +02:00
|
|
|
int ra;
|
|
|
|
int rb;
|
2014-11-26 03:34:51 +01:00
|
|
|
int imm;
|
|
|
|
unsigned int uimm;
|
2015-08-03 20:39:52 +02:00
|
|
|
int wb, id, ret;
|
2014-11-26 03:34:51 +01:00
|
|
|
enum branch_condition cond;
|
|
|
|
|
|
|
|
/* Do something stupid if we can't disassemble the insn at pc. */
|
|
|
|
if (op == NULL)
|
|
|
|
return pc + NIOS2_OPCODE_SIZE;
|
|
|
|
|
|
|
|
if (nios2_match_branch (insn, op, mach, &ra, &rb, &imm, &cond))
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2016-11-22 15:05:05 +01:00
|
|
|
int ras = regcache_raw_get_signed (regcache, ra);
|
|
|
|
int rbs = regcache_raw_get_signed (regcache, rb);
|
|
|
|
unsigned int rau = regcache_raw_get_unsigned (regcache, ra);
|
|
|
|
unsigned int rbu = regcache_raw_get_unsigned (regcache, rb);
|
2013-05-07 03:09:29 +02:00
|
|
|
|
2014-11-26 03:34:51 +01:00
|
|
|
pc += op->size;
|
|
|
|
switch (cond)
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2014-11-26 03:34:51 +01:00
|
|
|
case branch_none:
|
|
|
|
pc += imm;
|
|
|
|
break;
|
|
|
|
case branch_eq:
|
|
|
|
if (ras == rbs)
|
|
|
|
pc += imm;
|
|
|
|
break;
|
|
|
|
case branch_ne:
|
|
|
|
if (ras != rbs)
|
|
|
|
pc += imm;
|
|
|
|
break;
|
|
|
|
case branch_ge:
|
|
|
|
if (ras >= rbs)
|
|
|
|
pc += imm;
|
|
|
|
break;
|
|
|
|
case branch_geu:
|
|
|
|
if (rau >= rbu)
|
|
|
|
pc += imm;
|
|
|
|
break;
|
|
|
|
case branch_lt:
|
|
|
|
if (ras < rbs)
|
|
|
|
pc += imm;
|
|
|
|
break;
|
|
|
|
case branch_ltu:
|
|
|
|
if (rau < rbu)
|
|
|
|
pc += imm;
|
2013-05-07 03:09:29 +02:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2014-11-26 03:34:51 +01:00
|
|
|
|
|
|
|
else if (nios2_match_jmpi (insn, op, mach, &uimm)
|
|
|
|
|| nios2_match_calli (insn, op, mach, &uimm))
|
|
|
|
pc = (pc & 0xf0000000) | uimm;
|
|
|
|
|
|
|
|
else if (nios2_match_jmpr (insn, op, mach, &ra)
|
|
|
|
|| nios2_match_callr (insn, op, mach, &ra))
|
2016-11-22 15:05:05 +01:00
|
|
|
pc = regcache_raw_get_unsigned (regcache, ra);
|
2014-11-26 03:34:51 +01:00
|
|
|
|
2015-08-03 20:39:52 +02:00
|
|
|
else if (nios2_match_ldwm (insn, op, mach, &uimm, &ra, &imm, &wb, &id, &ret)
|
|
|
|
&& ret)
|
|
|
|
{
|
|
|
|
/* If ra is in the reglist, we have to use the value saved in the
|
|
|
|
stack frame rather than the current value. */
|
|
|
|
if (uimm & (1 << NIOS2_RA_REGNUM))
|
2016-11-22 15:05:05 +01:00
|
|
|
pc = nios2_unwind_pc (gdbarch, get_current_frame ());
|
2015-08-03 20:39:52 +02:00
|
|
|
else
|
2016-11-22 15:05:05 +01:00
|
|
|
pc = regcache_raw_get_unsigned (regcache, NIOS2_RA_REGNUM);
|
2015-08-03 20:39:52 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
else if (nios2_match_trap (insn, op, mach, &uimm) && uimm == 0)
|
2014-11-26 03:34:51 +01:00
|
|
|
{
|
|
|
|
if (tdep->syscall_next_pc != NULL)
|
2016-11-22 15:05:05 +01:00
|
|
|
return tdep->syscall_next_pc (get_current_frame (), op);
|
2014-11-26 03:34:51 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
else
|
|
|
|
pc += op->size;
|
|
|
|
|
2013-05-07 03:09:29 +02:00
|
|
|
return pc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the software_single_step gdbarch method. */
|
|
|
|
|
2017-05-02 19:30:07 +02:00
|
|
|
static std::vector<CORE_ADDR>
|
2016-11-22 15:05:06 +01:00
|
|
|
nios2_software_single_step (struct regcache *regcache)
|
2013-05-07 03:09:29 +02:00
|
|
|
{
|
2016-11-22 15:05:05 +01:00
|
|
|
CORE_ADDR next_pc = nios2_get_next_pc (regcache, regcache_read_pc (regcache));
|
2013-05-07 03:09:29 +02:00
|
|
|
|
2017-05-02 19:30:07 +02:00
|
|
|
return {next_pc};
|
2013-05-07 03:09:29 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement the get_longjump_target gdbarch method. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
nios2_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
|
|
|
|
{
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (frame);
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
|
|
CORE_ADDR jb_addr = get_frame_register_unsigned (frame, NIOS2_R4_REGNUM);
|
|
|
|
gdb_byte buf[4];
|
|
|
|
|
|
|
|
if (target_read_memory (jb_addr + (tdep->jb_pc * 4), buf, 4))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
*pc = extract_unsigned_integer (buf, 4, byte_order);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Initialize the Nios II gdbarch. */
|
|
|
|
|
|
|
|
static struct gdbarch *
|
|
|
|
nios2_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
|
|
{
|
|
|
|
struct gdbarch *gdbarch;
|
|
|
|
struct gdbarch_tdep *tdep;
|
2016-04-18 19:16:27 +02:00
|
|
|
int i;
|
2013-05-07 03:09:29 +02:00
|
|
|
struct tdesc_arch_data *tdesc_data = NULL;
|
|
|
|
const struct target_desc *tdesc = info.target_desc;
|
|
|
|
|
|
|
|
if (!tdesc_has_registers (tdesc))
|
|
|
|
/* Pick a default target description. */
|
|
|
|
tdesc = tdesc_nios2;
|
|
|
|
|
|
|
|
/* Check any target description for validity. */
|
|
|
|
if (tdesc_has_registers (tdesc))
|
|
|
|
{
|
|
|
|
const struct tdesc_feature *feature;
|
|
|
|
int valid_p;
|
|
|
|
|
|
|
|
feature = tdesc_find_feature (tdesc, "org.gnu.gdb.nios2.cpu");
|
|
|
|
if (feature == NULL)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
tdesc_data = tdesc_data_alloc ();
|
|
|
|
|
|
|
|
valid_p = 1;
|
|
|
|
|
|
|
|
for (i = 0; i < NIOS2_NUM_REGS; i++)
|
|
|
|
valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
|
|
|
|
nios2_reg_names[i]);
|
|
|
|
|
|
|
|
if (!valid_p)
|
|
|
|
{
|
|
|
|
tdesc_data_cleanup (tdesc_data);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Find a candidate among the list of pre-declared architectures. */
|
|
|
|
arches = gdbarch_list_lookup_by_info (arches, &info);
|
|
|
|
if (arches != NULL)
|
|
|
|
return arches->gdbarch;
|
|
|
|
|
|
|
|
/* None found, create a new architecture from the information
|
|
|
|
provided. */
|
Replace some xmalloc-family functions with XNEW-family ones
This patch is part of the make-gdb-buildable-in-C++ effort. The idea is
to change some calls to the xmalloc family of functions to calls to the
equivalents in the XNEW family. This avoids adding an explicit cast, so
it keeps the code a bit more readable. Some of them also map relatively
well to a C++ equivalent (XNEW (struct foo) -> new foo), so it will be
possible to do scripted replacements if needed.
I only changed calls that were obviously allocating memory for one or
multiple "objects". Allocation of variable sizes (such as strings or
buffer handling) will be for later (and won't use XNEW).
- xmalloc (sizeof (struct foo)) -> XNEW (struct foo)
- xmalloc (num * sizeof (struct foo)) -> XNEWVEC (struct foo, num)
- xcalloc (1, sizeof (struct foo)) -> XCNEW (struct foo)
- xcalloc (num, sizeof (struct foo)) -> XCNEWVEC (struct foo, num)
- xrealloc (p, num * sizeof (struct foo) -> XRESIZEVEC (struct foo, p, num)
- obstack_alloc (ob, sizeof (struct foo)) -> XOBNEW (ob, struct foo)
- obstack_alloc (ob, num * sizeof (struct foo)) -> XOBNEWVEC (ob, struct foo, num)
- alloca (sizeof (struct foo)) -> XALLOCA (struct foo)
- alloca (num * sizeof (struct foo)) -> XALLOCAVEC (struct foo, num)
Some instances of xmalloc followed by memset to zero the buffer were
replaced by XCNEW or XCNEWVEC.
I regtested on x86-64, Ubuntu 14.04, but the patch touches many
architecture-specific files. For those I'll have to rely on the
buildbot or people complaining that I broke their gdb.
gdb/ChangeLog:
* aarch64-linux-nat.c (aarch64_add_process): Likewise.
* aarch64-tdep.c (aarch64_gdbarch_init): Likewise.
* ada-exp.y (write_ambiguous_var): Likewise.
* ada-lang.c (resolve_subexp): Likewise.
(user_select_syms): Likewise.
(assign_aggregate): Likewise.
(ada_evaluate_subexp): Likewise.
(cache_symbol): Likewise.
* addrmap.c (allocate_key): Likewise.
(addrmap_create_mutable): Likewise.
* aix-thread.c (sync_threadlists): Likewise.
* alpha-tdep.c (alpha_push_dummy_call): Likewise.
(alpha_gdbarch_init): Likewise.
* amd64-windows-tdep.c (amd64_windows_push_arguments): Likewise.
* arm-linux-nat.c (arm_linux_add_process): Likewise.
* arm-linux-tdep.c (arm_linux_displaced_step_copy_insn): Likewise.
* arm-tdep.c (push_stack_item): Likewise.
(arm_displaced_step_copy_insn): Likewise.
(arm_gdbarch_init): Likewise.
(_initialize_arm_tdep): Likewise.
* avr-tdep.c (push_stack_item): Likewise.
* ax-general.c (new_agent_expr): Likewise.
* block.c (block_initialize_namespace): Likewise.
* breakpoint.c (alloc_counted_command_line): Likewise.
(update_dprintf_command_list): Likewise.
(parse_breakpoint_sals): Likewise.
(decode_static_tracepoint_spec): Likewise.
(until_break_command): Likewise.
(clear_command): Likewise.
(update_global_location_list): Likewise.
(get_breakpoint_objfile_data) Likewise.
* btrace.c (ftrace_new_function): Likewise.
(btrace_set_insn_history): Likewise.
(btrace_set_call_history): Likewise.
* buildsym.c (add_symbol_to_list): Likewise.
(record_pending_block): Likewise.
(start_subfile): Likewise.
(start_buildsym_compunit): Likewise.
(push_subfile): Likewise.
(end_symtab_get_static_block): Likewise.
(buildsym_init): Likewise.
* cli/cli-cmds.c (source_command): Likewise.
* cli/cli-decode.c (add_cmd): Likewise.
* cli/cli-script.c (build_command_line): Likewise.
(setup_user_args): Likewise.
(realloc_body_list): Likewise.
(process_next_line): Likewise.
(copy_command_lines): Likewise.
* cli/cli-setshow.c (do_set_command): Likewise.
* coff-pe-read.c (read_pe_exported_syms): Likewise.
* coffread.c (coff_locate_sections): Likewise.
(coff_symtab_read): Likewise.
(coff_read_struct_type): Likewise.
* common/cleanups.c (make_my_cleanup2): Likewise.
* common/common-exceptions.c (throw_it): Likewise.
* common/filestuff.c (make_cleanup_close): Likewise.
* common/format.c (parse_format_string): Likewise.
* common/queue.h (DEFINE_QUEUE_P): Likewise.
* compile/compile-object-load.c (munmap_list_add): Likewise.
(compile_object_load): Likewise.
* compile/compile-object-run.c (compile_object_run): Likewise.
* compile/compile.c (append_args): Likewise.
* corefile.c (specify_exec_file_hook): Likewise.
* cp-support.c (make_symbol_overload_list): Likewise.
* cris-tdep.c (push_stack_item): Likewise.
(cris_gdbarch_init): Likewise.
* ctf.c (ctf_trace_file_writer_new): Likewise.
* dbxread.c (init_header_files): Likewise.
(add_new_header_file): Likewise.
(init_bincl_list): Likewise.
(dbx_end_psymtab): Likewise.
(start_psymtab): Likewise.
(dbx_end_psymtab): Likewise.
* dcache.c (dcache_init): Likewise.
* dictionary.c (dict_create_hashed): Likewise.
(dict_create_hashed_expandable): Likewise.
(dict_create_linear): Likewise.
(dict_create_linear_expandable): Likewise.
* dtrace-probe.c (dtrace_process_dof_probe): Likewise.
* dummy-frame.c (register_dummy_frame_dtor): Likewise.
* dwarf2-frame-tailcall.c (cache_new_ref1): Likewise.
* dwarf2-frame.c (dwarf2_build_frame_info): Likewise.
(decode_frame_entry_1): Likewise.
* dwarf2expr.c (new_dwarf_expr_context): Likewise.
* dwarf2loc.c (dwarf2_compile_expr_to_ax): Likewise.
* dwarf2read.c (dwarf2_has_info): Likewise.
(create_signatured_type_table_from_index): Likewise.
(dwarf2_read_index): Likewise.
(dw2_get_file_names_reader): Likewise.
(create_all_type_units): Likewise.
(read_cutu_die_from_dwo): Likewise.
(init_tu_and_read_dwo_dies): Likewise.
(init_cutu_and_read_dies): Likewise.
(create_all_comp_units): Likewise.
(queue_comp_unit): Likewise.
(inherit_abstract_dies): Likewise.
(read_call_site_scope): Likewise.
(dwarf2_add_field): Likewise.
(dwarf2_add_typedef): Likewise.
(dwarf2_add_member_fn): Likewise.
(attr_to_dynamic_prop): Likewise.
(abbrev_table_alloc_abbrev): Likewise.
(abbrev_table_read_table): Likewise.
(add_include_dir): Likewise.
(add_file_name): Likewise.
(dwarf_decode_line_header): Likewise.
(dwarf2_const_value_attr): Likewise.
(dwarf_alloc_block): Likewise.
(parse_macro_definition): Likewise.
(set_die_type): Likewise.
(write_psymtabs_to_index): Likewise.
(create_cus_from_index): Likewise.
(dwarf2_create_include_psymtab): Likewise.
(process_psymtab_comp_unit_reader): Likewise.
(build_type_psymtab_dependencies): Likewise.
(read_comp_units_from_section): Likewise.
(compute_compunit_symtab_includes): Likewise.
(create_dwo_unit_in_dwp_v1): Likewise.
(create_dwo_unit_in_dwp_v2): Likewise.
(read_func_scope): Likewise.
(process_structure_scope): Likewise.
(mark_common_block_symbol_computed): Likewise.
(load_partial_dies): Likewise.
(dwarf2_symbol_mark_computed): Likewise.
* elfread.c (elf_symfile_segments): Likewise.
(elf_read_minimal_symbols): Likewise.
* environ.c (make_environ): Likewise.
* eval.c (evaluate_subexp_standard): Likewise.
* event-loop.c (create_file_handler): Likewise.
(create_async_signal_handler): Likewise.
(create_async_event_handler): Likewise.
(create_timer): Likewise.
* exec.c (build_section_table): Likewise.
* fbsd-nat.c (fbsd_remember_child): Likewise.
* fork-child.c (fork_inferior): Likewise.
* frv-tdep.c (new_variant): Likewise.
* gdbarch.sh (gdbarch_alloc): Likewise.
(append_name): Likewise.
* gdbtypes.c (rank_function): Likewise.
(copy_type_recursive): Likewise.
(add_dyn_prop): Likewise.
* gnu-nat.c (make_proc): Likewise.
(make_inf): Likewise.
(gnu_write_inferior): Likewise.
* gnu-v3-abi.c (build_gdb_vtable_type): Likewise.
(build_std_type_info_type): Likewise.
* guile/scm-param.c (compute_enum_list): Likewise.
* guile/scm-utils.c (gdbscm_parse_function_args): Likewise.
* guile/scm-value.c (gdbscm_value_call): Likewise.
* h8300-tdep.c (h8300_gdbarch_init): Likewise.
* hppa-tdep.c (hppa_init_objfile_priv_data): Likewise.
(read_unwind_info): Likewise.
* ia64-tdep.c (ia64_gdbarch_init): Likewise.
* infcall.c (dummy_frame_context_saver_setup): Likewise.
(call_function_by_hand_dummy): Likewise.
* infcmd.c (step_once): Likewise.
(finish_forward): Likewise.
(attach_command): Likewise.
(notice_new_inferior): Likewise.
* inferior.c (add_inferior_silent): Likewise.
* infrun.c (add_displaced_stepping_state): Likewise.
(save_infcall_control_state): Likewise.
(save_inferior_ptid): Likewise.
(_initialize_infrun): Likewise.
* jit.c (bfd_open_from_target_memory): Likewise.
(jit_gdbarch_data_init): Likewise.
* language.c (add_language): Likewise.
* linespec.c (decode_line_2): Likewise.
* linux-nat.c (add_to_pid_list): Likewise.
(add_initial_lwp): Likewise.
* linux-thread-db.c (add_thread_db_info): Likewise.
(record_thread): Likewise.
(info_auto_load_libthread_db): Likewise.
* m32c-tdep.c (m32c_gdbarch_init): Likewise.
* m68hc11-tdep.c (m68hc11_gdbarch_init): Likewise.
* m68k-tdep.c (m68k_gdbarch_init): Likewise.
* m88k-tdep.c (m88k_analyze_prologue): Likewise.
* macrocmd.c (macro_define_command): Likewise.
* macroexp.c (gather_arguments): Likewise.
* macroscope.c (sal_macro_scope): Likewise.
* macrotab.c (new_macro_table): Likewise.
* mdebugread.c (push_parse_stack): Likewise.
(parse_partial_symbols): Likewise.
(parse_symbol): Likewise.
(psymtab_to_symtab_1): Likewise.
(new_block): Likewise.
(new_psymtab): Likewise.
(mdebug_build_psymtabs): Likewise.
(add_pending): Likewise.
(elfmdebug_build_psymtabs): Likewise.
* mep-tdep.c (mep_gdbarch_init): Likewise.
* mi/mi-main.c (mi_execute_command): Likewise.
* mi/mi-parse.c (mi_parse_argv): Likewise.
* minidebug.c (lzma_open): Likewise.
* minsyms.c (terminate_minimal_symbol_table): Likewise.
* mips-linux-nat.c (mips_linux_insert_watchpoint): Likewise.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* mn10300-tdep.c (mn10300_gdbarch_init): Likewise.
* msp430-tdep.c (msp430_gdbarch_init): Likewise.
* mt-tdep.c (mt_registers_info): Likewise.
* nat/aarch64-linux.c (aarch64_linux_new_thread): Likewise.
* nat/linux-btrace.c (linux_enable_bts): Likewise.
(linux_enable_pt): Likewise.
* nat/linux-osdata.c (linux_xfer_osdata_processes): Likewise.
(linux_xfer_osdata_processgroups): Likewise.
* nios2-tdep.c (nios2_gdbarch_init): Likewise.
* nto-procfs.c (procfs_meminfo): Likewise.
* objc-lang.c (start_msglist): Likewise.
(selectors_info): Likewise.
(classes_info): Likewise.
(find_methods): Likewise.
* objfiles.c (allocate_objfile): Likewise.
(update_section_map): Likewise.
* osabi.c (gdbarch_register_osabi): Likewise.
(gdbarch_register_osabi_sniffer): Likewise.
* parse.c (start_arglist): Likewise.
* ppc-linux-nat.c (hwdebug_find_thread_points_by_tid): Likewise.
(hwdebug_insert_point): Likewise.
* printcmd.c (display_command): Likewise.
(ui_printf): Likewise.
* procfs.c (create_procinfo): Likewise.
(load_syscalls): Likewise.
(proc_get_LDT_entry): Likewise.
(proc_update_threads): Likewise.
* prologue-value.c (make_pv_area): Likewise.
(pv_area_store): Likewise.
* psymtab.c (extend_psymbol_list): Likewise.
(init_psymbol_list): Likewise.
(allocate_psymtab): Likewise.
* python/py-inferior.c (add_thread_object): Likewise.
* python/py-param.c (compute_enum_values): Likewise.
* python/py-value.c (valpy_call): Likewise.
* python/py-varobj.c (py_varobj_iter_next): Likewise.
* python/python.c (ensure_python_env): Likewise.
* record-btrace.c (record_btrace_start_replaying): Likewise.
* record-full.c (record_full_reg_alloc): Likewise.
(record_full_mem_alloc): Likewise.
(record_full_end_alloc): Likewise.
(record_full_core_xfer_partial): Likewise.
* regcache.c (get_thread_arch_aspace_regcache): Likewise.
* remote-fileio.c (remote_fileio_init_fd_map): Likewise.
* remote-notif.c (remote_notif_state_allocate): Likewise.
* remote.c (demand_private_info): Likewise.
(remote_notif_stop_alloc_reply): Likewise.
(remote_enable_btrace): Likewise.
* reverse.c (save_bookmark_command): Likewise.
* rl78-tdep.c (rl78_gdbarch_init): Likewise.
* rx-tdep.c (rx_gdbarch_init): Likewise.
* s390-linux-nat.c (s390_insert_watchpoint): Likewise.
* ser-go32.c (dos_get_tty_state): Likewise.
(dos_copy_tty_state): Likewise.
* ser-mingw.c (ser_windows_open): Likewise.
(ser_console_wait_handle): Likewise.
(ser_console_get_tty_state): Likewise.
(make_pipe_state): Likewise.
(net_windows_open): Likewise.
* ser-unix.c (hardwire_get_tty_state): Likewise.
(hardwire_copy_tty_state): Likewise.
* solib-aix.c (solib_aix_new_lm_info): Likewise.
* solib-dsbt.c (dsbt_current_sos): Likewise.
(dsbt_relocate_main_executable): Likewise.
* solib-frv.c (frv_current_sos): Likewise.
(frv_relocate_main_executable): Likewise.
* solib-spu.c (spu_bfd_fopen): Likewise.
* solib-svr4.c (lm_info_read): Likewise.
(svr4_copy_library_list): Likewise.
(svr4_default_sos): Likewise.
* source.c (find_source_lines): Likewise.
(line_info): Likewise.
(add_substitute_path_rule): Likewise.
* spu-linux-nat.c (spu_bfd_open): Likewise.
* spu-tdep.c (info_spu_dma_cmdlist): Likewise.
* stabsread.c (dbx_lookup_type): Likewise.
(read_type): Likewise.
(read_member_functions): Likewise.
(read_struct_fields): Likewise.
(read_baseclasses): Likewise.
(read_args): Likewise.
(_initialize_stabsread): Likewise.
* stack.c (func_command): Likewise.
* stap-probe.c (handle_stap_probe): Likewise.
* symfile.c (addrs_section_sort): Likewise.
(addr_info_make_relative): Likewise.
(load_section_callback): Likewise.
(add_symbol_file_command): Likewise.
(init_filename_language_table): Likewise.
* symtab.c (create_filename_seen_cache): Likewise.
(sort_search_symbols_remove_dups): Likewise.
(search_symbols): Likewise.
* target.c (make_cleanup_restore_target_terminal): Likewise.
* thread.c (new_thread): Likewise.
(enable_thread_stack_temporaries): Likewise.
(make_cleanup_restore_current_thread): Likewise.
(thread_apply_all_command): Likewise.
* tic6x-tdep.c (tic6x_gdbarch_init): Likewise.
* top.c (gdb_readline_wrapper): Likewise.
* tracefile-tfile.c (tfile_trace_file_writer_new): Likewise.
* tracepoint.c (trace_find_line_command): Likewise.
(all_tracepoint_actions_and_cleanup): Likewise.
(make_cleanup_restore_current_traceframe): Likewise.
(get_uploaded_tp): Likewise.
(get_uploaded_tsv): Likewise.
* tui/tui-data.c (tui_alloc_generic_win_info): Likewise.
(tui_alloc_win_info): Likewise.
(tui_alloc_content): Likewise.
(tui_add_content_elements): Likewise.
* tui/tui-disasm.c (tui_find_disassembly_address): Likewise.
(tui_set_disassem_content): Likewise.
* ui-file.c (ui_file_new): Likewise.
(stdio_file_new): Likewise.
(tee_file_new): Likewise.
* utils.c (make_cleanup_restore_integer): Likewise.
(add_internal_problem_command): Likewise.
* v850-tdep.c (v850_gdbarch_init): Likewise.
* valops.c (find_oload_champ): Likewise.
* value.c (allocate_value_lazy): Likewise.
(record_latest_value): Likewise.
(create_internalvar): Likewise.
* varobj.c (install_variable): Likewise.
(new_variable): Likewise.
(new_root_variable): Likewise.
(cppush): Likewise.
(_initialize_varobj): Likewise.
* windows-nat.c (windows_make_so): Likewise.
* x86-nat.c (x86_add_process): Likewise.
* xcoffread.c (arrange_linetable): Likewise.
(allocate_include_entry): Likewise.
(process_linenos): Likewise.
(SYMBOL_DUP): Likewise.
(xcoff_start_psymtab): Likewise.
(xcoff_end_psymtab): Likewise.
* xml-support.c (gdb_xml_parse_attr_ulongest): Likewise.
* xtensa-tdep.c (xtensa_register_type): Likewise.
* gdbarch.c: Regenerate.
* gdbarch.h: Regenerate.
gdb/gdbserver/ChangeLog:
* ax.c (gdb_parse_agent_expr): Likewise.
(compile_bytecodes): Likewise.
* dll.c (loaded_dll): Likewise.
* event-loop.c (append_callback_event): Likewise.
(create_file_handler): Likewise.
(create_file_event): Likewise.
* hostio.c (handle_open): Likewise.
* inferiors.c (add_thread): Likewise.
(add_process): Likewise.
* linux-aarch64-low.c (aarch64_linux_new_process): Likewise.
* linux-arm-low.c (arm_new_process): Likewise.
(arm_new_thread): Likewise.
* linux-low.c (add_to_pid_list): Likewise.
(linux_add_process): Likewise.
(handle_extended_wait): Likewise.
(add_lwp): Likewise.
(enqueue_one_deferred_signal): Likewise.
(enqueue_pending_signal): Likewise.
(linux_resume_one_lwp_throw): Likewise.
(linux_resume_one_thread): Likewise.
(linux_read_memory): Likewise.
(linux_write_memory): Likewise.
* linux-mips-low.c (mips_linux_new_process): Likewise.
(mips_linux_new_thread): Likewise.
(mips_add_watchpoint): Likewise.
* linux-x86-low.c (initialize_low_arch): Likewise.
* lynx-low.c (lynx_add_process): Likewise.
* mem-break.c (set_raw_breakpoint_at): Likewise.
(set_breakpoint): Likewise.
(add_condition_to_breakpoint): Likewise.
(add_commands_to_breakpoint): Likewise.
(clone_agent_expr): Likewise.
(clone_one_breakpoint): Likewise.
* regcache.c (new_register_cache): Likewise.
* remote-utils.c (look_up_one_symbol): Likewise.
* server.c (queue_stop_reply): Likewise.
(start_inferior): Likewise.
(queue_stop_reply_callback): Likewise.
(handle_target_event): Likewise.
* spu-low.c (fetch_ppc_memory): Likewise.
(store_ppc_memory): Likewise.
* target.c (set_target_ops): Likewise.
* thread-db.c (thread_db_load_search): Likewise.
(try_thread_db_load_1): Likewise.
* tracepoint.c (add_tracepoint): Likewise.
(add_tracepoint_action): Likewise.
(create_trace_state_variable): Likewise.
(cmd_qtdpsrc): Likewise.
(cmd_qtro): Likewise.
(add_while_stepping_state): Likewise.
* win32-low.c (child_add_thread): Likewise.
(get_image_name): Likewise.
2015-08-26 23:16:07 +02:00
|
|
|
tdep = XCNEW (struct gdbarch_tdep);
|
2013-05-07 03:09:29 +02:00
|
|
|
gdbarch = gdbarch_alloc (&info, tdep);
|
|
|
|
|
|
|
|
/* longjmp support not enabled by default. */
|
|
|
|
tdep->jb_pc = -1;
|
|
|
|
|
|
|
|
/* Data type sizes. */
|
|
|
|
set_gdbarch_ptr_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_addr_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_short_bit (gdbarch, 16);
|
|
|
|
set_gdbarch_int_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_long_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
|
|
|
set_gdbarch_float_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_double_bit (gdbarch, 64);
|
|
|
|
|
|
|
|
set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
|
|
|
|
set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
|
|
|
|
|
|
|
|
/* The register set. */
|
|
|
|
set_gdbarch_num_regs (gdbarch, NIOS2_NUM_REGS);
|
|
|
|
set_gdbarch_sp_regnum (gdbarch, NIOS2_SP_REGNUM);
|
|
|
|
set_gdbarch_pc_regnum (gdbarch, NIOS2_PC_REGNUM); /* Pseudo register PC */
|
|
|
|
|
|
|
|
set_gdbarch_register_name (gdbarch, nios2_register_name);
|
|
|
|
set_gdbarch_register_type (gdbarch, nios2_register_type);
|
|
|
|
|
|
|
|
/* Provide register mappings for stabs and dwarf2. */
|
|
|
|
set_gdbarch_stab_reg_to_regnum (gdbarch, nios2_dwarf_reg_to_regnum);
|
|
|
|
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, nios2_dwarf_reg_to_regnum);
|
|
|
|
|
|
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
|
|
|
|
|
|
|
/* Call dummy code. */
|
|
|
|
set_gdbarch_frame_align (gdbarch, nios2_frame_align);
|
|
|
|
|
|
|
|
set_gdbarch_return_value (gdbarch, nios2_return_value);
|
|
|
|
|
|
|
|
set_gdbarch_skip_prologue (gdbarch, nios2_skip_prologue);
|
2015-05-26 12:59:17 +02:00
|
|
|
set_gdbarch_stack_frame_destroyed_p (gdbarch, nios2_stack_frame_destroyed_p);
|
2016-11-03 15:35:14 +01:00
|
|
|
set_gdbarch_breakpoint_kind_from_pc (gdbarch, nios2_breakpoint_kind_from_pc);
|
|
|
|
set_gdbarch_sw_breakpoint_from_kind (gdbarch, nios2_sw_breakpoint_from_kind);
|
2013-05-07 03:09:29 +02:00
|
|
|
|
|
|
|
set_gdbarch_dummy_id (gdbarch, nios2_dummy_id);
|
|
|
|
set_gdbarch_unwind_pc (gdbarch, nios2_unwind_pc);
|
|
|
|
set_gdbarch_unwind_sp (gdbarch, nios2_unwind_sp);
|
|
|
|
|
|
|
|
/* The dwarf2 unwinder will normally produce the best results if
|
|
|
|
the debug information is available, so register it first. */
|
|
|
|
dwarf2_append_unwinders (gdbarch);
|
|
|
|
frame_unwind_append_unwinder (gdbarch, &nios2_stub_frame_unwind);
|
|
|
|
frame_unwind_append_unwinder (gdbarch, &nios2_frame_unwind);
|
|
|
|
|
|
|
|
/* Single stepping. */
|
|
|
|
set_gdbarch_software_single_step (gdbarch, nios2_software_single_step);
|
|
|
|
|
|
|
|
/* Hook in ABI-specific overrides, if they have been registered. */
|
|
|
|
gdbarch_init_osabi (info, gdbarch);
|
|
|
|
|
|
|
|
if (tdep->jb_pc >= 0)
|
|
|
|
set_gdbarch_get_longjmp_target (gdbarch, nios2_get_longjmp_target);
|
|
|
|
|
|
|
|
frame_base_set_default (gdbarch, &nios2_frame_base);
|
|
|
|
|
|
|
|
/* Enable inferior call support. */
|
|
|
|
set_gdbarch_push_dummy_call (gdbarch, nios2_push_dummy_call);
|
|
|
|
|
|
|
|
if (tdesc_data)
|
|
|
|
tdesc_use_registers (gdbarch, tdesc, tdesc_data);
|
|
|
|
|
|
|
|
return gdbarch;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
_initialize_nios2_tdep (void)
|
|
|
|
{
|
|
|
|
gdbarch_register (bfd_arch_nios2, nios2_gdbarch_init, NULL);
|
|
|
|
initialize_tdesc_nios2 ();
|
|
|
|
|
|
|
|
/* Allow debugging this file's internals. */
|
|
|
|
add_setshow_boolean_cmd ("nios2", class_maintenance, &nios2_debug,
|
|
|
|
_("Set Nios II debugging."),
|
|
|
|
_("Show Nios II debugging."),
|
|
|
|
_("When on, Nios II specific debugging is enabled."),
|
|
|
|
NULL,
|
|
|
|
NULL,
|
|
|
|
&setdebuglist, &showdebuglist);
|
|
|
|
}
|