46 lines
1.4 KiB
Plaintext
46 lines
1.4 KiB
Plaintext
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/* SH64 target configuration file. -*- C -*- */
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/* Define this if the simulator can vary the size of memory.
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See the xxx simulator for an example.
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This enables the `-m size' option.
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The memory size is stored in STATE_MEM_SIZE. */
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/* Not used for SH64 since we use the memory module. TODO -- check this */
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/* #define SIM_HAVE_MEM_SIZE */
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/* See sim-hload.c. We properly handle LMA. -- TODO: check this */
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#define SIM_HANDLES_LMA 1
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/* For MSPR support. FIXME: revisit. */
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#define WITH_DEVICES 0
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/* FIXME: Revisit. */
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#ifdef HAVE_DV_SOCKSER
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MODULE_INSTALL_FN dv_sockser_install;
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#define MODULE_LIST dv_sockser_install,
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#endif
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#if 0
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/* Enable watchpoints. */
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#define WITH_WATCHPOINTS 1
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#endif
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/* ??? Temporary hack until model support unified. */
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#define SIM_HAVE_MODEL
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/* Define this to enable the intrinsic breakpoint mechanism. */
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/* FIXME: may be able to remove SIM_HAVE_BREAKPOINTS since it essentially
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duplicates ifdef SIM_BREAKPOINT (right?) */
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#if 1
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#define SIM_HAVE_BREAKPOINTS
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#define SIM_BREAKPOINT { 0, 0, 0, 0xD }
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#define SIM_BREAKPOINT_SIZE 4
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#endif
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/* This is a global setting. Different cpu families can't mix-n-match -scache
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and -pbb. However some cpu families may use -simple while others use
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one of -scache/-pbb. ???? */
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#define WITH_SCACHE_PBB 1
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/* Define this if the target cpu is bi-endian and the simulator supports it. */
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#define SIM_HAVE_BIENDIAN
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