1999-04-16 03:35:26 +02:00
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/* This file is part of the program GDB, the GNU debugger.
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2007-01-09 18:59:20 +01:00
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Copyright (C) 1998, 2007 Free Software Foundation, Inc.
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1999-04-16 03:35:26 +02:00
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Contributed by Cygnus Solutions.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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2007-08-24 16:30:15 +02:00
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the Free Software Foundation; either version 3 of the License, or
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1999-04-16 03:35:26 +02:00
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(at your option) any later version.
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2007-08-24 16:30:15 +02:00
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1999-04-16 03:35:26 +02:00
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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2007-08-24 16:30:15 +02:00
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1999-04-16 03:35:26 +02:00
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You should have received a copy of the GNU General Public License
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2007-08-24 16:30:15 +02:00
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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1999-04-16 03:35:26 +02:00
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*/
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#include "sim-main.h"
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#include "hw-main.h"
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#include "dv-sockser.h"
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/* DEVICE
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mn103ser - mn103002 serial devices 0, 1 and 2.
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DESCRIPTION
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Implements the mn103002 serial interfaces as described in the
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mn103002 user guide.
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PROPERTIES
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reg = <serial-addr> <serial-size>
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BUGS
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*/
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/* The serial devices' registers' address block */
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struct mn103ser_block {
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unsigned_word base;
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unsigned_word bound;
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};
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enum serial_register_types {
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SC0CTR,
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SC1CTR,
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SC2CTR,
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SC0ICR,
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SC1ICR,
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SC2ICR,
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SC0TXB,
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SC1TXB,
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SC2TXB,
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SC0RXB,
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SC1RXB,
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SC2RXB,
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SC0STR,
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SC1STR,
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SC2STR,
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SC2TIM,
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};
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/* Access dv-sockser state */
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extern char* sockser_addr;
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#define USE_SOCKSER_P (sockser_addr != NULL)
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#define NR_SERIAL_DEVS 3
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#define SIO_STAT_RRDY 0x0010
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typedef struct _mn10300_serial {
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unsigned16 status, control;
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unsigned8 txb, rxb, intmode;
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struct hw_event *event;
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} mn10300_serial;
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struct mn103ser {
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struct mn103ser_block block;
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mn10300_serial device[NR_SERIAL_DEVS];
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unsigned8 serial2_timer_reg;
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do_hw_poll_read_method *reader;
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};
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/* output port ID's */
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/* for mn103002 */
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enum {
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SERIAL0_RECEIVE,
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SERIAL1_RECEIVE,
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SERIAL2_RECEIVE,
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SERIAL0_SEND,
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SERIAL1_SEND,
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SERIAL2_SEND,
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};
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static const struct hw_port_descriptor mn103ser_ports[] = {
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{ "serial-0-receive", SERIAL0_RECEIVE, 0, output_port, },
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{ "serial-1-receive", SERIAL1_RECEIVE, 0, output_port, },
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{ "serial-2-receive", SERIAL2_RECEIVE, 0, output_port, },
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{ "serial-0-transmit", SERIAL0_SEND, 0, output_port, },
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{ "serial-1-transmit", SERIAL1_SEND, 0, output_port, },
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{ "serial-2-transmit", SERIAL2_SEND, 0, output_port, },
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{ NULL, },
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};
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/* Finish off the partially created hw device. Attach our local
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callbacks. Wire up our port names etc */
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static hw_io_read_buffer_method mn103ser_io_read_buffer;
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static hw_io_write_buffer_method mn103ser_io_write_buffer;
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static void
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attach_mn103ser_regs (struct hw *me,
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struct mn103ser *serial)
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{
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unsigned_word attach_address;
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int attach_space;
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unsigned attach_size;
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reg_property_spec reg;
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if (hw_find_property (me, "reg") == NULL)
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hw_abort (me, "Missing \"reg\" property");
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if (!hw_find_reg_array_property (me, "reg", 0, ®))
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hw_abort (me, "\"reg\" property must contain three addr/size entries");
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hw_unit_address_to_attach_address (hw_parent (me),
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®.address,
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&attach_space,
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&attach_address,
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me);
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serial->block.base = attach_address;
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hw_unit_size_to_attach_size (hw_parent (me),
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®.size,
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&attach_size, me);
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serial->block.bound = attach_address + (attach_size - 1);
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hw_attach_address (hw_parent (me),
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0,
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attach_space, attach_address, attach_size,
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me);
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}
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static void
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mn103ser_finish (struct hw *me)
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{
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struct mn103ser *serial;
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int i;
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serial = HW_ZALLOC (me, struct mn103ser);
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set_hw_data (me, serial);
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set_hw_io_read_buffer (me, mn103ser_io_read_buffer);
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set_hw_io_write_buffer (me, mn103ser_io_write_buffer);
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set_hw_ports (me, mn103ser_ports);
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/* Attach ourself to our parent bus */
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attach_mn103ser_regs (me, serial);
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/* If so configured, enable polled input */
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if (hw_find_property (me, "poll?") != NULL
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&& hw_find_boolean_property (me, "poll?"))
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{
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serial->reader = sim_io_poll_read;
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}
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else
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{
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serial->reader = sim_io_read;
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}
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/* Initialize the serial device registers. */
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for ( i=0; i<NR_SERIAL_DEVS; ++i )
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{
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serial->device[i].txb = 0;
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serial->device[i].rxb = 0;
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serial->device[i].status = 0;
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serial->device[i].control = 0;
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serial->device[i].intmode = 0;
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serial->device[i].event = NULL;
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}
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}
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/* read and write */
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static int
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decode_addr (struct hw *me,
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struct mn103ser *serial,
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unsigned_word address)
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{
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unsigned_word offset;
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offset = address - serial->block.base;
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switch (offset)
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{
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case 0x00: return SC0CTR;
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case 0x04: return SC0ICR;
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case 0x08: return SC0TXB;
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case 0x09: return SC0RXB;
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case 0x0C: return SC0STR;
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case 0x10: return SC1CTR;
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case 0x14: return SC1ICR;
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case 0x18: return SC1TXB;
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case 0x19: return SC1RXB;
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case 0x1C: return SC1STR;
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case 0x20: return SC2CTR;
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case 0x24: return SC2ICR;
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case 0x28: return SC2TXB;
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case 0x29: return SC2RXB;
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case 0x2C: return SC2STR;
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case 0x2D: return SC2TIM;
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default:
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{
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hw_abort (me, "bad address");
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return -1;
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}
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}
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}
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static void
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do_polling_event (struct hw *me,
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void *data)
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{
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struct mn103ser *serial = hw_data(me);
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2003-08-28 19:02:00 +02:00
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long serial_reg = (long) data;
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1999-04-16 03:35:26 +02:00
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char c;
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int count;
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if(USE_SOCKSER_P)
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{
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int rd;
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rd = dv_sockser_read (hw_system (me));
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if(rd != -1)
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{
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c = (char) rd;
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count = 1;
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}
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else
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{
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count = HW_IO_NOT_READY;
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}
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}
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else
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{
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count = do_hw_poll_read (me, serial->reader,
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0/*STDIN*/, &c, sizeof(c));
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}
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switch (count)
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{
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case HW_IO_NOT_READY:
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case HW_IO_EOF:
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serial->device[serial_reg].rxb = 0;
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serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
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break;
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default:
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serial->device[serial_reg].rxb = c;
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serial->device[serial_reg].status |= SIO_STAT_RRDY;
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hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
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}
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/* Schedule next polling event */
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serial->device[serial_reg].event
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= hw_event_queue_schedule (me, 1000,
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do_polling_event, (void *)serial_reg);
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}
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static void
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read_control_reg (struct hw *me,
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struct mn103ser *serial,
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unsigned_word serial_reg,
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void *dest,
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unsigned nr_bytes)
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{
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/* really allow 1 byte read, too */
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if ( nr_bytes == 2 )
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{
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*(unsigned16 *)dest = H2LE_2 (serial->device[serial_reg].control);
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}
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else
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{
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hw_abort (me, "bad read size of %d bytes from SC%dCTR.", nr_bytes,
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serial_reg);
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}
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}
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static void
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read_intmode_reg (struct hw *me,
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struct mn103ser *serial,
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unsigned_word serial_reg,
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void *dest,
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unsigned nr_bytes)
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{
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if ( nr_bytes == 1 )
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{
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*(unsigned8 *)dest = serial->device[serial_reg].intmode;
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}
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else
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{
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hw_abort (me, "bad read size of %d bytes from SC%dICR.", nr_bytes,
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serial_reg);
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}
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}
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static void
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read_txb (struct hw *me,
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struct mn103ser *serial,
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unsigned_word serial_reg,
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void *dest,
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unsigned nr_bytes)
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{
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if ( nr_bytes == 1 )
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{
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*(unsigned8 *)dest = serial->device[serial_reg].txb;
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}
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else
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{
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hw_abort (me, "bad read size of %d bytes from SC%dTXB.", nr_bytes,
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serial_reg);
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}
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}
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static void
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read_rxb (struct hw *me,
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struct mn103ser *serial,
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unsigned_word serial_reg,
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void *dest,
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unsigned nr_bytes)
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{
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if ( nr_bytes == 1 )
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{
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*(unsigned8 *)dest = serial->device[serial_reg].rxb;
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/* Reception buffer is now empty. */
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serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
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}
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else
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{
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hw_abort (me, "bad read size of %d bytes from SC%dRXB.", nr_bytes,
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serial_reg);
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}
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}
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static void
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read_status_reg (struct hw *me,
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struct mn103ser *serial,
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unsigned_word serial_reg,
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void *dest,
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unsigned nr_bytes)
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{
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char c;
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int count;
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if ( (serial->device[serial_reg].status & SIO_STAT_RRDY) == 0 )
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{
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/* FIFO is empty */
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/* Kill current poll event */
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if ( NULL != serial->device[serial_reg].event )
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{
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hw_event_queue_deschedule (me, serial->device[serial_reg].event);
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serial->device[serial_reg].event = NULL;
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}
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if(USE_SOCKSER_P)
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{
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int rd;
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rd = dv_sockser_read (hw_system (me));
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if(rd != -1)
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{
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c = (char) rd;
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count = 1;
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}
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else
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{
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count = HW_IO_NOT_READY;
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}
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}
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else
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|
|
{
|
|
|
|
count = do_hw_poll_read (me, serial->reader,
|
|
|
|
0/*STDIN*/, &c, sizeof(c));
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (count)
|
|
|
|
{
|
|
|
|
case HW_IO_NOT_READY:
|
|
|
|
case HW_IO_EOF:
|
|
|
|
serial->device[serial_reg].rxb = 0;
|
|
|
|
serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
serial->device[serial_reg].rxb = c;
|
|
|
|
serial->device[serial_reg].status |= SIO_STAT_RRDY;
|
|
|
|
hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* schedule polling event */
|
|
|
|
serial->device[serial_reg].event
|
|
|
|
= hw_event_queue_schedule (me, 1000,
|
|
|
|
do_polling_event,
|
2003-08-28 19:02:00 +02:00
|
|
|
(void *) (long) serial_reg);
|
1999-04-16 03:35:26 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
if ( nr_bytes == 1 )
|
|
|
|
{
|
|
|
|
*(unsigned8 *)dest = (unsigned8)serial->device[serial_reg].status;
|
|
|
|
}
|
|
|
|
else if ( nr_bytes == 2 && serial_reg != SC2STR )
|
|
|
|
{
|
|
|
|
*(unsigned16 *)dest = H2LE_2 (serial->device[serial_reg].status);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
|
|
|
|
serial_reg);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
read_serial2_timer_reg (struct hw *me,
|
|
|
|
struct mn103ser *serial,
|
|
|
|
void *dest,
|
|
|
|
unsigned nr_bytes)
|
|
|
|
{
|
|
|
|
if ( nr_bytes == 1 )
|
|
|
|
{
|
|
|
|
* (unsigned8 *) dest = (unsigned8) serial->serial2_timer_reg;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hw_abort (me, "bad read size of %d bytes to SC2TIM.", nr_bytes);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static unsigned
|
|
|
|
mn103ser_io_read_buffer (struct hw *me,
|
|
|
|
void *dest,
|
|
|
|
int space,
|
|
|
|
unsigned_word base,
|
|
|
|
unsigned nr_bytes)
|
|
|
|
{
|
|
|
|
struct mn103ser *serial = hw_data (me);
|
|
|
|
enum serial_register_types serial_reg;
|
|
|
|
HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
|
|
|
|
|
|
|
|
serial_reg = decode_addr (me, serial, base);
|
|
|
|
switch (serial_reg)
|
|
|
|
{
|
|
|
|
/* control registers */
|
|
|
|
case SC0CTR:
|
|
|
|
case SC1CTR:
|
|
|
|
case SC2CTR:
|
|
|
|
read_control_reg(me, serial, serial_reg-SC0CTR, dest, nr_bytes);
|
|
|
|
HW_TRACE ((me, "read - ctrl reg%d has 0x%x\n", serial_reg-SC0CTR,
|
|
|
|
*(unsigned8 *)dest));
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* interrupt mode registers */
|
|
|
|
case SC0ICR:
|
|
|
|
case SC1ICR:
|
|
|
|
case SC2ICR:
|
|
|
|
read_intmode_reg(me, serial, serial_reg-SC0ICR, dest, nr_bytes);
|
|
|
|
HW_TRACE ((me, "read - intmode reg%d has 0x%x\n", serial_reg-SC0ICR,
|
|
|
|
*(unsigned8 *)dest));
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* transmission buffers */
|
|
|
|
case SC0TXB:
|
|
|
|
case SC1TXB:
|
|
|
|
case SC2TXB:
|
|
|
|
read_txb(me, serial, serial_reg-SC0TXB, dest, nr_bytes);
|
|
|
|
HW_TRACE ((me, "read - txb%d has %c\n", serial_reg-SC0TXB,
|
|
|
|
*(char *)dest));
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* reception buffers */
|
|
|
|
case SC0RXB:
|
|
|
|
case SC1RXB:
|
|
|
|
case SC2RXB:
|
|
|
|
read_rxb(me, serial, serial_reg-SC0RXB, dest, nr_bytes);
|
|
|
|
HW_TRACE ((me, "read - rxb%d has %c\n", serial_reg-SC0RXB,
|
|
|
|
*(char *)dest));
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* status registers */
|
|
|
|
case SC0STR:
|
|
|
|
case SC1STR:
|
|
|
|
case SC2STR:
|
|
|
|
read_status_reg(me, serial, serial_reg-SC0STR, dest, nr_bytes);
|
|
|
|
HW_TRACE ((me, "read - status reg%d has 0x%x\n", serial_reg-SC0STR,
|
|
|
|
*(unsigned8 *)dest));
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SC2TIM:
|
|
|
|
read_serial2_timer_reg(me, serial, dest, nr_bytes);
|
|
|
|
HW_TRACE ((me, "read - serial2 timer reg %d\n", *(unsigned8 *)dest));
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
hw_abort(me, "invalid address");
|
|
|
|
}
|
|
|
|
|
|
|
|
return nr_bytes;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
write_control_reg (struct hw *me,
|
|
|
|
struct mn103ser *serial,
|
|
|
|
unsigned_word serial_reg,
|
|
|
|
const void *source,
|
|
|
|
unsigned nr_bytes)
|
|
|
|
{
|
|
|
|
unsigned16 val = LE2H_2 (*(unsigned16 *)source);
|
|
|
|
|
|
|
|
/* really allow 1 byte write, too */
|
|
|
|
if ( nr_bytes == 2 )
|
|
|
|
{
|
|
|
|
if ( serial_reg == 2 && (val & 0x0C04) != 0 )
|
|
|
|
{
|
|
|
|
hw_abort(me, "Cannot write to read-only bits of SC2CTR.");
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
serial->device[serial_reg].control = val;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
|
|
|
|
serial_reg);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
write_intmode_reg (struct hw *me,
|
|
|
|
struct mn103ser *serial,
|
|
|
|
unsigned_word serial_reg,
|
|
|
|
const void *source,
|
|
|
|
unsigned nr_bytes)
|
|
|
|
{
|
|
|
|
unsigned8 val = *(unsigned8 *)source;
|
|
|
|
|
|
|
|
if ( nr_bytes == 1 )
|
|
|
|
{
|
|
|
|
/* Check for attempt to write to read-only bits of register. */
|
|
|
|
if ( ( serial_reg == 2 && (val & 0xCA) != 0 )
|
|
|
|
|| ( serial_reg != 2 && (val & 0x4A) != 0 ) )
|
|
|
|
{
|
|
|
|
hw_abort(me, "Cannot write to read-only bits of SC%dICR.",
|
|
|
|
serial_reg);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
serial->device[serial_reg].intmode = val;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hw_abort (me, "bad write size of %d bytes to SC%dICR.", nr_bytes,
|
|
|
|
serial_reg);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
write_txb (struct hw *me,
|
|
|
|
struct mn103ser *serial,
|
|
|
|
unsigned_word serial_reg,
|
|
|
|
const void *source,
|
|
|
|
unsigned nr_bytes)
|
|
|
|
{
|
|
|
|
if ( nr_bytes == 1 )
|
|
|
|
{
|
|
|
|
serial->device[serial_reg].txb = *(unsigned8 *)source;
|
|
|
|
|
|
|
|
if(USE_SOCKSER_P)
|
|
|
|
{
|
|
|
|
dv_sockser_write(hw_system (me), * (char*) source);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
sim_io_write_stdout(hw_system (me), (char *)source, 1);
|
|
|
|
sim_io_flush_stdout(hw_system (me));
|
|
|
|
}
|
|
|
|
|
|
|
|
hw_port_event (me, serial_reg+SERIAL0_SEND, 1);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hw_abort (me, "bad write size of %d bytes to SC%dTXB.", nr_bytes,
|
|
|
|
serial_reg);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
write_serial2_timer_reg (struct hw *me,
|
|
|
|
struct mn103ser *serial,
|
|
|
|
const void *source,
|
|
|
|
unsigned nr_bytes)
|
|
|
|
{
|
|
|
|
if ( nr_bytes == 1 )
|
|
|
|
{
|
|
|
|
serial->serial2_timer_reg = *(unsigned8 *)source;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hw_abort (me, "bad write size of %d bytes to SC2TIM.", nr_bytes);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static unsigned
|
|
|
|
mn103ser_io_write_buffer (struct hw *me,
|
|
|
|
const void *source,
|
|
|
|
int space,
|
|
|
|
unsigned_word base,
|
|
|
|
unsigned nr_bytes)
|
|
|
|
{
|
|
|
|
struct mn103ser *serial = hw_data (me);
|
|
|
|
enum serial_register_types serial_reg;
|
|
|
|
HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
|
|
|
|
|
|
|
|
serial_reg = decode_addr (me, serial, base);
|
|
|
|
switch (serial_reg)
|
|
|
|
{
|
|
|
|
/* control registers */
|
|
|
|
case SC0CTR:
|
|
|
|
case SC1CTR:
|
|
|
|
case SC2CTR:
|
|
|
|
HW_TRACE ((me, "write - ctrl reg%d has 0x%x, nrbytes=%d.\n",
|
|
|
|
serial_reg-SC0CTR, *(unsigned8 *)source, nr_bytes));
|
|
|
|
write_control_reg(me, serial, serial_reg-SC0CTR, source, nr_bytes);
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* interrupt mode registers */
|
|
|
|
case SC0ICR:
|
|
|
|
case SC1ICR:
|
|
|
|
case SC2ICR:
|
|
|
|
HW_TRACE ((me, "write - intmode reg%d has 0x%x, nrbytes=%d.\n",
|
|
|
|
serial_reg-SC0ICR, *(unsigned8 *)source, nr_bytes));
|
|
|
|
write_intmode_reg(me, serial, serial_reg-SC0ICR, source, nr_bytes);
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* transmission buffers */
|
|
|
|
case SC0TXB:
|
|
|
|
case SC1TXB:
|
|
|
|
case SC2TXB:
|
|
|
|
HW_TRACE ((me, "write - txb%d has %c, nrbytes=%d.\n",
|
|
|
|
serial_reg-SC0TXB, *(char *)source, nr_bytes));
|
|
|
|
write_txb(me, serial, serial_reg-SC0TXB, source, nr_bytes);
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* reception buffers */
|
|
|
|
case SC0RXB:
|
|
|
|
case SC1RXB:
|
|
|
|
case SC2RXB:
|
|
|
|
hw_abort(me, "Cannot write to reception buffer.");
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* status registers */
|
|
|
|
case SC0STR:
|
|
|
|
case SC1STR:
|
|
|
|
case SC2STR:
|
|
|
|
hw_abort(me, "Cannot write to status register.");
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SC2TIM:
|
|
|
|
HW_TRACE ((me, "read - serial2 timer reg %d (nrbytes=%d)\n",
|
|
|
|
*(unsigned8 *)source, nr_bytes));
|
|
|
|
write_serial2_timer_reg(me, serial, source, nr_bytes);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
hw_abort(me, "invalid address");
|
|
|
|
}
|
|
|
|
|
|
|
|
return nr_bytes;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
const struct hw_descriptor dv_mn103ser_descriptor[] = {
|
|
|
|
{ "mn103ser", mn103ser_finish, },
|
|
|
|
{ NULL },
|
|
|
|
};
|