2018-01-01 05:43:02 +01:00
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# Copyright 2003-2018 Free Software Foundation, Inc.
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2003-01-15 18:46:20 +01:00
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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2007-08-23 20:14:19 +02:00
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# the Free Software Foundation; either version 3 of the License, or
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2003-01-15 18:46:20 +01:00
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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2007-08-23 20:14:19 +02:00
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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2003-01-15 18:46:20 +01:00
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# Please email any bugs, comments, and/or additions to this file to:
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# bug-gdb@gnu.org
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# This file is part of the gdb testsuite.
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#
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# Test floating-point related functionality.
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#
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2016-12-23 17:52:18 +01:00
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if { [prepare_for_testing "failed to prepare" float float.c] } {
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2006-08-10 07:27:22 +02:00
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return -1
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2003-01-15 18:46:20 +01:00
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}
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# Set it up at a breakpoint so we have its registers.
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if ![runto_main] then {
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perror "couldn't run to breakpoint"
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continue
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}
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# Test "info float".
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2015-07-07 17:58:20 +02:00
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if { [is_aarch64_target] } then {
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2014-01-15 23:17:53 +01:00
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gdb_test "info float" "d0.*d1.*d31.*s0.*s1.*s31.*" "info float"
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} elseif { [istarget "alpha*-*-*"] } then {
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2003-06-02 18:49:35 +02:00
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gdb_test "info float" "f0.*" "info float"
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2015-07-07 17:58:19 +02:00
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} elseif { [is_aarch32_target] } then {
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2008-05-08 18:30:53 +02:00
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gdb_test_multiple "info float" "info float" {
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-re "Software FPU type.*mask:.*flags:.*$gdb_prompt $" {
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pass "info float (FPA)"
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}
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* NEWS: Mention ARM VFP support.
* target-descriptions.c (tdesc_register_type): Make public.
(tdesc_unnumbered_register): New function.
(tdesc_register_reggroup_p): Allow missing
pseudo_register_reggroup_p.
* target-descriptions.h (tdesc_register_type): Declare.
(tdesc_unnumbered_register): Declare.
* arm-tdep.c (arm_neon_quad_read, arm_neon_quad_write): New functions.
(arm_push_dummy_call): Use arm_neon_quad_write.
(arm_neon_double_type, arm_neon_quad_type): New functions.
(arm_register_type): Handle VFP and NEON registers. Override the
types of double-precision registers for NEON. Disable FPA registers
if they are not present.
(arm_dwarf_reg_to_regnum): Add current VFP and NEON register numbers.
(arm_return_value): Use arm_neon_quad_write and arm_neon_quad_read.
(arm_register_name): Handle VFP single and NEON quad registers.
(arm_pseudo_read, arm_pseudo_write): New functions.
(arm_gdbarch_init): Check for VFP and NEON in the target description.
Assign numbers to double-precision registers. Register VFP and NEON
pseudo registers. Remove a shadowed "i" variable.
* arm-tdep.h (enum gdb_regnum): Add ARM_D0_REGNUM and
ARM_D31_REGNUM.
(struct gdbarch_tdep): Add have_neon_pseudos, have_neon,
have_vfp_registers, have_vfp_pseudos, neon_double_type,
and neon_quad_type.
* features/Makefile: Make expedite settings only architecture
specific.
(WHICH): Add new ARM descriptions.
* features/arm-with-neon.xml, features/arm-with-vfpv2.c,
features/arm-with-vfpv3.c, features/arm-vfpv2.xml,
features/arm-vfpv3.xml, features/arm-with-vfpv2.xml,
features/arm-with-vfpv3.xml, features/arm-with-neon.c: New files.
* regformats/arm-with-neon.dat, regformats/arm-with-vfpv2.dat,
regformats/arm-with-vfpv3.dat: Generate.
doc/
* gdb.texinfo (ARM Features): Document org.gnu.gdb.arm.vfp and
org.gnu.gdb.arm.neon.
gdbserver/
* linux-low.c (linux_write_memory): Update debugging output.
* Makefile.in (clean): Add new descriptions.
(arm-with-vfpv2.o, arm-with-vfpv2.c, arm-with-vfpv3.o)
(arm-with-vfpv3.c, arm-with-neon.o, arm-with-neon.c): New rules.
* configure.srv: Add new files for arm*-*-linux*.
* linux-arm-low.c: Add new declarations.
(PTRACE_GETVFPREGS, PTRACE_SETVFPREGS): Define if undefined.
(arm_hwcap, HWCAP_VFP, HWCAP_IWMMXT, HWCAP_NEON, HWCAP_VFPv3)
(HWCAP_VFPv3D16): New.
(arm_fill_wmmxregset, arm_store_wmmxregset): Check HWCAP_IWMMXT
instead of __IWMMXT__.
(arm_fill_vfpregset, arm_store_vfpregset, arm_get_hwcap)
(arm_arch_setup): New.
(target_regsets): Remove #ifdef. Add VFP regset.
(the_low_target): Use arm_arch_setup.
testsuite/
* gdb.base/float.exp: Handle VFP registers.
2009-07-28 20:26:51 +02:00
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-re "fpscr.*s0.*s1.*s31.*$gdb_prompt $" {
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# Only check for single precision; d0 might be a vector register
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# if we have NEON.
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pass "info float (VFP)"
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}
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2017-05-18 17:31:40 +02:00
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-re "No floating.point info available for this processor.*$gdb_prompt $" {
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2008-05-08 18:30:53 +02:00
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pass "info float (without FPU)"
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}
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}
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2003-05-31 21:48:39 +02:00
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} elseif { [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] } then {
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2003-01-15 18:46:20 +01:00
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gdb_test "info float" "R7:.*Status Word:.*Opcode:.*" "info float"
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2003-06-12 19:55:06 +02:00
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} elseif [istarget "ia64-*-*"] then {
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gdb_test "info float" "f0.*f1.*f127.*" "info float"
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2003-07-07 00:27:34 +02:00
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} elseif [istarget "m68k-*-*"] then {
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2008-01-22 22:30:02 +01:00
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gdb_test_multiple "info float" "info_float" {
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-re "fp0.*fp1.*fp7.*$gdb_prompt $" {
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pass "info float (with FPU)"
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}
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2017-05-18 17:31:40 +02:00
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-re "No floating.point info available for this processor.*$gdb_prompt $" {
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2008-01-22 22:30:02 +01:00
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pass "info float (without FPU)"
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}
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}
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2004-06-08 17:50:59 +02:00
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} elseif [istarget "mips*-*-*"] then {
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2014-12-18 13:47:28 +01:00
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gdb_test_multiple "info float" "info float" {
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-re "fpu type: none / unused\r\n$gdb_prompt $" {
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pass "info float (without FPU)"
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}
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-re "fpu type:.*cause.*mask.*flags.*round.*flush.*f0:.*flt:.*dbl:.*$gdb_prompt $" {
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pass "info float (with FPU)"
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}
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}
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2016-06-17 09:25:08 +02:00
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} elseif [istarget "nds32*-*-*"] then {
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gdb_test_multiple "info float" "info_float" {
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-re "fd0.*fd3.*$gdb_prompt $" {
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pass "info float (with FPU)"
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}
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2017-05-18 17:31:40 +02:00
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-re "No floating.point info available for this processor.*$gdb_prompt $" {
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2016-06-17 09:25:08 +02:00
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pass "info float (without FPU)"
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}
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}
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2005-03-07 22:37:25 +01:00
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} elseif [istarget "powerpc*-*-*"] then {
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2008-01-22 22:30:02 +01:00
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gdb_test_multiple "info float" "info_float" {
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-re "f0.*f1.*f31.*fpscr.*$gdb_prompt $" {
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pass "info float (with FPU)"
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}
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2017-05-18 17:31:40 +02:00
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-re "No floating.point info available for this processor.*$gdb_prompt $" {
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2008-01-22 22:30:02 +01:00
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pass "info float (without FPU)"
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}
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}
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2004-02-17 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
Committed by Jim Blandy <jimb@redhat.com>.
* config/s390/nm-linux.h: Update comments. Do not include "solib.h".
(KERNEL_U_ADDR, REGISTER_U_ADDR, U_REGS_OFFSET): Remove.
(FETCH_INFERIOR_REGISTERS): Define.
* config/s390/s390.mh (NATDEPFILES): Remove core-aout.o and
core-regset.o.
* config/s390/s390x.mt: Remove.
* config/s390/tm-s390.h: Remove.
* config/s390/tm-linux.h: Do not include "s390/tm-s390.h".
(TARGET_ELF64): Remove.
(SKIP_TRAMPOLINE_CODE): Do not undefine.
* configure.tgt [s390-*-*, s390x-*-*]: Merge into single
s390*-*-* case; always set gdb_target to s390.
* regformats/reg-s390.dat: Remove control registers.
* regformats/reg-s390x.dat: Likewise.
* s390-tdep.h: New file.
* s390-nat.c: Do not include <asm/processor.h> or <value.h>.
Include "inferior.h" and "s390-tdep.h".
Remove private definition of offsetof.
(s390_register_u_addr): Remove.
(regmap_gregset, regmap_fpregset): Define.
(supply_gregset, fill_gregset): Reimplement.
(supply_fpregset, fill_fpregset): Likewise.
(s390_inferior_tid): New function.
(fetch_regs, store_regs, fetch_fpregs, store_fpregs): Likewise.
(fetch_inferior_registers, store_inferior_registers): Likewise.
* s390-tdep.c: Do not define S390_TDEP. Include "defs.h" instead
of <defs.h>. Include "reggroups.h", "regset.h", and "s390-tdep.h".
Global replace of S390_GP0_REGNUM by S390_R0_REGNUM.
Global replace of S390_FP0_REGNUM by S390_F0_REGNUM.
(struct gdbarch_tdep): Define.
(struct s390_register_info): Define.
(s390_register_info): New variable.
(s390_register_name): Reimplement.
(s390_register_type): New function.
(s390_register_raw_size, s390x_register_raw_size): Remove.
(s390_cannot_fetch_register): Remove.
(s390_register_byte): Remove.
(s390_register_virtual_type, s390x_register_virtual_type): Remove.
(s390_dwarf_regmap): New variable.
(s390_dwarf_reg_to_regnum): New function.
(s390_stab_reg_to_regnum): Remove.
(s390_pseudo_register_read, s390_pseudo_register_write): New functions.
(s390x_pseudo_register_read, s390x_pseudo_register_write): Likewise.
(s390_convert_register_p): Likewise.
(s390_register_to_value, s390_value_to_register): Likewise.
(s390_register_reggroup_p): Likewise.
(s390_regmap_gregset, s390x_regmap_gregset, s390_regmap_fpregset,
s390_gregset, s390x_gregset, s390_fpregset): New variables.
(s390_supply_regset, s390_regset_from_core_section): New functions.
(GDB_TARGET_IS_ESAME): Move here from tm-s390.h.
(S390_FPR_SIZE): Likewise.
(S390_GPR_SIZE): Likewise. Redefine in terms of GDB_TARGET_IS_ESAME.
Global replace of DEPRECATED_REGISTER_SIZE by S390_GPR_SIZE.
(S390_NUM_GPRS): Move here from tm-s390.h.
(S390_NUM_FPRS): Likewise.
(s390_in_function_epilogue_p): New function.
(s390_is_sigreturn): Replace S390_PSW_ADDR_SIZE by S390_GPR_SIZE.
Replace S390_PC_REGNUM by S390_PSWA_REGNUM.
(s390_gdbarch_init): Allocate and set up gdbarch_tdep structure.
Replace s390_stab_reg_to_regnum by s390_dwarf_reg_to_regnum.
Replace S390_FP_REGNUM by S390_SP_REGNUM.
Remove calls to:
set_gdbarch_deprecated_max_register_raw_size,
set_gdbarch_deprecated_max_register_virtual_size,
set_gdbarch_deprecated_register_byte,
set_gdbarch_cannot_fetch_register,
set_gdbarch_cannot_store_register,
set_gdbarch_deprecated_register_size,
set_gdbarch_deprecated_register_raw_size,
set_gdbarch_deprecated_register_virtual_size,
set_gdbarch_deprecated_register_virtual_type,
set_gdbarch_deprecated_register_bytes.
Add calls to:
set_gdbarch_num_pseudo_regs,
set_gdbarch_register_type,
set_gdbarch_convert_register_p,
set_gdbarch_register_to_value,
set_gdbarch_value_to_register,
set_gdbarch_register_reggroup_p,
set_gdbarch_regset_from_core_section,
set_gdbarch_pseudo_register_read,
set_gdbarch_pseudo_register_write,
set_gdbarch_in_function_epilogue_p.
* Makefile.in (s390-nat.o, s390-tdep.o): Update dependencies.
(s390_tdep_h): New variable.
2004-02-18 04:42:51 +01:00
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} elseif [istarget "s390*-*-*"] then {
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gdb_test "info float" "fpc.*f0.*f1.*f15.*" "info float"
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2003-08-13 00:27:19 +02:00
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} elseif [istarget "sh*-*"] then {
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# SH may or may not have an FPU
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gdb_test_multiple "info float" "info float" {
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-re "fpul.*fr0.*fr1.*fr15.*$gdb_prompt $" {
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pass "info float (with FPU)"
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}
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2017-05-18 17:31:40 +02:00
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-re "No floating.point info available for this processor.*$gdb_prompt $" {
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2003-08-13 00:27:19 +02:00
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pass "info float (without FPU)"
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}
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}
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2004-06-08 07:15:19 +02:00
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} elseif [istarget "hppa*-*"] then {
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gdb_test "info float" "fr4.*fr4R.*fr31R.*" "info float"
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2006-04-05 01:17:41 +02:00
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} elseif [istarget "sparc*-*-*"] then {
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gdb_test "info float" "f0.*f1.*f31.*d0.*d30.*" "info float"
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gdb: Initial baremetal riscv support
This commit introduces basic support for baremetal RiscV as a GDB
target. This target is currently only tested against the RiscV software
simulator, which is not included as part of this commit. The target has
been tested against the following RiscV variants: rv32im, rv32imc,
rv32imf, rv32imfc, rv64im, rv64imc, rv64imfd, rv64imfdc.
Across these variants we pass on average 34858 tests, and fail 272
tests, which is ~0.8%.
The RiscV has a feature of its ABI where structures with a single
floating point field, a single complex float field, or one float and
one integer field are treated differently for argument passing. The
new test gdb.base/infcall-nested-structs.exp is added to cover this
feature. As passing these structures should work on all targets then
I've made the test as a generic one, even though, for most targets,
there's probably nothing special about any of these cases.
gdb/ChangeLog:
* Makefile.in (ALL_TARGET_OBS): Add riscv-tdep.o
(HFILES_NO_SRCDIR): Add riscv-tdep.h.
(ALLDEPFILES): Add riscv-tdep.c
* configure.tgt: Add riscv support.
* riscv-tdep.c: New file.
* riscv-tdep.h: New file.
* NEWS: Mention new target.
* MAINTAINERS: Add entry for riscv.
gdb/testsuite/ChangeLog:
* gdb.base/infcall-nested-structs.exp: New file.
* gdb.base/infcall-nested-structs.c: New file.
* gdb.base/float.exp: Add riscv support.
2017-11-09 21:59:13 +01:00
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} elseif [istarget "riscv*-*-*"] then {
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gdb_test "info float" "ft0.*ft1.*ft11.*fflags.*frm.*fcsr.*" "info float"
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2003-01-15 18:46:20 +01:00
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} else {
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2004-06-08 07:15:19 +02:00
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gdb_test "info float" "No floating.point info available for this processor." "info float (unknown target)"
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2003-01-15 18:46:20 +01:00
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}
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2011-08-01 18:02:03 +02:00
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gdb_test "step"
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gdb_test "finish" "Value returned is .* = (inf|nan).*"
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