2011-08-14 16:03:45 +02:00
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/* Target dependent code for GDB on TI C6x systems.
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2015-01-01 10:32:14 +01:00
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Copyright (C) 2010-2015 Free Software Foundation, Inc.
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2011-08-14 16:03:45 +02:00
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Contributed by Andrew Jenner <andrew@codesourcery.com>
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Contributed by Yao Qi <yao@codesourcery.com>
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "frame.h"
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#include "frame-unwind.h"
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#include "frame-base.h"
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#include "trad-frame.h"
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#include "dwarf2-frame.h"
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#include "symtab.h"
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#include "inferior.h"
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#include "gdbtypes.h"
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#include "gdbcore.h"
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#include "gdbcmd.h"
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#include "target.h"
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#include "dis-asm.h"
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#include "regcache.h"
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#include "value.h"
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#include "symfile.h"
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#include "arch-utils.h"
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#include "floatformat.h"
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#include "glibc-tdep.h"
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#include "infcall.h"
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#include "regset.h"
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#include "tramp-frame.h"
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#include "linux-tdep.h"
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#include "solib.h"
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#include "objfiles.h"
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#include "osabi.h"
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#include "tic6x-tdep.h"
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#include "language.h"
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#include "target-descriptions.h"
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#include "features/tic6x-c64xp.c"
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#include "features/tic6x-c64x.c"
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#include "features/tic6x-c62x.c"
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#define TIC6X_OPCODE_SIZE 4
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#define TIC6X_FETCH_PACKET_SIZE 32
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#define INST_S_BIT(INST) ((INST >> 1) & 1)
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#define INST_X_BIT(INST) ((INST >> 12) & 1)
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2011-08-16 06:15:23 +02:00
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const gdb_byte tic6x_bkpt_illegal_opcode_be[] = { 0x56, 0x45, 0x43, 0x14 };
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const gdb_byte tic6x_bkpt_illegal_opcode_le[] = { 0x14, 0x43, 0x45, 0x56 };
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2011-08-14 16:03:45 +02:00
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struct tic6x_unwind_cache
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{
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/* The frame's base, optionally used by the high-level debug info. */
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CORE_ADDR base;
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/* The previous frame's inner most stack address. Used as this
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frame ID's stack_addr. */
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CORE_ADDR cfa;
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/* The address of the first instruction in this function */
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CORE_ADDR pc;
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/* Which register holds the return address for the frame. */
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int return_regnum;
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/* The offset of register saved on stack. If register is not saved, the
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corresponding element is -1. */
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CORE_ADDR reg_saved[TIC6X_NUM_CORE_REGS];
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};
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/* Name of TI C6x core registers. */
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static const char *const tic6x_register_names[] =
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{
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"A0", "A1", "A2", "A3", /* 0 1 2 3 */
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"A4", "A5", "A6", "A7", /* 4 5 6 7 */
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"A8", "A9", "A10", "A11", /* 8 9 10 11 */
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"A12", "A13", "A14", "A15", /* 12 13 14 15 */
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"B0", "B1", "B2", "B3", /* 16 17 18 19 */
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"B4", "B5", "B6", "B7", /* 20 21 22 23 */
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"B8", "B9", "B10", "B11", /* 24 25 26 27 */
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"B12", "B13", "B14", "B15", /* 28 29 30 31 */
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"CSR", "PC", /* 32 33 */
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};
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/* This array maps the arguments to the register number which passes argument
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in function call according to C6000 ELF ABI. */
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static const int arg_regs[] = { 4, 20, 6, 22, 8, 24, 10, 26, 12, 28 };
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/* This is the implementation of gdbarch method register_name. */
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static const char *
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tic6x_register_name (struct gdbarch *gdbarch, int regno)
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{
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if (regno < 0)
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return NULL;
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if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
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return tdesc_register_name (gdbarch, regno);
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else if (regno >= ARRAY_SIZE (tic6x_register_names))
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return "";
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else
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return tic6x_register_names[regno];
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}
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/* This is the implementation of gdbarch method register_type. */
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static struct type *
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tic6x_register_type (struct gdbarch *gdbarch, int regno)
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{
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if (regno == TIC6X_PC_REGNUM)
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return builtin_type (gdbarch)->builtin_func_ptr;
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else
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return builtin_type (gdbarch)->builtin_uint32;
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}
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static void
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tic6x_setup_default (struct tic6x_unwind_cache *cache)
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{
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int i;
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for (i = 0; i < TIC6X_NUM_CORE_REGS; i++)
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cache->reg_saved[i] = -1;
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}
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static unsigned long tic6x_fetch_instruction (struct gdbarch *, CORE_ADDR);
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static int tic6x_register_number (int reg, int side, int crosspath);
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/* Do a full analysis of the prologue at START_PC and update CACHE accordingly.
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Bail out early if CURRENT_PC is reached. Returns the address of the first
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instruction after the prologue. */
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2012-03-02 01:06:13 +01:00
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static CORE_ADDR
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2011-08-14 16:03:45 +02:00
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tic6x_analyze_prologue (struct gdbarch *gdbarch, const CORE_ADDR start_pc,
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const CORE_ADDR current_pc,
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struct tic6x_unwind_cache *cache,
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struct frame_info *this_frame)
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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unsigned long inst;
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unsigned int src_reg, base_reg, dst_reg;
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int i;
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CORE_ADDR pc = start_pc;
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CORE_ADDR return_pc = start_pc;
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int frame_base_offset_to_sp = 0;
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/* Counter of non-stw instructions after first insn ` sub sp, xxx, sp'. */
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int non_stw_insn_counter = 0;
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if (start_pc >= current_pc)
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return_pc = current_pc;
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cache->base = 0;
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/* The landmarks in prologue is one or two SUB instructions to SP.
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Instructions on setting up dsbt are in the last part of prologue, if
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needed. In maxim, prologue can be divided to three parts by two
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`sub sp, xx, sp' insns. */
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/* Step 1: Look for the 1st and 2nd insn `sub sp, xx, sp', in which, the
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2nd one is optional. */
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while (pc < current_pc)
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{
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int offset = 0;
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unsigned long inst = tic6x_fetch_instruction (gdbarch, pc);
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if ((inst & 0x1ffc) == 0x1dc0 || (inst & 0x1ffc) == 0x1bc0
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|| (inst & 0x0ffc) == 0x9c0)
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{
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/* SUBAW/SUBAH/SUB, and src1 is ucst 5. */
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unsigned int src2 = tic6x_register_number ((inst >> 18) & 0x1f,
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INST_S_BIT (inst), 0);
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unsigned int dst = tic6x_register_number ((inst >> 23) & 0x1f,
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INST_S_BIT (inst), 0);
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if (src2 == TIC6X_SP_REGNUM && dst == TIC6X_SP_REGNUM)
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{
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/* Extract const from insn SUBAW/SUBAH/SUB, and translate it to
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offset. The constant offset is decoded in bit 13-17 in all
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these three kinds of instructions. */
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unsigned int ucst5 = (inst >> 13) & 0x1f;
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if ((inst & 0x1ffc) == 0x1dc0) /* SUBAW */
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frame_base_offset_to_sp += ucst5 << 2;
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else if ((inst & 0x1ffc) == 0x1bc0) /* SUBAH */
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frame_base_offset_to_sp += ucst5 << 1;
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else if ((inst & 0x0ffc) == 0x9c0) /* SUB */
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frame_base_offset_to_sp += ucst5;
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else
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gdb_assert_not_reached ("unexpected instruction");
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return_pc = pc + 4;
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}
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}
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else if ((inst & 0x174) == 0x74) /* stw SRC, *+b15(uconst) */
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{
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/* The y bit determines which file base is read from. */
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base_reg = tic6x_register_number ((inst >> 18) & 0x1f,
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(inst >> 7) & 1, 0);
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if (base_reg == TIC6X_SP_REGNUM)
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{
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src_reg = tic6x_register_number ((inst >> 23) & 0x1f,
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INST_S_BIT (inst), 0);
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cache->reg_saved[src_reg] = ((inst >> 13) & 0x1f) << 2;
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return_pc = pc + 4;
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}
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non_stw_insn_counter = 0;
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}
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else
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{
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non_stw_insn_counter++;
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/* Following instruction sequence may be emitted in prologue:
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<+0>: subah .D2 b15,28,b15
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<+4>: or .L2X 0,a4,b0
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<+8>: || stw .D2T2 b14,*+b15(56)
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<+12>:[!b0] b .S1 0xe50e4c1c <sleep+220>
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<+16>:|| stw .D2T1 a10,*+b15(48)
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<+20>:stw .D2T2 b3,*+b15(52)
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<+24>:stw .D2T1 a4,*+b15(40)
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we should look forward for next instruction instead of breaking loop
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here. So far, we allow almost two sequential non-stw instructions
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in prologue. */
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if (non_stw_insn_counter >= 2)
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break;
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}
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pc += 4;
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}
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/* Step 2: Skip insn on setting up dsbt if it is. Usually, it looks like,
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ldw .D2T2 *+b14(0),b14 */
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inst = tic6x_fetch_instruction (gdbarch, pc);
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/* The s bit determines which file dst will be loaded into, same effect as
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other places. */
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dst_reg = tic6x_register_number ((inst >> 23) & 0x1f, (inst >> 1) & 1, 0);
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/* The y bit (bit 7), instead of s bit, determines which file base be
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used. */
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base_reg = tic6x_register_number ((inst >> 18) & 0x1f, (inst >> 7) & 1, 0);
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if ((inst & 0x164) == 0x64 /* ldw */
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&& dst_reg == TIC6X_DP_REGNUM /* dst is B14 */
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&& base_reg == TIC6X_DP_REGNUM) /* baseR is B14 */
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{
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return_pc = pc + 4;
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}
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if (this_frame)
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{
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cache->base = get_frame_register_unsigned (this_frame, TIC6X_SP_REGNUM);
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if (cache->reg_saved[TIC6X_FP_REGNUM] != -1)
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{
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/* If the FP now holds an offset from the CFA then this is a frame
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which uses the frame pointer. */
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cache->cfa = get_frame_register_unsigned (this_frame,
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TIC6X_FP_REGNUM);
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}
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else
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{
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/* FP doesn't hold an offset from the CFA. If SP still holds an
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offset from the CFA then we might be in a function which omits
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the frame pointer. */
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cache->cfa = cache->base + frame_base_offset_to_sp;
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}
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}
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/* Adjust all the saved registers such that they contain addresses
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instead of offsets. */
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for (i = 0; i < TIC6X_NUM_CORE_REGS; i++)
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if (cache->reg_saved[i] != -1)
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cache->reg_saved[i] = cache->base + cache->reg_saved[i];
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return return_pc;
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}
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/* This is the implementation of gdbarch method skip_prologue. */
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2012-03-02 01:06:13 +01:00
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static CORE_ADDR
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2011-08-14 16:03:45 +02:00
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tic6x_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
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{
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CORE_ADDR func_addr;
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struct tic6x_unwind_cache cache;
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/* See if we can determine the end of the prologue via the symbol table.
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If so, then return either PC, or the PC after the prologue, whichever is
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greater. */
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if (find_pc_partial_function (start_pc, NULL, &func_addr, NULL))
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{
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CORE_ADDR post_prologue_pc
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= skip_prologue_using_sal (gdbarch, func_addr);
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if (post_prologue_pc != 0)
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return max (start_pc, post_prologue_pc);
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}
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/* Can't determine prologue from the symbol table, need to examine
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instructions. */
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return tic6x_analyze_prologue (gdbarch, start_pc, (CORE_ADDR) -1, &cache,
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NULL);
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}
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/* This is the implementation of gdbarch method breakpiont_from_pc. */
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-Wpointer-sign: char -> gdb_byte.
-Wpointer-sign catches all these cases across the codebase that should
be using gdb_byte for raw target bytes. I think these are all
obvious, hence I've collapsed into a single patch.
gdb/
2013-04-19 Pedro Alves <palves@redhat.com>
* aarch64-tdep.c (aarch64_default_breakpoint): Change type to
gdb_byte[].
(aarch64_breakpoint_from_pc): Change return type to gdb_byte *.
* ada-lang.c (ada_value_assign): Use gdb_byte.
* alphanbsd-tdep.c (sigtramp_retcode): Change type to gdb_byte[].
(alphanbsd_sigtramp_offset): Use gdb_byte.
* arm-linux-tdep.c (arm_linux_arm_le_breakpoint)
(arm_linux_arm_be_breakpoint, eabi_linux_arm_le_breakpoint)
(eabi_linux_arm_be_breakpoint, arm_linux_thumb_be_breakpoint)
(arm_linux_thumb_le_breakpoint, arm_linux_thumb2_be_breakpoint)
(arm_linux_thumb2_le_breakpoint): Change type to gdb_byte[].
* arm-tdep.c (arm_stub_unwind_sniffer)
(arm_displaced_init_closure): Use gdb_byte.
(arm_default_arm_le_breakpoint, arm_default_arm_be_breakpoint)
(arm_default_thumb_le_breakpoint)
(arm_default_thumb_be_breakpoint): Change type to gdb_byte[].
* arm-tdep.h (struct gdbarch_tdep) <arm_breakpoint,
thumb_breakpoint, thumb2_breakpoint>: Change type to gdb_byte *.
* arm-wince-tdep.c (arm_wince_le_breakpoint)
(arm_wince_thumb_le_breakpoint): Change type to gdb_byte[].
* armnbsd-tdep.c (arm_nbsd_arm_le_breakpoint)
(arm_nbsd_arm_be_breakpoint, arm_nbsd_thumb_le_breakpoint)
(arm_nbsd_thumb_be_breakpoint): Change type to gdb_byte[].
* armobsd-tdep.c (arm_obsd_thumb_le_breakpoint)
(arm_obsd_thumb_be_breakpoint): Change type to gdb_byte[].
* cris-tdep.c (push_stack_item, cris_push_dummy_call)
(cris_store_return_value, cris_extract_return_value): Use
gdb_byte.
(constraint): Change type of parameter to char * from signed
char*. Use gdb_byte.
* dwarf2loc.c (read_pieced_value, write_pieced_value): Change type
of local buffer to gdb_byte *.
* dwarf2read.c (read_index_from_section): Use gdb_byte.
(create_dwp_hash_table): Change type of locals to gdb_byte *.
(add_address_entry): Change type of local buffer to gdb_byte[].
* frv-tdep.c (frv_adjust_breakpoint_address, find_func_descr)
(frv_push_dummy_call): Use gdb_byte.
* hppa-hpux-tdep.c (hppa_hpux_push_dummy_code)
(hppa_hpux_supply_ss_fpblock, hppa_hpux_supply_ss_wide)
(hppa_hpux_supply_save_state): Use gdb_byte.
* hppa-tdep.c (hppa32_push_dummy_call)
(hppa64_convert_code_addr_to_fptr): Use gdb_byte.
* ia64-tdep.c (extract_bit_field, replace_bit_field)
(slotN_contents, replace_slotN_contents): Change type of parameter
to gdb_byte *.
(fetch_instruction, ia64_pseudo_register_write)
(ia64_register_to_value, ia64_value_to_register)
(ia64_extract_return_value, ia64_store_return_value)
(ia64_push_dummy_call): Use gdb_byte.
* m32c-tdep.c (m32c_return_value): Remove cast.
* m68hc11-tdep.c (m68hc11_pseudo_register_write)
(m68hc11_push_dummy_call, m68hc11_store_return_value): Use
gdb_byte.
* mipsnbsd-tdep.c (mipsnbsd_get_longjmp_target): Use gdb_byte.
* mn10300-tdep.c (mn10300_store_return_value)
(mn10300_breakpoint_from_pc, mn10300_push_dummy_call): Use
gdb_byte.
* moxie-tdep.c (moxie_process_readu): Use gdb_byte.
(moxie_process_record): Remove casts.
* ppc-ravenscar-thread.c (supply_register_at_address)
(ppc_ravenscar_generic_store_registers): Use gdb_byte.
* ravenscar-thread.c (get_running_thread_id): Use gdb_byte.
* remote-m32r-sdi.c (m32r_fetch_register): Use gdb_byte.
* remote-mips.c (mips_xfer_memory): Use gdb_byte.
* remote.c (compare_sections_command): Use gdb_byte.
* score-tdep.c (score7_free_memblock): Change type of parameter to
gdb_byte *.
* sh-tdep.c (sh_justify_value_in_reg): Change return type to
gdb_byte *. Use gdb_byte.
(sh_push_dummy_call_fpu): Use gdb_byte.
(sh_extract_return_value_nofpu, sh_extract_return_value_fpu)
(sh_store_return_value_nofpu, sh_store_return_value_fpu)
(sh_register_convert_to_virtual, sh_register_convert_to_raw):
Change parameter type to 'gdb_byte *'. Use gdb_byte.
(sh_pseudo_register_read, sh_pseudo_register_write): Use gdb_byte.
* sh64-tdep.c (sh64_push_dummy_call): Use gdb_byte.
(sh64_store_return_value, sh64_register_convert_to_virtual):
Change parameter type to 'gdb_byte *'. Use gdb_byte.
(sh64_pseudo_register_write): Use gdb_byte.
* solib-darwin.c (darwin_current_sos): Add casts to 'gdb_byte *'.
* solib-irix.c (fetch_lm_info): Likewise. Use gdb_byte for byte
buffer.
(irix_current_sos): Use gdb_byte.
* solib-som.c (som_current_sos): Use gdb_byte.
* sparc-ravenscar-thread.c (supply_register_at_address)
(sparc_ravenscar_generic_store_registers): Use gdb_byte.
* spu-multiarch.c (spu_xfer_partial): Add cast to 'char *'.
* spu-tdep.c (spu_get_overlay_table): Use gdb_byte.
* tic6x-tdep.c (tic6x_breakpoint_from_pc): Change return type to
'gdb_byte *'.
* tic6x-tdep.h (struct gdbarch_tdep) <breakpoint>: Change type to
'gdb_byte *'.
* tracepoint.c (tfile_fetch_registers): Use gdb_byte.
* xstormy16-tdep.c (xstormy16_extract_return_value)
(xstormy16_store_return_value): Change parameter type to
'gdb_byte *'. Adjust.
(xstormy16_push_dummy_call): Use gdb_byte.
* xtensa-tdep.c (xtensa_scan_prologue, call0_ret)
(call0_analyze_prologue, execute_code): Use gdb_byte.
2013-04-19 17:09:46 +02:00
|
|
|
static const gdb_byte *
|
2011-08-14 16:03:45 +02:00
|
|
|
tic6x_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr,
|
|
|
|
int *bp_size)
|
|
|
|
{
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
*bp_size = 4;
|
|
|
|
|
|
|
|
if (tdep == NULL || tdep->breakpoint == NULL)
|
|
|
|
{
|
|
|
|
if (BFD_ENDIAN_BIG == gdbarch_byte_order_for_code (gdbarch))
|
|
|
|
return tic6x_bkpt_illegal_opcode_be;
|
|
|
|
else
|
|
|
|
return tic6x_bkpt_illegal_opcode_le;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
return tdep->breakpoint;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This is the implementation of gdbarch method print_insn. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
tic6x_print_insn (bfd_vma memaddr, disassemble_info *info)
|
|
|
|
{
|
|
|
|
return print_insn_tic6x (memaddr, info);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
tic6x_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
|
|
|
|
struct dwarf2_frame_state_reg *reg,
|
|
|
|
struct frame_info *this_frame)
|
|
|
|
{
|
|
|
|
/* Mark the PC as the destination for the return address. */
|
|
|
|
if (regnum == gdbarch_pc_regnum (gdbarch))
|
|
|
|
reg->how = DWARF2_FRAME_REG_RA;
|
|
|
|
|
|
|
|
/* Mark the stack pointer as the call frame address. */
|
|
|
|
else if (regnum == gdbarch_sp_regnum (gdbarch))
|
|
|
|
reg->how = DWARF2_FRAME_REG_CFA;
|
|
|
|
|
|
|
|
/* The above was taken from the default init_reg in dwarf2-frame.c
|
|
|
|
while the below is c6x specific. */
|
|
|
|
|
|
|
|
/* Callee save registers. The ABI designates A10-A15 and B10-B15 as
|
|
|
|
callee-save. */
|
|
|
|
else if ((regnum >= 10 && regnum <= 15) || (regnum >= 26 && regnum <= 31))
|
|
|
|
reg->how = DWARF2_FRAME_REG_SAME_VALUE;
|
|
|
|
else
|
|
|
|
/* All other registers are caller-save. */
|
|
|
|
reg->how = DWARF2_FRAME_REG_UNDEFINED;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This is the implementation of gdbarch method unwind_pc. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
tic6x_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
|
|
{
|
|
|
|
gdb_byte buf[8];
|
|
|
|
|
|
|
|
frame_unwind_register (next_frame, TIC6X_PC_REGNUM, buf);
|
|
|
|
return extract_typed_address (buf, builtin_type (gdbarch)->builtin_func_ptr);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This is the implementation of gdbarch method unwind_sp. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
tic6x_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
|
|
|
{
|
|
|
|
return frame_unwind_register_unsigned (this_frame, TIC6X_SP_REGNUM);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Frame base handling. */
|
|
|
|
|
2012-03-02 01:06:13 +01:00
|
|
|
static struct tic6x_unwind_cache*
|
2011-08-14 16:03:45 +02:00
|
|
|
tic6x_frame_unwind_cache (struct frame_info *this_frame,
|
|
|
|
void **this_prologue_cache)
|
|
|
|
{
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (this_frame);
|
|
|
|
CORE_ADDR current_pc;
|
|
|
|
struct tic6x_unwind_cache *cache;
|
|
|
|
|
|
|
|
if (*this_prologue_cache)
|
|
|
|
return *this_prologue_cache;
|
|
|
|
|
|
|
|
cache = FRAME_OBSTACK_ZALLOC (struct tic6x_unwind_cache);
|
|
|
|
(*this_prologue_cache) = cache;
|
|
|
|
|
|
|
|
cache->return_regnum = TIC6X_RA_REGNUM;
|
|
|
|
|
|
|
|
tic6x_setup_default (cache);
|
|
|
|
|
|
|
|
cache->pc = get_frame_func (this_frame);
|
|
|
|
current_pc = get_frame_pc (this_frame);
|
|
|
|
|
|
|
|
/* Prologue analysis does the rest... */
|
|
|
|
if (cache->pc != 0)
|
|
|
|
tic6x_analyze_prologue (gdbarch, cache->pc, current_pc, cache, this_frame);
|
|
|
|
|
|
|
|
return cache;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
tic6x_frame_this_id (struct frame_info *this_frame, void **this_cache,
|
|
|
|
struct frame_id *this_id)
|
|
|
|
{
|
|
|
|
struct tic6x_unwind_cache *cache =
|
|
|
|
tic6x_frame_unwind_cache (this_frame, this_cache);
|
|
|
|
|
|
|
|
/* This marks the outermost frame. */
|
|
|
|
if (cache->base == 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
(*this_id) = frame_id_build (cache->cfa, cache->pc);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct value *
|
|
|
|
tic6x_frame_prev_register (struct frame_info *this_frame, void **this_cache,
|
|
|
|
int regnum)
|
|
|
|
{
|
|
|
|
struct tic6x_unwind_cache *cache =
|
|
|
|
tic6x_frame_unwind_cache (this_frame, this_cache);
|
|
|
|
|
|
|
|
gdb_assert (regnum >= 0);
|
|
|
|
|
|
|
|
/* The PC of the previous frame is stored in the RA register of
|
|
|
|
the current frame. Frob regnum so that we pull the value from
|
|
|
|
the correct place. */
|
|
|
|
if (regnum == TIC6X_PC_REGNUM)
|
|
|
|
regnum = cache->return_regnum;
|
|
|
|
|
|
|
|
if (regnum == TIC6X_SP_REGNUM && cache->cfa)
|
|
|
|
return frame_unwind_got_constant (this_frame, regnum, cache->cfa);
|
|
|
|
|
|
|
|
/* If we've worked out where a register is stored then load it from
|
|
|
|
there. */
|
|
|
|
if (regnum < TIC6X_NUM_CORE_REGS && cache->reg_saved[regnum] != -1)
|
|
|
|
return frame_unwind_got_memory (this_frame, regnum,
|
|
|
|
cache->reg_saved[regnum]);
|
|
|
|
|
|
|
|
return frame_unwind_got_register (this_frame, regnum, regnum);
|
|
|
|
}
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
tic6x_frame_base_address (struct frame_info *this_frame, void **this_cache)
|
|
|
|
{
|
|
|
|
struct tic6x_unwind_cache *info
|
|
|
|
= tic6x_frame_unwind_cache (this_frame, this_cache);
|
|
|
|
return info->base;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct frame_unwind tic6x_frame_unwind =
|
|
|
|
{
|
|
|
|
NORMAL_FRAME,
|
|
|
|
default_frame_unwind_stop_reason,
|
|
|
|
tic6x_frame_this_id,
|
|
|
|
tic6x_frame_prev_register,
|
|
|
|
NULL,
|
|
|
|
default_frame_sniffer
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct frame_base tic6x_frame_base =
|
|
|
|
{
|
|
|
|
&tic6x_frame_unwind,
|
|
|
|
tic6x_frame_base_address,
|
|
|
|
tic6x_frame_base_address,
|
|
|
|
tic6x_frame_base_address
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
static struct tic6x_unwind_cache *
|
|
|
|
tic6x_make_stub_cache (struct frame_info *this_frame)
|
|
|
|
{
|
|
|
|
struct tic6x_unwind_cache *cache;
|
|
|
|
|
|
|
|
cache = FRAME_OBSTACK_ZALLOC (struct tic6x_unwind_cache);
|
|
|
|
|
|
|
|
cache->return_regnum = TIC6X_RA_REGNUM;
|
|
|
|
|
|
|
|
tic6x_setup_default (cache);
|
|
|
|
|
|
|
|
cache->cfa = get_frame_register_unsigned (this_frame, TIC6X_SP_REGNUM);
|
|
|
|
|
|
|
|
return cache;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
tic6x_stub_this_id (struct frame_info *this_frame, void **this_cache,
|
|
|
|
struct frame_id *this_id)
|
|
|
|
{
|
|
|
|
struct tic6x_unwind_cache *cache;
|
|
|
|
|
|
|
|
if (*this_cache == NULL)
|
|
|
|
*this_cache = tic6x_make_stub_cache (this_frame);
|
|
|
|
cache = *this_cache;
|
|
|
|
|
|
|
|
*this_id = frame_id_build (cache->cfa, get_frame_pc (this_frame));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tic6x_stub_unwind_sniffer (const struct frame_unwind *self,
|
|
|
|
struct frame_info *this_frame,
|
|
|
|
void **this_prologue_cache)
|
|
|
|
{
|
|
|
|
CORE_ADDR addr_in_block;
|
|
|
|
|
|
|
|
addr_in_block = get_frame_address_in_block (this_frame);
|
2013-06-25 00:18:32 +02:00
|
|
|
if (in_plt_section (addr_in_block))
|
2011-08-14 16:03:45 +02:00
|
|
|
return 1;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct frame_unwind tic6x_stub_unwind =
|
|
|
|
{
|
|
|
|
NORMAL_FRAME,
|
|
|
|
default_frame_unwind_stop_reason,
|
|
|
|
tic6x_stub_this_id,
|
|
|
|
tic6x_frame_prev_register,
|
|
|
|
NULL,
|
|
|
|
tic6x_stub_unwind_sniffer
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Return the instruction on address PC. */
|
|
|
|
|
|
|
|
static unsigned long
|
|
|
|
tic6x_fetch_instruction (struct gdbarch *gdbarch, CORE_ADDR pc)
|
|
|
|
{
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
|
|
return read_memory_unsigned_integer (pc, TIC6X_OPCODE_SIZE, byte_order);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Compute the condition of INST if it is a conditional instruction. Always
|
|
|
|
return 1 if INST is not a conditional instruction. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
tic6x_condition_true (struct frame_info *frame, unsigned long inst)
|
|
|
|
{
|
|
|
|
int register_number;
|
|
|
|
int register_value;
|
|
|
|
static const int register_numbers[8] = { -1, 16, 17, 18, 1, 2, 0, -1 };
|
|
|
|
|
|
|
|
register_number = register_numbers[(inst >> 29) & 7];
|
|
|
|
if (register_number == -1)
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
register_value = get_frame_register_signed (frame, register_number);
|
|
|
|
if ((inst & 0x10000000) != 0)
|
|
|
|
return register_value == 0;
|
|
|
|
return register_value != 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the register number by decoding raw bits REG, SIDE, and CROSSPATH in
|
|
|
|
instruction. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
tic6x_register_number (int reg, int side, int crosspath)
|
|
|
|
{
|
|
|
|
int r = (reg & 15) | ((crosspath ^ side) << 4);
|
|
|
|
if ((reg & 16) != 0) /* A16 - A31, B16 - B31 */
|
|
|
|
r += 37;
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
tic6x_extract_signed_field (int value, int low_bit, int bits)
|
|
|
|
{
|
|
|
|
int mask = (1 << bits) - 1;
|
|
|
|
int r = (value >> low_bit) & mask;
|
|
|
|
if ((r & (1 << (bits - 1))) != 0)
|
|
|
|
r -= mask + 1;
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Determine where to set a single step breakpoint. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
tic6x_get_next_pc (struct frame_info *frame, CORE_ADDR pc)
|
|
|
|
{
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (frame);
|
|
|
|
unsigned long inst;
|
|
|
|
int register_number;
|
|
|
|
int last = 0;
|
|
|
|
|
|
|
|
do
|
|
|
|
{
|
|
|
|
inst = tic6x_fetch_instruction (gdbarch, pc);
|
|
|
|
|
|
|
|
last = !(inst & 1);
|
|
|
|
|
|
|
|
if (inst == TIC6X_INST_SWE)
|
|
|
|
{
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
if (tdep->syscall_next_pc != NULL)
|
|
|
|
return tdep->syscall_next_pc (frame);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tic6x_condition_true (frame, inst))
|
|
|
|
{
|
|
|
|
if ((inst & 0x0000007c) == 0x00000010)
|
|
|
|
{
|
|
|
|
/* B with displacement */
|
|
|
|
pc &= ~(TIC6X_FETCH_PACKET_SIZE - 1);
|
|
|
|
pc += tic6x_extract_signed_field (inst, 7, 21) << 2;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if ((inst & 0x0f83effc) == 0x00000360)
|
|
|
|
{
|
|
|
|
/* B with register */
|
|
|
|
|
|
|
|
register_number = tic6x_register_number ((inst >> 18) & 0x1f,
|
|
|
|
INST_S_BIT (inst),
|
|
|
|
INST_X_BIT (inst));
|
|
|
|
pc = get_frame_register_unsigned (frame, register_number);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if ((inst & 0x00001ffc) == 0x00001020)
|
|
|
|
{
|
|
|
|
/* BDEC */
|
|
|
|
register_number = tic6x_register_number ((inst >> 23) & 0x1f,
|
|
|
|
INST_S_BIT (inst), 0);
|
|
|
|
if (get_frame_register_signed (frame, register_number) >= 0)
|
|
|
|
{
|
|
|
|
pc &= ~(TIC6X_FETCH_PACKET_SIZE - 1);
|
|
|
|
pc += tic6x_extract_signed_field (inst, 7, 10) << 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if ((inst & 0x00001ffc) == 0x00000120)
|
|
|
|
{
|
|
|
|
/* BNOP with displacement */
|
|
|
|
pc &= ~(TIC6X_FETCH_PACKET_SIZE - 1);
|
|
|
|
pc += tic6x_extract_signed_field (inst, 16, 12) << 2;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if ((inst & 0x0f830ffe) == 0x00800362)
|
|
|
|
{
|
|
|
|
/* BNOP with register */
|
|
|
|
register_number = tic6x_register_number ((inst >> 18) & 0x1f,
|
|
|
|
1, INST_X_BIT (inst));
|
|
|
|
pc = get_frame_register_unsigned (frame, register_number);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if ((inst & 0x00001ffc) == 0x00000020)
|
|
|
|
{
|
|
|
|
/* BPOS */
|
|
|
|
register_number = tic6x_register_number ((inst >> 23) & 0x1f,
|
|
|
|
INST_S_BIT (inst), 0);
|
|
|
|
if (get_frame_register_signed (frame, register_number) >= 0)
|
|
|
|
{
|
|
|
|
pc &= ~(TIC6X_FETCH_PACKET_SIZE - 1);
|
|
|
|
pc += tic6x_extract_signed_field (inst, 13, 10) << 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if ((inst & 0xf000007c) == 0x10000010)
|
|
|
|
{
|
|
|
|
/* CALLP */
|
|
|
|
pc &= ~(TIC6X_FETCH_PACKET_SIZE - 1);
|
|
|
|
pc += tic6x_extract_signed_field (inst, 7, 21) << 2;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
pc += TIC6X_OPCODE_SIZE;
|
|
|
|
}
|
|
|
|
while (!last);
|
|
|
|
return pc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This is the implementation of gdbarch method software_single_step. */
|
|
|
|
|
2012-03-02 01:06:13 +01:00
|
|
|
static int
|
2011-08-14 16:03:45 +02:00
|
|
|
tic6x_software_single_step (struct frame_info *frame)
|
|
|
|
{
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (frame);
|
|
|
|
struct address_space *aspace = get_frame_address_space (frame);
|
|
|
|
CORE_ADDR next_pc = tic6x_get_next_pc (frame, get_frame_pc (frame));
|
|
|
|
|
|
|
|
insert_single_step_breakpoint (gdbarch, aspace, next_pc);
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This is the implementation of gdbarch method frame_align. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
tic6x_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
|
|
|
|
{
|
|
|
|
return align_down (addr, 8);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Given a return value in REGCACHE with a type VALTYPE, extract and copy its
|
|
|
|
value into VALBUF. */
|
|
|
|
|
|
|
|
static void
|
|
|
|
tic6x_extract_return_value (struct type *valtype, struct regcache *regcache,
|
|
|
|
enum bfd_endian byte_order, gdb_byte *valbuf)
|
|
|
|
{
|
|
|
|
int len = TYPE_LENGTH (valtype);
|
|
|
|
|
|
|
|
/* pointer types are returned in register A4,
|
|
|
|
up to 32-bit types in A4
|
|
|
|
up to 64-bit types in A5:A4 */
|
|
|
|
if (len <= 4)
|
|
|
|
{
|
|
|
|
/* In big-endian,
|
|
|
|
- one-byte structure or union occupies the LSB of single even register.
|
|
|
|
- for two-byte structure or union, the first byte occupies byte 1 of
|
|
|
|
register and the second byte occupies byte 0.
|
|
|
|
so, we read the contents in VAL from the LSBs of register. */
|
|
|
|
if (len < 3 && byte_order == BFD_ENDIAN_BIG)
|
|
|
|
regcache_cooked_read_part (regcache, TIC6X_A4_REGNUM, 4 - len, len,
|
|
|
|
valbuf);
|
|
|
|
else
|
|
|
|
regcache_cooked_read (regcache, TIC6X_A4_REGNUM, valbuf);
|
|
|
|
}
|
|
|
|
else if (len <= 8)
|
|
|
|
{
|
|
|
|
/* For a 5-8 byte structure or union in big-endian, the first byte
|
|
|
|
occupies byte 3 (the MSB) of the upper (odd) register and the
|
|
|
|
remaining bytes fill the decreasingly significant bytes. 5-7
|
|
|
|
byte structures or unions have padding in the LSBs of the
|
|
|
|
lower (even) register. */
|
|
|
|
if (byte_order == BFD_ENDIAN_BIG)
|
|
|
|
{
|
|
|
|
regcache_cooked_read (regcache, TIC6X_A4_REGNUM, valbuf + 4);
|
|
|
|
regcache_cooked_read (regcache, TIC6X_A5_REGNUM, valbuf);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
regcache_cooked_read (regcache, TIC6X_A4_REGNUM, valbuf);
|
|
|
|
regcache_cooked_read (regcache, TIC6X_A5_REGNUM, valbuf + 4);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Write into appropriate registers a function return value
|
|
|
|
of type TYPE, given in virtual format. */
|
|
|
|
|
|
|
|
static void
|
|
|
|
tic6x_store_return_value (struct type *valtype, struct regcache *regcache,
|
|
|
|
enum bfd_endian byte_order, const gdb_byte *valbuf)
|
|
|
|
{
|
|
|
|
int len = TYPE_LENGTH (valtype);
|
|
|
|
|
|
|
|
/* return values of up to 8 bytes are returned in A5:A4 */
|
|
|
|
|
|
|
|
if (len <= 4)
|
|
|
|
{
|
|
|
|
if (len < 3 && byte_order == BFD_ENDIAN_BIG)
|
|
|
|
regcache_cooked_write_part (regcache, TIC6X_A4_REGNUM, 4 - len, len,
|
|
|
|
valbuf);
|
|
|
|
else
|
|
|
|
regcache_cooked_write (regcache, TIC6X_A4_REGNUM, valbuf);
|
|
|
|
}
|
|
|
|
else if (len <= 8)
|
|
|
|
{
|
|
|
|
if (byte_order == BFD_ENDIAN_BIG)
|
|
|
|
{
|
|
|
|
regcache_cooked_write (regcache, TIC6X_A4_REGNUM, valbuf + 4);
|
|
|
|
regcache_cooked_write (regcache, TIC6X_A5_REGNUM, valbuf);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
regcache_cooked_write (regcache, TIC6X_A4_REGNUM, valbuf);
|
|
|
|
regcache_cooked_write (regcache, TIC6X_A5_REGNUM, valbuf + 4);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This is the implementation of gdbarch method return_value. */
|
|
|
|
|
|
|
|
static enum return_value_convention
|
2012-05-16 16:35:09 +02:00
|
|
|
tic6x_return_value (struct gdbarch *gdbarch, struct value *function,
|
2011-08-14 16:03:45 +02:00
|
|
|
struct type *type, struct regcache *regcache,
|
|
|
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
|
|
|
{
|
2012-06-08 16:24:57 +02:00
|
|
|
/* In C++, when function returns an object, even its size is small
|
|
|
|
enough, it stii has to be passed via reference, pointed by register
|
|
|
|
A3. */
|
|
|
|
if (current_language->la_language == language_cplus)
|
|
|
|
{
|
|
|
|
if (type != NULL)
|
|
|
|
{
|
|
|
|
CHECK_TYPEDEF (type);
|
|
|
|
if (language_pass_by_reference (type))
|
|
|
|
return RETURN_VALUE_STRUCT_CONVENTION;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-08-14 16:03:45 +02:00
|
|
|
if (TYPE_LENGTH (type) > 8)
|
|
|
|
return RETURN_VALUE_STRUCT_CONVENTION;
|
|
|
|
|
|
|
|
if (readbuf)
|
|
|
|
tic6x_extract_return_value (type, regcache,
|
|
|
|
gdbarch_byte_order (gdbarch), readbuf);
|
|
|
|
if (writebuf)
|
|
|
|
tic6x_store_return_value (type, regcache,
|
|
|
|
gdbarch_byte_order (gdbarch), writebuf);
|
|
|
|
|
|
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This is the implementation of gdbarch method dummy_id. */
|
|
|
|
|
|
|
|
static struct frame_id
|
|
|
|
tic6x_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
|
|
|
|
{
|
|
|
|
return frame_id_build
|
|
|
|
(get_frame_register_unsigned (this_frame, TIC6X_SP_REGNUM),
|
|
|
|
get_frame_pc (this_frame));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the alignment requirement of TYPE. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
tic6x_arg_type_alignment (struct type *type)
|
|
|
|
{
|
|
|
|
int len = TYPE_LENGTH (check_typedef (type));
|
|
|
|
enum type_code typecode = TYPE_CODE (check_typedef (type));
|
|
|
|
|
|
|
|
if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
|
|
|
|
{
|
|
|
|
/* The stack alignment of a structure (and union) passed by value is the
|
|
|
|
smallest power of two greater than or equal to its size.
|
|
|
|
This cannot exceed 8 bytes, which is the largest allowable size for
|
|
|
|
a structure passed by value. */
|
|
|
|
|
|
|
|
if (len <= 2)
|
|
|
|
return len;
|
|
|
|
else if (len <= 4)
|
|
|
|
return 4;
|
|
|
|
else if (len <= 8)
|
|
|
|
return 8;
|
|
|
|
else
|
|
|
|
gdb_assert_not_reached ("unexpected length of data");
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (len <= 4)
|
|
|
|
return 4;
|
|
|
|
else if (len == 8)
|
|
|
|
{
|
|
|
|
if (typecode == TYPE_CODE_COMPLEX)
|
|
|
|
return 4;
|
|
|
|
else
|
|
|
|
return 8;
|
|
|
|
}
|
|
|
|
else if (len == 16)
|
|
|
|
{
|
|
|
|
if (typecode == TYPE_CODE_COMPLEX)
|
|
|
|
return 8;
|
|
|
|
else
|
|
|
|
return 16;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
internal_error (__FILE__, __LINE__, _("unexpected length %d of type"),
|
|
|
|
len);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This is the implementation of gdbarch method push_dummy_call. */
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
tic6x_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|
|
|
struct regcache *regcache, CORE_ADDR bp_addr,
|
|
|
|
int nargs, struct value **args, CORE_ADDR sp,
|
|
|
|
int struct_return, CORE_ADDR struct_addr)
|
|
|
|
{
|
|
|
|
int argreg = 0;
|
|
|
|
int argnum;
|
|
|
|
int stack_offset = 4;
|
|
|
|
int references_offset = 4;
|
|
|
|
CORE_ADDR func_addr = find_function_addr (function, NULL);
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
|
|
struct type *func_type = value_type (function);
|
|
|
|
/* The first arg passed on stack. Mostly the first 10 args are passed by
|
|
|
|
registers. */
|
|
|
|
int first_arg_on_stack = 10;
|
|
|
|
|
|
|
|
/* Set the return address register to point to the entry point of
|
|
|
|
the program, where a breakpoint lies in wait. */
|
|
|
|
regcache_cooked_write_unsigned (regcache, TIC6X_RA_REGNUM, bp_addr);
|
|
|
|
|
|
|
|
/* The caller must pass an argument in A3 containing a destination address
|
|
|
|
for the returned value. The callee returns the object by copying it to
|
|
|
|
the address in A3. */
|
|
|
|
if (struct_return)
|
|
|
|
regcache_cooked_write_unsigned (regcache, 3, struct_addr);
|
|
|
|
|
|
|
|
/* Determine the type of this function. */
|
|
|
|
func_type = check_typedef (func_type);
|
|
|
|
if (TYPE_CODE (func_type) == TYPE_CODE_PTR)
|
|
|
|
func_type = check_typedef (TYPE_TARGET_TYPE (func_type));
|
|
|
|
|
|
|
|
gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC
|
|
|
|
|| TYPE_CODE (func_type) == TYPE_CODE_METHOD);
|
|
|
|
|
|
|
|
/* For a variadic C function, the last explicitly declared argument and all
|
|
|
|
remaining arguments are passed on the stack. */
|
|
|
|
if (TYPE_VARARGS (func_type))
|
|
|
|
first_arg_on_stack = TYPE_NFIELDS (func_type) - 1;
|
|
|
|
|
2012-06-08 16:24:57 +02:00
|
|
|
/* Now make space on the stack for the args. */
|
|
|
|
for (argnum = 0; argnum < nargs; argnum++)
|
2011-08-14 16:03:45 +02:00
|
|
|
{
|
|
|
|
int len = align_up (TYPE_LENGTH (value_type (args[argnum])), 4);
|
|
|
|
if (argnum >= 10 - argreg)
|
|
|
|
references_offset += len;
|
|
|
|
stack_offset += len;
|
|
|
|
}
|
|
|
|
sp -= stack_offset;
|
|
|
|
/* SP should be 8-byte aligned, see C6000 ABI section 4.4.1
|
|
|
|
Stack Alignment. */
|
|
|
|
sp = align_down (sp, 8);
|
|
|
|
stack_offset = 4;
|
|
|
|
|
|
|
|
/* Now load as many as possible of the first arguments into
|
|
|
|
registers, and push the rest onto the stack. Loop through args
|
|
|
|
from first to last. */
|
2012-06-08 16:24:57 +02:00
|
|
|
for (argnum = 0; argnum < nargs; argnum++)
|
2011-08-14 16:03:45 +02:00
|
|
|
{
|
|
|
|
const gdb_byte *val;
|
|
|
|
struct value *arg = args[argnum];
|
|
|
|
struct type *arg_type = check_typedef (value_type (arg));
|
|
|
|
int len = TYPE_LENGTH (arg_type);
|
|
|
|
enum type_code typecode = TYPE_CODE (arg_type);
|
|
|
|
|
|
|
|
val = value_contents (arg);
|
|
|
|
|
|
|
|
/* Copy the argument to general registers or the stack in
|
|
|
|
register-sized pieces. */
|
|
|
|
if (argreg < first_arg_on_stack)
|
|
|
|
{
|
|
|
|
if (len <= 4)
|
|
|
|
{
|
|
|
|
if (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION)
|
|
|
|
{
|
|
|
|
/* In big-endian,
|
|
|
|
- one-byte structure or union occupies the LSB of single
|
|
|
|
even register.
|
|
|
|
- for two-byte structure or union, the first byte
|
|
|
|
occupies byte 1 of register and the second byte occupies
|
|
|
|
byte 0.
|
|
|
|
so, we write the contents in VAL to the lsp of
|
|
|
|
register. */
|
|
|
|
if (len < 3 && byte_order == BFD_ENDIAN_BIG)
|
|
|
|
regcache_cooked_write_part (regcache, arg_regs[argreg],
|
|
|
|
4 - len, len, val);
|
|
|
|
else
|
|
|
|
regcache_cooked_write (regcache, arg_regs[argreg], val);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* The argument is being passed by value in a single
|
|
|
|
register. */
|
|
|
|
CORE_ADDR regval = extract_unsigned_integer (val, len,
|
|
|
|
byte_order);
|
|
|
|
|
|
|
|
regcache_cooked_write_unsigned (regcache, arg_regs[argreg],
|
|
|
|
regval);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (len <= 8)
|
|
|
|
{
|
|
|
|
if (typecode == TYPE_CODE_STRUCT
|
|
|
|
|| typecode == TYPE_CODE_UNION)
|
|
|
|
{
|
|
|
|
/* For a 5-8 byte structure or union in big-endian, the
|
|
|
|
first byte occupies byte 3 (the MSB) of the upper (odd)
|
|
|
|
register and the remaining bytes fill the decreasingly
|
|
|
|
significant bytes. 5-7 byte structures or unions have
|
|
|
|
padding in the LSBs of the lower (even) register. */
|
|
|
|
if (byte_order == BFD_ENDIAN_BIG)
|
|
|
|
{
|
|
|
|
regcache_cooked_write (regcache,
|
|
|
|
arg_regs[argreg] + 1, val);
|
|
|
|
regcache_cooked_write_part (regcache,
|
|
|
|
arg_regs[argreg], 0,
|
|
|
|
len - 4, val + 4);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
regcache_cooked_write (regcache, arg_regs[argreg],
|
|
|
|
val);
|
|
|
|
regcache_cooked_write_part (regcache,
|
|
|
|
arg_regs[argreg] + 1, 0,
|
|
|
|
len - 4, val + 4);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* The argument is being passed by value in a pair of
|
|
|
|
registers. */
|
|
|
|
ULONGEST regval = extract_unsigned_integer (val, len,
|
|
|
|
byte_order);
|
|
|
|
|
|
|
|
regcache_cooked_write_unsigned (regcache,
|
|
|
|
arg_regs[argreg],
|
|
|
|
regval);
|
|
|
|
regcache_cooked_write_unsigned (regcache,
|
|
|
|
arg_regs[argreg] + 1,
|
|
|
|
regval >> 32);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* The argument is being passed by reference in a single
|
|
|
|
register. */
|
|
|
|
CORE_ADDR addr;
|
|
|
|
|
|
|
|
/* It is not necessary to adjust REFERENCES_OFFSET to
|
|
|
|
8-byte aligned in some cases, in which 4-byte alignment
|
|
|
|
is sufficient. For simplicity, we adjust
|
|
|
|
REFERENCES_OFFSET to 8-byte aligned. */
|
|
|
|
references_offset = align_up (references_offset, 8);
|
|
|
|
|
|
|
|
addr = sp + references_offset;
|
|
|
|
write_memory (addr, val, len);
|
|
|
|
references_offset += align_up (len, 4);
|
|
|
|
regcache_cooked_write_unsigned (regcache, arg_regs[argreg],
|
|
|
|
addr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
argreg++;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* The argument is being passed on the stack. */
|
|
|
|
CORE_ADDR addr;
|
|
|
|
|
|
|
|
/* There are six different cases of alignment, and these rules can
|
|
|
|
be found in tic6x_arg_type_alignment:
|
|
|
|
|
|
|
|
1) 4-byte aligned if size is less than or equal to 4 byte, such
|
|
|
|
as short, int, struct, union etc.
|
|
|
|
2) 8-byte aligned if size is less than or equal to 8-byte, such
|
|
|
|
as double, long long,
|
|
|
|
3) 4-byte aligned if it is of type _Complex float, even its size
|
|
|
|
is 8-byte.
|
|
|
|
4) 8-byte aligned if it is of type _Complex double or _Complex
|
|
|
|
long double, even its size is 16-byte. Because, the address of
|
|
|
|
variable is passed as reference.
|
|
|
|
5) struct and union larger than 8-byte are passed by reference, so
|
|
|
|
it is 4-byte aligned.
|
|
|
|
6) struct and union of size between 4 byte and 8 byte varies.
|
|
|
|
alignment of struct variable is the alignment of its first field,
|
|
|
|
while alignment of union variable is the max of all its fields'
|
|
|
|
alignment. */
|
|
|
|
|
|
|
|
if (len <= 4)
|
|
|
|
; /* Default is 4-byte aligned. Nothing to be done. */
|
|
|
|
else if (len <= 8)
|
|
|
|
stack_offset = align_up (stack_offset,
|
|
|
|
tic6x_arg_type_alignment (arg_type));
|
|
|
|
else if (len == 16)
|
|
|
|
{
|
|
|
|
/* _Complex double or _Complex long double */
|
|
|
|
if (typecode == TYPE_CODE_COMPLEX)
|
|
|
|
{
|
|
|
|
/* The argument is being passed by reference on stack. */
|
|
|
|
CORE_ADDR addr;
|
|
|
|
references_offset = align_up (references_offset, 8);
|
|
|
|
|
|
|
|
addr = sp + references_offset;
|
|
|
|
/* Store variable on stack. */
|
|
|
|
write_memory (addr, val, len);
|
|
|
|
|
|
|
|
references_offset += align_up (len, 4);
|
|
|
|
|
|
|
|
/* Pass the address of variable on stack as reference. */
|
|
|
|
store_unsigned_integer ((gdb_byte *) val, 4, byte_order,
|
|
|
|
addr);
|
|
|
|
len = 4;
|
|
|
|
|
|
|
|
}
|
|
|
|
else
|
|
|
|
internal_error (__FILE__, __LINE__,
|
|
|
|
_("unexpected type %d of arg %d"),
|
|
|
|
typecode, argnum);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
internal_error (__FILE__, __LINE__,
|
|
|
|
_("unexpected length %d of arg %d"), len, argnum);
|
|
|
|
|
|
|
|
addr = sp + stack_offset;
|
|
|
|
write_memory (addr, val, len);
|
|
|
|
stack_offset += align_up (len, 4);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
regcache_cooked_write_signed (regcache, TIC6X_SP_REGNUM, sp);
|
|
|
|
|
|
|
|
/* Return adjusted stack pointer. */
|
|
|
|
return sp;
|
|
|
|
}
|
|
|
|
|
2015-05-26 12:59:17 +02:00
|
|
|
/* This is the implementation of gdbarch method stack_frame_destroyed_p. */
|
2011-08-14 16:03:45 +02:00
|
|
|
|
|
|
|
static int
|
2015-05-26 12:59:17 +02:00
|
|
|
tic6x_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
|
2011-08-14 16:03:45 +02:00
|
|
|
{
|
|
|
|
unsigned long inst = tic6x_fetch_instruction (gdbarch, pc);
|
|
|
|
/* Normally, the epilogue is composed by instruction `b .S2 b3'. */
|
|
|
|
if ((inst & 0x0f83effc) == 0x360)
|
|
|
|
{
|
|
|
|
unsigned int src2 = tic6x_register_number ((inst >> 18) & 0x1f,
|
|
|
|
INST_S_BIT (inst),
|
|
|
|
INST_X_BIT (inst));
|
|
|
|
if (src2 == TIC6X_RA_REGNUM)
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This is the implementation of gdbarch method get_longjmp_target. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
tic6x_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
|
|
|
|
{
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (frame);
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
|
|
CORE_ADDR jb_addr;
|
Use gdb_byte for bytes from the program being debugged.
gdb_byte should be used for bytes from the program being debugged. We
have many places using char or unsigned char instead all over the
existing ports, and more ends up added over time due to copy/paste as
new code is based on old code.
I've greped the tree for "char buf[", and fixed all I found.
Tested by building with --enable-targets=all.
2013-03-01 Pedro Alves <palves@redhat.com>
Use gdb_byte for bytes from the program being debugged.
* arm-tdep.c (arm_store_return_value, arm_get_longjmp_target):
Change type of local 'buf' to gdb_byte.
* avr-tdep.c (avr_frame_prev_register, avr_push_dummy_call): Likewise.
* bfin-tdep.c (bfin_push_dummy_call): Likewise.
* cris-tdep.c (cris_sigcontext_addr)
(cris_sigtramp_frame_unwind_cache): Likewise.
* frv-linux-tdep.c (frv_linux_pc_in_sigtramp)
(frv_linux_sigcontext_reg_addr, frv_linux_sigtramp_frame_cache):
Likewise.
* frv-tdep.c (frv_pseudo_register_write, frv_analyze_prologue): Likewise.
* hppa-hpux-tdep.c (hppa32_hpux_find_global_pointer)
(hppa32_hpux_search_dummy_call_sequence)
(hppa_hpux_supply_save_state): Likewise.
* hppa-linux-tdep.c (insns_match_pattern)
(hppa_linux_find_global_pointer): Likewise.
* hppa-tdep.c (hppa_in_function_epilogue_p)
(skip_prologue_hard_way, hppa_frame_cache): Likewise.
* i386-nto-tdep.c (i386nto_sigcontext_addr): Likewise.
* i386fbsd-tdep.c (i386fbsd_supply_uthread)
(i386fbsd_collect_uthread): Likewise.
* ia64-hpux-tdep.c (ia64_hpux_push_dummy_code): Likewise.
* ia64-linux-tdep.c (ia64_linux_sigcontext_register_address): Likewise.
* ia64-tdep.c (examine_prologue, ia64_frame_cache)
(ia64_frame_prev_register, ia64_sigtramp_frame_cache)
(ia64_sigtramp_frame_prev_register, ia64_access_reg)
(ia64_access_rse_reg, ia64_libunwind_frame_this_id)
(ia64_libunwind_frame_prev_register)
(ia64_libunwind_sigtramp_frame_this_id)
(ia64_find_global_pointer_from_dynamic_section)
(find_extant_func_descr, find_func_descr, ia64_dummy_id)
(ia64_unwind_pc): Likewise.
* iq2000-tdep.c (iq2000_store_return_value): Likewise.
* m68hc11-tdep.c (m68hc11_push_dummy_call)
(m68hc11_extract_return_value): Likewise.
* m68klinux-nat.c (fetch_register, store_register): Likewise.
* mep-tdep.c (mep_pseudo_cr32_read, mep_pseudo_cr32_write)
(mep_get_insn, mep_push_dummy_call): Likewise.
* mips-linux-tdep.c (mips_linux_get_longjmp_target)
(mips_linux_in_dynsym_stub): Likewise.
* mn10300-tdep.c (mep_pseudo_cr32_write): Likewise.
* ppc-linux-nat.c (fetch_register, store_register): Likewise.
* regcache.c (dump_endian_bytes): Change type of parameter 'buf'
to gdb_byte.
* remote-mips.c (mips_set_register): Likewise.
* remote-sim.c (gdbsim_fetch_register): Likewise.
* score-tdep.c (score7_fetch_inst): Change type of parameter
'memblock' and local 'buf' to gdb_byte.
(score7_malloc_and_get_memblock): Change return type to gdb_byte.
Change type of local 'buf' to gdb_byte. Adjust.
(score7_adjust_memblock_ptr): Change type of parameter 'memblock'
to gdb_byte**.
(score7_analyze_prologue): Change type of 'memblock' and
'memblock_ptr' locals to gdb_byte*.
* sh64-tdep.c (sh64_extract_return_value)
(sh64_store_return_value): Change type of local 'buf' to gdb_byte.
* solib-darwin.c (darwin_current_sos, darwin_read_exec_load_addr):
* solib-pa64.c (pa64_solib_create_inferior_hook)
(pa64_open_symbol_file_object): Remove local 'buf'.
* solib-som.c (som_solib_create_inferior_hook, link_map_start)
(som_open_symbol_file_object): Likewise.
* solib-spu.c (spu_current_sos): Likewise.
* spu-linux-nat.c (spu_fetch_inferior_registers): Likewise.
* spu-multiarch.c (parse_spufs_run, spu_fetch_registers)
(spu_store_registers): Likewise.
* target.c (debug_print_register): Likewise.
* tic6x-tdep.c (tic6x_get_longjmp_target): Likewise.
* xstormy16-tdep.c (xstormy16_store_return_value)
(xstormy16_push_dummy_call, xstormy16_resolve_jmp_table_entry)
(xstormy16_find_jmp_table_entry): Likewise.
2013-03-01 16:38:27 +01:00
|
|
|
gdb_byte buf[4];
|
2011-08-14 16:03:45 +02:00
|
|
|
|
|
|
|
/* JMP_BUF is passed by reference in A4. */
|
|
|
|
jb_addr = get_frame_register_unsigned (frame, 4);
|
|
|
|
|
|
|
|
/* JMP_BUF contains 13 elements of type int, and return address is stored
|
|
|
|
in the last slot. */
|
|
|
|
if (target_read_memory (jb_addr + 12 * 4, buf, 4))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
*pc = extract_unsigned_integer (buf, 4, byte_order);
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2012-06-08 16:24:57 +02:00
|
|
|
/* This is the implementation of gdbarch method
|
|
|
|
return_in_first_hidden_param_p. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
tic6x_return_in_first_hidden_param_p (struct gdbarch *gdbarch,
|
|
|
|
struct type *type)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-08-14 16:03:45 +02:00
|
|
|
static struct gdbarch *
|
|
|
|
tic6x_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
|
|
{
|
|
|
|
struct gdbarch *gdbarch;
|
|
|
|
struct gdbarch_tdep *tdep;
|
|
|
|
struct tdesc_arch_data *tdesc_data = NULL;
|
|
|
|
const struct target_desc *tdesc = info.target_desc;
|
|
|
|
int has_gp = 0;
|
|
|
|
|
|
|
|
/* Check any target description for validity. */
|
|
|
|
if (tdesc_has_registers (tdesc))
|
|
|
|
{
|
|
|
|
const struct tdesc_feature *feature;
|
|
|
|
int valid_p, i;
|
|
|
|
|
|
|
|
feature = tdesc_find_feature (tdesc, "org.gnu.gdb.tic6x.core");
|
|
|
|
|
|
|
|
if (feature == NULL)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
tdesc_data = tdesc_data_alloc ();
|
|
|
|
|
|
|
|
valid_p = 1;
|
|
|
|
for (i = 0; i < 32; i++) /* A0 - A15, B0 - B15 */
|
|
|
|
valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
|
|
|
|
tic6x_register_names[i]);
|
|
|
|
|
|
|
|
/* CSR */
|
|
|
|
valid_p &= tdesc_numbered_register (feature, tdesc_data, i++,
|
|
|
|
tic6x_register_names[TIC6X_CSR_REGNUM]);
|
|
|
|
valid_p &= tdesc_numbered_register (feature, tdesc_data, i++,
|
|
|
|
tic6x_register_names[TIC6X_PC_REGNUM]);
|
|
|
|
|
|
|
|
if (!valid_p)
|
|
|
|
{
|
|
|
|
tdesc_data_cleanup (tdesc_data);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
feature = tdesc_find_feature (tdesc, "org.gnu.gdb.tic6x.gp");
|
|
|
|
if (feature)
|
|
|
|
{
|
|
|
|
int j = 0;
|
|
|
|
static const char *const gp[] =
|
|
|
|
{
|
|
|
|
"A16", "A17", "A18", "A19", "A20", "A21", "A22", "A23",
|
|
|
|
"A24", "A25", "A26", "A27", "A28", "A29", "A30", "A31",
|
|
|
|
"B16", "B17", "B18", "B19", "B20", "B21", "B22", "B23",
|
|
|
|
"B24", "B25", "B26", "B27", "B28", "B29", "B30", "B31",
|
|
|
|
};
|
|
|
|
|
|
|
|
has_gp = 1;
|
|
|
|
valid_p = 1;
|
|
|
|
for (j = 0; j < 32; j++) /* A16 - A31, B16 - B31 */
|
|
|
|
valid_p &= tdesc_numbered_register (feature, tdesc_data, i++,
|
|
|
|
gp[j]);
|
|
|
|
|
|
|
|
if (!valid_p)
|
|
|
|
{
|
|
|
|
tdesc_data_cleanup (tdesc_data);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
feature = tdesc_find_feature (tdesc, "org.gnu.gdb.tic6x.c6xp");
|
|
|
|
if (feature)
|
|
|
|
{
|
|
|
|
valid_p &= tdesc_numbered_register (feature, tdesc_data, i++, "TSR");
|
|
|
|
valid_p &= tdesc_numbered_register (feature, tdesc_data, i++, "ILC");
|
|
|
|
valid_p &= tdesc_numbered_register (feature, tdesc_data, i++, "RILC");
|
|
|
|
|
|
|
|
if (!valid_p)
|
|
|
|
{
|
|
|
|
tdesc_data_cleanup (tdesc_data);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Find a candidate among extant architectures. */
|
|
|
|
for (arches = gdbarch_list_lookup_by_info (arches, &info);
|
|
|
|
arches != NULL;
|
|
|
|
arches = gdbarch_list_lookup_by_info (arches->next, &info))
|
|
|
|
{
|
|
|
|
tdep = gdbarch_tdep (arches->gdbarch);
|
|
|
|
|
|
|
|
if (has_gp != tdep->has_gp)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (tdep && tdep->breakpoint)
|
|
|
|
return arches->gdbarch;
|
|
|
|
}
|
|
|
|
|
|
|
|
tdep = xcalloc (1, sizeof (struct gdbarch_tdep));
|
|
|
|
|
|
|
|
tdep->has_gp = has_gp;
|
|
|
|
gdbarch = gdbarch_alloc (&info, tdep);
|
|
|
|
|
|
|
|
/* Data type sizes. */
|
|
|
|
set_gdbarch_ptr_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_addr_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_short_bit (gdbarch, 16);
|
|
|
|
set_gdbarch_int_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_long_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
|
|
|
set_gdbarch_float_bit (gdbarch, 32);
|
|
|
|
set_gdbarch_double_bit (gdbarch, 64);
|
|
|
|
|
|
|
|
set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
|
|
|
|
set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
|
|
|
|
|
|
|
|
/* The register set. */
|
|
|
|
set_gdbarch_num_regs (gdbarch, TIC6X_NUM_REGS);
|
|
|
|
set_gdbarch_sp_regnum (gdbarch, TIC6X_SP_REGNUM);
|
|
|
|
set_gdbarch_pc_regnum (gdbarch, TIC6X_PC_REGNUM);
|
|
|
|
|
|
|
|
set_gdbarch_register_name (gdbarch, tic6x_register_name);
|
|
|
|
set_gdbarch_register_type (gdbarch, tic6x_register_type);
|
|
|
|
|
|
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
|
|
|
|
|
|
|
set_gdbarch_skip_prologue (gdbarch, tic6x_skip_prologue);
|
|
|
|
set_gdbarch_breakpoint_from_pc (gdbarch, tic6x_breakpoint_from_pc);
|
|
|
|
|
|
|
|
set_gdbarch_unwind_pc (gdbarch, tic6x_unwind_pc);
|
|
|
|
set_gdbarch_unwind_sp (gdbarch, tic6x_unwind_sp);
|
|
|
|
|
|
|
|
/* Unwinding. */
|
|
|
|
dwarf2_append_unwinders (gdbarch);
|
|
|
|
|
|
|
|
frame_unwind_append_unwinder (gdbarch, &tic6x_stub_unwind);
|
|
|
|
frame_unwind_append_unwinder (gdbarch, &tic6x_frame_unwind);
|
2014-02-10 19:00:01 +01:00
|
|
|
frame_base_set_default (gdbarch, &tic6x_frame_base);
|
2011-08-14 16:03:45 +02:00
|
|
|
|
|
|
|
dwarf2_frame_set_init_reg (gdbarch, tic6x_dwarf2_frame_init_reg);
|
|
|
|
|
|
|
|
/* Single stepping. */
|
|
|
|
set_gdbarch_software_single_step (gdbarch, tic6x_software_single_step);
|
|
|
|
|
|
|
|
set_gdbarch_print_insn (gdbarch, tic6x_print_insn);
|
|
|
|
|
|
|
|
/* Call dummy code. */
|
|
|
|
set_gdbarch_frame_align (gdbarch, tic6x_frame_align);
|
|
|
|
|
|
|
|
set_gdbarch_return_value (gdbarch, tic6x_return_value);
|
|
|
|
|
|
|
|
set_gdbarch_dummy_id (gdbarch, tic6x_dummy_id);
|
|
|
|
|
|
|
|
/* Enable inferior call support. */
|
|
|
|
set_gdbarch_push_dummy_call (gdbarch, tic6x_push_dummy_call);
|
|
|
|
|
|
|
|
set_gdbarch_get_longjmp_target (gdbarch, tic6x_get_longjmp_target);
|
|
|
|
|
2015-05-26 12:59:17 +02:00
|
|
|
set_gdbarch_stack_frame_destroyed_p (gdbarch, tic6x_stack_frame_destroyed_p);
|
2011-08-14 16:03:45 +02:00
|
|
|
|
2012-06-08 16:24:57 +02:00
|
|
|
set_gdbarch_return_in_first_hidden_param_p (gdbarch,
|
|
|
|
tic6x_return_in_first_hidden_param_p);
|
|
|
|
|
2011-08-14 16:03:45 +02:00
|
|
|
/* Hook in ABI-specific overrides, if they have been registered. */
|
|
|
|
gdbarch_init_osabi (info, gdbarch);
|
|
|
|
|
|
|
|
if (tdesc_data)
|
|
|
|
tdesc_use_registers (gdbarch, tdesc, tdesc_data);
|
|
|
|
|
|
|
|
return gdbarch;
|
|
|
|
}
|
|
|
|
|
2012-03-02 01:06:13 +01:00
|
|
|
/* -Wmissing-prototypes */
|
|
|
|
extern initialize_file_ftype _initialize_tic6x_tdep;
|
|
|
|
|
2011-08-14 16:03:45 +02:00
|
|
|
void
|
|
|
|
_initialize_tic6x_tdep (void)
|
|
|
|
{
|
|
|
|
register_gdbarch_init (bfd_arch_tic6x, tic6x_gdbarch_init);
|
|
|
|
|
|
|
|
initialize_tdesc_tic6x_c64xp ();
|
|
|
|
initialize_tdesc_tic6x_c64x ();
|
|
|
|
initialize_tdesc_tic6x_c62x ();
|
|
|
|
}
|