binutils-gdb/gas/config/tc-mips.h

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/* tc-mips.h -- header file for tc-mips.c.
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Copyright 1993, 1994, 1995, 1996, 1997, 2000, 2001, 2002, 2003
Free Software Foundation, Inc.
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Contributed by the OSF and Ralph Campbell.
Written by Keith Knowles and Ralph Campbell, working independently.
Modified for ECOFF support by Ian Lance Taylor of Cygnus Support.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
#ifndef TC_MIPS
#define TC_MIPS
struct frag;
struct expressionS;
/* Default to big endian. */
#ifndef TARGET_BYTES_BIG_ENDIAN
#define TARGET_BYTES_BIG_ENDIAN 1
#endif
#define TARGET_ARCH bfd_arch_mips
#define WORKING_DOT_WORD 1
#define OLD_FLOAT_READS
#define REPEAT_CONS_EXPRESSIONS
#define RELOC_EXPANSION_POSSIBLE
#define MAX_RELOC_EXPANSION 3
#define LOCAL_LABELS_FB 1
/* Maximum symbol offset that can be encoded in a BFD_RELOC_GPREL16
relocation. */
#define MAX_GPREL_OFFSET (0x7FF0)
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#define md_relax_frag(segment, fragp, stretch) \
mips_relax_frag(segment, fragp, stretch)
extern int mips_relax_frag (asection *, struct frag *, long);
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#define md_undefined_symbol(name) (0)
#define md_operand(x)
extern void mips_handle_align (struct frag *);
* as.h (rs_align_test): New. * frags.c (NOP_OPCODE): Move default from read.c. (MAX_MEM_FOR_RS_ALIGN_CODE): New default. (frag_align_code): New. * frags.h (frag_align_code): Declare. * read.c (NOP_OPCODE): Remove. (do_align): Use frag_align_code. * write.c (NOP_OPCODE): Remove. (get_recorded_alignment): New. (cvt_frag_to_fill): Handle rs_align_test. (relax_segment): Likewise. (subsegs_finish): Align last subseg in section to the section alignment. Use frag_align_code. * write.h (get_recorded_alignment): Declare. * config/obj-coff.c (size_section): Handle rs_align_test. (fill_section, fixup_mdeps): Likewise. (write_object_file): Use frag_align_code. * config/tc-alpha.c (alpha_align): Use frag_align_code. (alpha_handle_align): New. * config/tc-alpha.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-i386.h (md_do_align): Use frag_align_code. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-ia64.c (ia64_md_do_align): Don't do code alignment. (ia64_handle_align): New. * config/tc-ia64.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m32r.c (m32r_do_align): Remove. (m32r_handle_align): New. (fill_insn): Use frag_align_code. * config/tc-m32r.h (md_do_align): Remove. (HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m88k.c, config/tc-m88k.h: Similarly. * config/tc-mips.c, config/tc-mips.h: Similarly. * config/tc-sh.c (sh_cons_align): Use rs_align_test. (sh_handle_align): Likewise. Handle rs_align_code. (sh_do_align): Remove. * config/tc-sh.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-sparc.c (sparc_cons_align): Use rs_align_test. (sparc_handle_align): Likewise. Handle rs_align_code. * config/tc-sparc.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New.
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#define HANDLE_ALIGN(fragp) mips_handle_align (fragp)
#define MAX_MEM_FOR_RS_ALIGN_CODE (1 + 2)
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/* We permit PC relative difference expressions when generating
embedded PIC code. */
#define DIFF_EXPR_OK
/* Tell assembler that we have an itbl_mips.h header file to include. */
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#define HAVE_ITBL_CPU
/* The endianness of the target format may change based on command
line arguments. */
#define TARGET_FORMAT mips_target_format()
extern const char *mips_target_format (void);
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/* MIPS PIC level. */
enum mips_pic_level
{
/* Do not generate PIC code. */
NO_PIC,
/* Generate PIC code as in the SVR4 MIPS ABI. */
SVR4_PIC,
/* Generate PIC code without using a global offset table: the data
segment has a maximum size of 64K, all data references are off
the $gp register, and all text references are PC relative. This
is used on some embedded systems. */
EMBEDDED_PIC
};
extern enum mips_pic_level mips_pic;
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struct mips_cl_insn
{
unsigned long insn_opcode;
const struct mips_opcode *insn_mo;
/* The next two fields are used when generating mips16 code. */
bfd_boolean use_extend;
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unsigned short extend;
};
extern int tc_get_register (int frame);
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#define md_after_parse_args() mips_after_parse_args()
extern void mips_after_parse_args (void);
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#define tc_init_after_args() mips_init_after_args()
extern void mips_init_after_args (void);
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#define md_parse_long_option(arg) mips_parse_long_option (arg)
extern int mips_parse_long_option (const char *);
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#define tc_frob_label(sym) mips_define_label (sym)
extern void mips_define_label (symbolS *);
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#define tc_frob_file_before_adjust() mips_frob_file_before_adjust ()
extern void mips_frob_file_before_adjust (void);
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#define tc_frob_file_before_fix() mips_frob_file ()
extern void mips_frob_file (void);
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#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
#define tc_frob_file_after_relocs mips_frob_file_after_relocs
extern void mips_frob_file_after_relocs (void);
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#endif
#define tc_fix_adjustable(fixp) mips_fix_adjustable (fixp)
extern int mips_fix_adjustable (struct fix *);
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* elf32-mips.c (mips_elf_generic_reloc): New Function. (elf_mips_howto_table_rel): Use it. (gprel32_with_gp): Move prototype. (mips_elf_hi16_reloc): Check for ! BSF_LOCAL instead of zero addend. Use mips_elf_generic_reloc. (mips_elf_got16_reloc): Check for ! BSF_LOCAL instead of zero addend. Code cleanup. (_bfd_mips_elf32_gprel16_reloc): Check for ! BSF_LOCAL instead of zero addend. (mips_elf_gprel32_reloc): Likewise. Use the same GP assignment logic as in the other *_gprel*_reloc functions. (gprel32_with_gp): Handle partial_inplace properly. (mips32_64bit_reloc): Use mips_elf_generic_reloc. (mips16_gprel_reloc): Check for ! BSF_LOCAL instead of zero addend. Do addend handling directly instead of calling _bfd_mips_elf_gprel16_with_gp. Handle partial_inplace properly. * elf64-mips.c (mips_elf64_hi16_reloc): Check for ! BSF_LOCAL instead of zero addend. Handle partial_inplace properly. (mips_elf64_got16_reloc): Check for ! BSF_LOCAL instead of zero addend. (mips_elf64_gprel16_reloc): Likewise. (mips_elf64_literal_reloc): Likewise. (mips_elf64_gprel32_reloc): Likewise. Use the same GP assignment logic as in the other *_gprel*_reloc functions. Handle partial_inplace properly. (mips_elf64_shift6_reloc): Check for ! BSF_LOCAL instead of zero addend. Handle partial_inplace properly. (mips16_gprel_reloc): Likewise. Do addend handling directly instead of calling _bfd_mips_elf_gprel16_with_gp. * elfn32-mips.c (mips_elf_got16_reloc): Check for BSF_LOCAL. (mips_elf_gprel32_reloc): Check for ! BSF_LOCAL instead of zero addend. (mips_elf_shift6_reloc): Handle partial_inplace properly. (mips16_gprel_reloc): Likewise. Do addend handling directly instead of calling _bfd_mips_elf_gprel16_with_gp. * elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp): Handle partial_inplace properly. Fix wrong addend handling. Fix overflow check. (_bfd_mips_elf_sign_extend): Renamed from mips_elf_sign_extend and exported. (mips_elf_calculate_relocation): Use _bfd_mips_elf_sign_extend. (_bfd_mips_elf_relocate_section): Likewise. (mips_elf_create_dynamic_relocation): Update sec_info_type access. * elfxx-mips.h (_bfd_mips_relax_section): Fix prototype declaration. (_bfd_mips_elf_sign_extend): New prototype. * config/tc-mips.c (md_pcrel_from): Return actual pcrel address. (md_apply_fix3): Ignore non-special relocations. Remove superfluous exceptions from size assert. Remove most of the addend fixup specialcasing. Remove value, use valP directly. simplify fx_addnumber handling. Remove zero addend specialcases. (tc_gen_reloc): Use appropriate value for reloc2 addend. Remove the addend fixup specialcase. * config/tc-mips.h (MD_APPLY_SYM_VALUE): Define as 0.
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/* Values passed to md_apply_fix3 don't include symbol values. */
#define MD_APPLY_SYM_VALUE(FIX) 0
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/* Global syms must not be resolved, to support ELF shared libraries.
When generating embedded code, we don't have shared libs. */
#define EXTERN_FORCE_RELOC \
(OUTPUT_FLAVOR == bfd_target_elf_flavour \
&& mips_pic != EMBEDDED_PIC)
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/* When generating embedded PIC code we must keep PC relative
relocations. */
#define TC_FORCE_RELOCATION(FIX) mips_force_relocation (FIX)
extern int mips_force_relocation (struct fix *);
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#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEG) \
(! SEG_NORMAL (SEG) || mips_force_relocation (FIX))
/* We use this to turn branches to global symbols into branches to
local symbols, so that they can be simplified. */
#define TC_VALIDATE_FIX(fixp, this_segment, skip_label) \
do \
if (! mips_validate_fix ((fixp), (this_segment))) \
goto skip_label; \
while (0)
extern int mips_validate_fix (struct fix *, asection *);
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/* Register mask variables. These are set by the MIPS assembly code
and used by ECOFF and possibly other object file formats. */
extern unsigned long mips_gprmask;
extern unsigned long mips_cprmask[4];
#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
#define elf_tc_final_processing mips_elf_final_processing
extern void mips_elf_final_processing (void);
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#endif
extern void md_mips_end (void);
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#define md_end() md_mips_end()
extern void mips_pop_insert (void);
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#define md_pop_insert() mips_pop_insert()
extern void mips_flush_pending_output (void);
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#define md_flush_pending_output mips_flush_pending_output
extern void mips_enable_auto_align (void);
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#define md_elf_section_change_hook() mips_enable_auto_align()
extern enum dwarf2_format mips_dwarf2_format (void);
#define DWARF2_FORMAT() mips_dwarf2_format ()
extern int mips_dwarf2_addr_size (void);
#define DWARF2_ADDR_SIZE(bfd) mips_dwarf2_addr_size ()
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#endif /* TC_MIPS */