binutils-gdb/bfd/elf32-rl78.c

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[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
/* Renesas RL78 specific support for 32-bit ELF.
Copyright (C) 2011-2017 Free Software Foundation, Inc.
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "bfd_stdint.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/rl78.h"
#include "libiberty.h"
#define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
#define RL78REL(n,sz,bit,shift,complain,pcrel) \
HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *,
asection *, bfd *, char **);
/* FIXME: We could omit the SHIFT parameter, it is always zero. */
#define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \
HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
/* Note that the relocations around 0x7f are internal to this file;
feel free to move them as needed to avoid conflicts with published
relocation numbers. */
static reloc_howto_type rl78_elf_howto_table [] =
{
Fallout from recent bfd_reloc_outofrange changes Commit ec93045b and cd21f5da introduced a large number of tic4x and tic54x regressions, due to the new checks being wrong for targets with octets_per_byte != 1. To fix that I introduced a new bfd_get_section_limit_octets and performed the check on octets rather than byte adresses, reducing the number of bfd_octets_per_byte calls. bfd_octets_per_byte is rather expensive.. I then wondered why the same bfd_reloc_outofrange check added to bfd_perform_relocation wasn't also added to bfd_install_relocation. The two functions are virtually identical and ought to remain that way. However, adding the same check to bfd_install_relocation resulted in ld-elf "FAIL Link eh-group.o to eh-group" on many ELF targets, including x64_64-linux. The reason being that eh-group.o has NONE relocs at the end of a section, and most targets give NONE relocs a non-zero size. So if we are to keep the new outofrange check it appears that NONE relocs must have a zero size. * bfd-in.h (bfd_get_section_limit_octets): New define, extracted from.. (bfd_get_section_limit): ..here. * reloc.c (bfd_perform_relocation): Correct bfd_reloc_outofrange check. (bfd_install_relocation, _bfd_final_link_relocate): Add same check here. * elf32-sh.c (sh_elf_reloc): Correct bfd_reloc_outofrange check. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Remove duplicated bfd_reloc_outofrange check. * bfd-in2.h: Regenerate. * cpu-ns32k.c (_bfd_do_ns32k_reloc_contents): Return bfd_reloc_ok on zero size relocs. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf32-nds32.c (nds32_relocate_contents): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. * reloc.c (_bfd_relocate_contents): Don't bomb on zero size relocs. (_bfd_clear_contents): Likewise. * elfxx-mips.c (mips_elf_obtain_contents): Likewise. (mips_elf_perform_relocation): Likewise. * aoutx.h (aout_link_reloc_link_order): Allow for NULL return from malloc on zero size alloc. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (aout_link_reloc_link_order): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * aoutx.h (howto_table_ext): Ensure NONE relocs have size 3, bitsize 0, and complain_overflow_dont. * coff-sparc.c (coff_sparc_howto_table): Likewise. * elf-hppa.h (elf_hppa_howto_table): Likewise. * elf-m10200.c (elf_mn10200_howto_table): Likewise. * elf-m10300.c (elf_mn10300_howto_table): Likewise. * elf32-arc.c (elf_arc_howto_table): Likewise. * elf32-arm.c (elf32_arm_howto_table_1): Likewise. * elf32-avr.c (elf_avr_howto_table): Likewise. * elf32-bfin.c (bfin_howto_table): Likewise. * elf32-cr16.c (cr16_elf_howto_table): Likewise. * elf32-cris.c (cris_elf_howto_table): Likewise. * elf32-crx.c (crx_elf_howto_table): Likewise. * elf32-d10v.c (elf_d10v_howto_table): Likewise. * elf32-d30v.c (elf_d30v_howto_table): Likewise. * elf32-dlx.c (dlx_elf_howto_table): Likewise. * elf32-epiphany.c (epiphany_elf_howto_table): Likewise. * elf32-fr30.c (fr30_elf_howto_table): Likewise. * elf32-frv.c (elf32_frv_howto_table): Likewise. * elf32-h8300.c (h8_elf_howto_table): Likewise. * elf32-i370.c (i370_elf_howto_raw): Likewise. * elf32-i386.c (elf_howto_table): Likewise. * elf32-i860.c (elf32_i860_howto_table): Likewise. * elf32-i960.c (elf32_i960_relocate): Likewise. * elf32-ip2k.c (ip2k_elf_howto_table): Likewise. * elf32-iq2000.c (iq2000_elf_howto_table): Likewise. * elf32-lm32.c (lm32_elf_howto_table): Likewise. * elf32-m32c.c (m32c_elf_howto_table): Likewise. * elf32-m32r.c (m32r_elf_howto_table): Likewise. * elf32-m68hc11.c (elf_m68hc11_howto_table): Likewise. * elf32-m68hc12.c (elf_m68hc11_howto_table): Likewise. * elf32-m68k.c (howto_table): Likewise. * elf32-mcore.c (mcore_elf_howto_raw): Likewise. * elf32-mep.c (mep_elf_howto_table): Likewise. * elf32-metag.c (elf_metag_howto_table): Likewise. * elf32-microblaze.c (microblaze_elf_howto_raw): Likewise. * elf32-mips.c (elf_mips_howto_table_rel): Likewise. * elf32-moxie.c (moxie_elf_howto_table): Likewise. * elf32-msp430.c (elf_msp430_howto_table): Likewise. * elf32-mt.c (mt_elf_howto_table): Likewise. * elf32-nds32.c (nds32_elf_howto_table): Likewise. * elf32-nios2.c (elf_nios2_howto_table_rel): Likewise. * elf32-or1k.c (or1k_elf_howto_table): Likewise. * elf32-pj.c (pj_elf_howto_table): Likewise. * elf32-ppc.c (ppc_elf_howto_raw): Likewise. * elf32-rl78.c (rl78_elf_howto_table): Likewise. * elf32-rx.c (rx_elf_howto_table): Likewise. * elf32-s390.c (elf_howto_table): Likewise. * elf32-score.c (elf32_score_howto_table): Likewise. * elf32-score7.c (elf32_score_howto_table): Likewise. * elf32-sh-relocs.h (R_SH_NONE): Likewise. * elf32-spu.c (elf_howto_table): Likewise. * elf32-tic6x.c (elf32_tic6x_howto_table): Likewise. * elf32-tilepro.c (tilepro_elf_howto_table): Likewise. * elf32-v850.c (v850_elf_howto_table): Likewise. * elf32-vax.c (howto_table): Likewise. * elf32-visium.c (visium_elf_howto_table): Likewise. * elf32-xc16x.c (xc16x_elf_howto_table): Likewise. * elf32-xgate.c (elf_xgate_howto_table): Likewise. * elf32-xstormy16.c (xstormy16_elf_howto_table): Likewise. * elf32-xtensa.c (elf_howto_table): Likewise. * elf64-alpha.c (elf64_alpha_howto_table): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Likewise. * elf64-mmix.c (elf_mmix_howto_table): Likewise. * elf64-ppc.c (ppc64_elf_howto_raw): Likewise. * elf64-s390.c (elf_howto_table): Likewise. * elf64-sh64.c (sh_elf64_howto_table): Likewise. * elf64-x86-64.c (x86_64_elf_howto_table): Likewise. * elfn32-mips.c (elf_mips_howto_table_rel): Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. (elfNN_aarch64_howto_none): Likewise. * elfxx-ia64.c (ia64_howto_table): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_howto_table): Likewise. * elfxx-tilegx.c (tilegx_elf_howto_table): Likewise. * nlm32-sparc.c (nlm32_sparc_howto_table): Likewise.
2015-01-19 01:06:26 +01:00
RL78REL (NONE, 3, 0, 0, dont, FALSE),
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
RL78REL (DIR32, 2, 32, 0, signed, FALSE),
RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
RL78REL (DIR16, 1, 16, 0, dont, FALSE),
RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
RL78REL (DIR8, 0, 8, 0, dont, FALSE),
RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
EMPTY_HOWTO (0x13),
EMPTY_HOWTO (0x14),
EMPTY_HOWTO (0x15),
EMPTY_HOWTO (0x16),
EMPTY_HOWTO (0x17),
EMPTY_HOWTO (0x18),
EMPTY_HOWTO (0x19),
EMPTY_HOWTO (0x1a),
EMPTY_HOWTO (0x1b),
EMPTY_HOWTO (0x1c),
EMPTY_HOWTO (0x1d),
EMPTY_HOWTO (0x1e),
EMPTY_HOWTO (0x1f),
EMPTY_HOWTO (0x20),
EMPTY_HOWTO (0x21),
EMPTY_HOWTO (0x22),
EMPTY_HOWTO (0x23),
EMPTY_HOWTO (0x24),
EMPTY_HOWTO (0x25),
EMPTY_HOWTO (0x26),
EMPTY_HOWTO (0x27),
EMPTY_HOWTO (0x28),
EMPTY_HOWTO (0x29),
EMPTY_HOWTO (0x2a),
EMPTY_HOWTO (0x2b),
EMPTY_HOWTO (0x2c),
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
EMPTY_HOWTO (0x2e),
RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE),
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
EMPTY_HOWTO (0x30),
EMPTY_HOWTO (0x31),
EMPTY_HOWTO (0x32),
EMPTY_HOWTO (0x33),
EMPTY_HOWTO (0x34),
EMPTY_HOWTO (0x35),
EMPTY_HOWTO (0x36),
EMPTY_HOWTO (0x37),
EMPTY_HOWTO (0x38),
EMPTY_HOWTO (0x39),
EMPTY_HOWTO (0x3a),
EMPTY_HOWTO (0x3b),
EMPTY_HOWTO (0x3c),
EMPTY_HOWTO (0x3d),
EMPTY_HOWTO (0x3e),
EMPTY_HOWTO (0x3f),
EMPTY_HOWTO (0x40),
RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE),
RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE),
RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE),
RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE),
RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE),
RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE),
RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE),
RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE),
RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE),
RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE),
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
#define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
EMPTY_HOWTO (0x52),
EMPTY_HOWTO (0x53),
EMPTY_HOWTO (0x54),
EMPTY_HOWTO (0x55),
EMPTY_HOWTO (0x56),
EMPTY_HOWTO (0x57),
EMPTY_HOWTO (0x58),
EMPTY_HOWTO (0x59),
EMPTY_HOWTO (0x5a),
EMPTY_HOWTO (0x5b),
EMPTY_HOWTO (0x5c),
EMPTY_HOWTO (0x5d),
EMPTY_HOWTO (0x5e),
EMPTY_HOWTO (0x5f),
EMPTY_HOWTO (0x60),
EMPTY_HOWTO (0x61),
EMPTY_HOWTO (0x62),
EMPTY_HOWTO (0x63),
EMPTY_HOWTO (0x64),
EMPTY_HOWTO (0x65),
EMPTY_HOWTO (0x66),
EMPTY_HOWTO (0x67),
EMPTY_HOWTO (0x68),
EMPTY_HOWTO (0x69),
EMPTY_HOWTO (0x6a),
EMPTY_HOWTO (0x6b),
EMPTY_HOWTO (0x6c),
EMPTY_HOWTO (0x6d),
EMPTY_HOWTO (0x6e),
EMPTY_HOWTO (0x6f),
EMPTY_HOWTO (0x70),
EMPTY_HOWTO (0x71),
EMPTY_HOWTO (0x72),
EMPTY_HOWTO (0x73),
EMPTY_HOWTO (0x74),
EMPTY_HOWTO (0x75),
EMPTY_HOWTO (0x76),
EMPTY_HOWTO (0x77),
EMPTY_HOWTO (0x78),
EMPTY_HOWTO (0x79),
EMPTY_HOWTO (0x7a),
EMPTY_HOWTO (0x7b),
EMPTY_HOWTO (0x7c),
EMPTY_HOWTO (0x7d),
EMPTY_HOWTO (0x7e),
EMPTY_HOWTO (0x7f),
RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE),
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
EMPTY_HOWTO (0x89),
EMPTY_HOWTO (0x8a),
EMPTY_HOWTO (0x8b),
EMPTY_HOWTO (0x8c),
RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE),
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
EMPTY_HOWTO (0x8e),
EMPTY_HOWTO (0x8f),
RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE),
RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
};
/* Map BFD reloc types to RL78 ELF reloc types. */
struct rl78_reloc_map
{
bfd_reloc_code_real_type bfd_reloc_val;
unsigned int rl78_reloc_val;
};
static const struct rl78_reloc_map rl78_reloc_map [] =
{
{ BFD_RELOC_NONE, R_RL78_NONE },
{ BFD_RELOC_8, R_RL78_DIR8S },
{ BFD_RELOC_16, R_RL78_DIR16S },
{ BFD_RELOC_24, R_RL78_DIR24S },
{ BFD_RELOC_32, R_RL78_DIR32 },
{ BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
{ BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
{ BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
{ BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
{ BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
{ BFD_RELOC_RL78_8U, R_RL78_DIR8U },
{ BFD_RELOC_RL78_16U, R_RL78_DIR16U },
{ BFD_RELOC_RL78_SYM, R_RL78_SYM },
{ BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
{ BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
{ BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
{ BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
{ BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
{ BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
{ BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
{ BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
{ BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
{ BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
{ BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
{ BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
{ BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR },
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
{ BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
};
static reloc_howto_type *
rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
bfd_reloc_code_real_type code)
{
unsigned int i;
if (code == BFD_RELOC_RL78_32_OP)
return rl78_elf_howto_table + R_RL78_DIR32;
for (i = ARRAY_SIZE (rl78_reloc_map); i--;)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
if (rl78_reloc_map [i].bfd_reloc_val == code)
return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
return NULL;
}
static reloc_howto_type *
rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
if (rl78_elf_howto_table[i].name != NULL
&& strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
return rl78_elf_howto_table + i;
return NULL;
}
/* Set the howto pointer for an RL78 ELF reloc. */
static void
rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
arelent * cache_ptr,
Elf_Internal_Rela * dst)
{
unsigned int r_type;
r_type = ELF32_R_TYPE (dst->r_info);
More fixes for memory access violations exposed by fuzzed binaries. PR binutils/17512 * archive.c (do_slurp_bsd_armap): Return if the parsed_size is zero. (bfd_slurp_armap): Zero terminate the name. (bfd_generic_stat_arch_elt): If there is no header, fail. * elf32-arc.c (arc_info_to_howto_rel): Replace BFD_ASSERT with error message. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto_rel): Likewise. * elf32-cris.c (cris_info_to_howto_rela): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel): Likewise. * elf32-dlx.c (dlx_rtype_to_howto): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-v850.c (v850_elf_info_to_howto_rel): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * elf64-x86-64.c (elf_x86_64_reloc_type_lookup): Likewise. * elfnn-aarch64.c (elfNN_aarch64_bfd_reloc_from_type): Likewise. * elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Add range checking of reloc symbol index. * mach-o.c (bfd_mach_o_canonicalize_one_reloc): If no symbols have been provided then set the reloc's symbol to undefined. * reloc.c (bfd_generic_get_relocated_section_contents): Add range checking of the reloc to be applied. * versados.c (process_otr): Add more range checks. (versados_canonicalize_reloc): If the section is unknown, set the symbol to undefined. * vms-alpha.c (_bfd_vms_slurp_eisd): Add range checks. (alpha_vms_object_p): Likewise.
2014-12-22 21:59:00 +01:00
if (r_type >= (unsigned int) R_RL78_max)
{
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
More fixes for illegal memory accesses triggered by running objdump on fuzzed binaries. PR binutils/17512 * objdump.c (display_any_bfd): Fail if archives nest too deeply. * ecoff.c: Use bfd_alloc2 to allocate space for structure arrays. (_bfd_ecoff_slurp_symbol_table): Check for a negative symbol index or an out of range fdr index. * elf-m10300.c (mn10300_info_to_howto): Fix typo in error message. * elf32-arc.c (arc_info_to_howto_rel): Likewise. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-cr16.c (elf_cr16_info_to_howto): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto_rel): Likewise. * elf32-cris.c (cris_info_to_howto_rela): Likewise. * elf32-crx.c (elf_crx_info_to_howto): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela): Likewise. * elf32-i370.c (i370_elf_info_to_howto): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-mcore.c (mcore_elf_info_to_howto): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-microblaze.c (microblaze_elf_info_to_howto): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-pj.c (pj_elf_info_to_howto): Likewise. * elf32-ppc.c (ppc_elf_info_to_howto): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-sh.c (sh_elf_info_to_howto): Likewise. * elf32-spu.c (spu_elf_info_to_howto): Likewise. * elf32-v850.c (v850_elf_perform_relocation): Likewise. * elf32-vax.c (rtype_to_howto): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-alpha.c (elf64_alpha_info_to_howto): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * mach-o.c: Use bfd_alloc2 to allocate space for structure arrays. (bfd_mach_o_canonicalize_one_reloc): Fix check on out of range symbol indicies. (bfd_mach_o_canonicalize_relocs): Check for out of range alloc. (bfd_mach_o_canonicalize_dynamic_reloc): Likewise. (bfd_mach_o_build_dysymtab): Likewise. (bfd_mach_o_write_symtab_content): Set the string table size to zero upon error. (bfd_mach_o_read_symtab_symbols): Reset the nsyms value if the read fails. * peXXigen.c (pe_print_edata): Check for numeric overflow in edt fields. * tekhex.c (first_phase): Check for src pointer reaching end of buffer.
2015-02-03 15:34:54 +01:00
_bfd_error_handler (_("%B: invalid RL78 reloc number: %d"), abfd, r_type);
More fixes for memory access violations exposed by fuzzed binaries. PR binutils/17512 * archive.c (do_slurp_bsd_armap): Return if the parsed_size is zero. (bfd_slurp_armap): Zero terminate the name. (bfd_generic_stat_arch_elt): If there is no header, fail. * elf32-arc.c (arc_info_to_howto_rel): Replace BFD_ASSERT with error message. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto_rel): Likewise. * elf32-cris.c (cris_info_to_howto_rela): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel): Likewise. * elf32-dlx.c (dlx_rtype_to_howto): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-v850.c (v850_elf_info_to_howto_rel): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * elf64-x86-64.c (elf_x86_64_reloc_type_lookup): Likewise. * elfnn-aarch64.c (elfNN_aarch64_bfd_reloc_from_type): Likewise. * elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Add range checking of reloc symbol index. * mach-o.c (bfd_mach_o_canonicalize_one_reloc): If no symbols have been provided then set the reloc's symbol to undefined. * reloc.c (bfd_generic_get_relocated_section_contents): Add range checking of the reloc to be applied. * versados.c (process_otr): Add more range checks. (versados_canonicalize_reloc): If the section is unknown, set the symbol to undefined. * vms-alpha.c (_bfd_vms_slurp_eisd): Add range checks. (alpha_vms_object_p): Likewise.
2014-12-22 21:59:00 +01:00
r_type = 0;
}
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
cache_ptr->howto = rl78_elf_howto_table + r_type;
}
static bfd_vma
get_symbol_value (const char * name,
struct bfd_link_info * info,
bfd * input_bfd,
asection * input_section,
int offset)
{
struct bfd_link_hash_entry * h;
if (info == NULL)
return 0;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
if (h == NULL
|| (h->type != bfd_link_hash_defined
&& h->type != bfd_link_hash_defweak))
{
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
(*info->callbacks->undefined_symbol)
(info, name, input_bfd, input_section, offset, TRUE);
return 0;
}
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
return (h->u.def.value
+ h->u.def.section->output_section->vma
+ h->u.def.section->output_offset);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
}
static bfd_vma
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
get_romstart (struct bfd_link_info * info,
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
bfd * abfd,
asection * sec,
int offset)
{
static bfd_boolean cached = FALSE;
static bfd_vma cached_value = 0;
if (!cached)
{
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
cached = TRUE;
}
return cached_value;
}
static bfd_vma
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
get_ramstart (struct bfd_link_info * info,
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
bfd * abfd,
asection * sec,
int offset)
{
static bfd_boolean cached = FALSE;
static bfd_vma cached_value = 0;
if (!cached)
{
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
cached = TRUE;
}
return cached_value;
}
#define NUM_STACK_ENTRIES 16
static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
static unsigned int rl78_stack_top;
#define RL78_STACK_PUSH(val) \
do \
{ \
if (rl78_stack_top < NUM_STACK_ENTRIES) \
rl78_stack [rl78_stack_top ++] = (val); \
else \
_bfd_error_handler (_("Internal Error: RL78 reloc stack overflow")); \
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
} \
while (0)
#define RL78_STACK_POP(dest) \
do \
{ \
if (rl78_stack_top > 0) \
(dest) = rl78_stack [-- rl78_stack_top];\
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
else \
{ \
_bfd_error_handler (_("Internal Error: RL78 reloc stack underflow")); \
(dest) = 0; \
} \
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
} \
while (0)
/* Special handling for RL78 complex relocs. Returns the
value of the reloc, or 0 for relocs which do not generate
a result. SYMVAL is the value of the symbol for relocs
which use a symbolic argument. */
static bfd_vma
rl78_compute_complex_reloc (unsigned long r_type,
bfd_vma symval,
asection * input_section)
{
int32_t tmp1, tmp2;
bfd_vma relocation;
switch (r_type)
{
default:
return 0;
case R_RL78_ABS24S_PCREL:
case R_RL78_ABS16S_PCREL:
case R_RL78_ABS8S_PCREL:
RL78_STACK_POP (relocation);
relocation -= input_section->output_section->vma + input_section->output_offset;
return relocation;
case R_RL78_ABS32:
case R_RL78_ABS32_REV:
case R_RL78_ABS16:
case R_RL78_ABS16_REV:
case R_RL78_ABS16S:
case R_RL78_ABS16U:
case R_RL78_ABS8:
case R_RL78_ABS8U:
case R_RL78_ABS8S:
RL78_STACK_POP (relocation);
return relocation;
case R_RL78_ABS16UL:
case R_RL78_ABS8UL:
RL78_STACK_POP (relocation);
return relocation >> 2;
case R_RL78_ABS16UW:
case R_RL78_ABS8UW:
RL78_STACK_POP (relocation);
return relocation >> 1;
/* The rest of the relocs compute values and then push them onto the stack. */
case R_RL78_OPramtop:
case R_RL78_OPromtop:
case R_RL78_SYM:
RL78_STACK_PUSH (symval);
return 0;
2015-08-12 13:32:43 +02:00
case R_RL78_OPneg:
RL78_STACK_POP (tmp1);
tmp1 = - tmp1;
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPadd:
RL78_STACK_POP (tmp2);
RL78_STACK_POP (tmp1);
tmp1 += tmp2;
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPsub:
/* For the expression "A - B", the assembler pushes A,
then B, then OPSUB. So the first op we pop is B, not A. */
RL78_STACK_POP (tmp2); /* B */
RL78_STACK_POP (tmp1); /* A */
tmp1 -= tmp2; /* A - B */
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPmul:
RL78_STACK_POP (tmp2);
RL78_STACK_POP (tmp1);
tmp1 *= tmp2;
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPdiv:
RL78_STACK_POP (tmp2);
RL78_STACK_POP (tmp1);
tmp1 /= tmp2;
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPshla:
RL78_STACK_POP (tmp2);
RL78_STACK_POP (tmp1);
tmp1 <<= tmp2;
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPshra:
RL78_STACK_POP (tmp2);
RL78_STACK_POP (tmp1);
tmp1 >>= tmp2;
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPsctsize:
RL78_STACK_PUSH (input_section->size);
return 0;
case R_RL78_OPscttop:
RL78_STACK_PUSH (input_section->output_section->vma);
return 0;
case R_RL78_OPand:
RL78_STACK_POP (tmp2);
RL78_STACK_POP (tmp1);
tmp1 &= tmp2;
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPor:
RL78_STACK_POP (tmp2);
RL78_STACK_POP (tmp1);
tmp1 |= tmp2;
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPxor:
RL78_STACK_POP (tmp2);
RL78_STACK_POP (tmp1);
tmp1 ^= tmp2;
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPnot:
RL78_STACK_POP (tmp1);
tmp1 = ~ tmp1;
RL78_STACK_PUSH (tmp1);
return 0;
case R_RL78_OPmod:
RL78_STACK_POP (tmp2);
RL78_STACK_POP (tmp1);
tmp1 %= tmp2;
RL78_STACK_PUSH (tmp1);
return 0;
}
}
#undef RL78_STACK_PUSH
#undef RL78_STACK_POP
#define OP(i) (contents[reloc->address + (i)])
static bfd_reloc_status_type
rl78_special_reloc (bfd * input_bfd,
arelent * reloc,
asymbol * symbol,
void * data,
asection * input_section,
bfd * output_bfd ATTRIBUTE_UNUSED,
char ** error_message ATTRIBUTE_UNUSED)
{
bfd_reloc_status_type r = bfd_reloc_ok;
bfd_vma relocation = 0;
unsigned long r_type = reloc->howto->type;
bfd_byte * contents = data;
/* If necessary, compute the symbolic value of the relocation. */
switch (r_type)
{
case R_RL78_SYM:
relocation = (symbol->value
+ symbol->section->output_section->vma
+ symbol->section->output_offset
+ reloc->addend);
break;
case R_RL78_OPromtop:
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
relocation = get_romstart (NULL, input_bfd, input_section,
reloc->address);
break;
case R_RL78_OPramtop:
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
relocation = get_ramstart (NULL, input_bfd, input_section,
reloc->address);
break;
}
/* Get the value of the relocation. */
relocation = rl78_compute_complex_reloc (r_type, relocation, input_section);
/* If the relocation alters the contents of the section then apply it now.
Note - since this function is called from
bfd_generic_get_relocated_section_contents via bfd_perform_relocation,
and not from the linker, we do not perform any range checking. The
clients who are calling us are only interested in some relocated section
contents, and not any linkage problems that might occur later. */
switch (r_type)
{
case R_RL78_ABS32:
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
OP (3) = relocation >> 24;
break;
case R_RL78_ABS32_REV:
OP (3) = relocation;
OP (2) = relocation >> 8;
OP (1) = relocation >> 16;
OP (0) = relocation >> 24;
break;
case R_RL78_ABS24S_PCREL:
case R_RL78_ABS24S:
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
break;
case R_RL78_ABS16_REV:
OP (1) = relocation;
OP (0) = relocation >> 8;
break;
case R_RL78_ABS16S_PCREL:
case R_RL78_ABS16:
case R_RL78_ABS16S:
case R_RL78_ABS16U:
case R_RL78_ABS16UL:
case R_RL78_ABS16UW:
OP (0) = relocation;
OP (1) = relocation >> 8;
break;
case R_RL78_ABS8S_PCREL:
case R_RL78_ABS8:
case R_RL78_ABS8U:
case R_RL78_ABS8UL:
case R_RL78_ABS8UW:
case R_RL78_ABS8S:
OP (0) = relocation;
break;
default:
break;
}
return r;
}
#undef OP
#define OP(i) (contents[rel->r_offset + (i)])
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
/* Relocate an RL78 ELF section.
There is some attempt to make this function usable for many architectures,
both USE_REL and USE_RELA ['twould be nice if such a critter existed],
if only to serve as a learning tool.
The RELOCATE_SECTION function is called by the new ELF backend linker
to handle the relocations for a section.
The relocs are always passed as Rela structures; if the section
actually uses Rel structures, the r_addend field will always be
zero.
This function is responsible for adjusting the section contents as
necessary, and (if using Rela relocs and generating a relocatable
output file) adjusting the reloc addend as necessary.
This function does not have to worry about setting the reloc
address or the reloc symbol index.
LOCAL_SYMS is a pointer to the swapped in local symbols.
LOCAL_SECTIONS is an array giving the section in the input file
corresponding to the st_shndx field of each local symbol.
The global hash table entry for the global symbols can be found
via elf_sym_hashes (input_bfd).
When generating relocatable output, this function must handle
STB_LOCAL/STT_SECTION symbols specially. The output symbol is
going to be the section symbol corresponding to the output
section, which means that the addend must be adjusted
accordingly. */
static bfd_boolean
rl78_elf_relocate_section
(bfd * output_bfd,
struct bfd_link_info * info,
bfd * input_bfd,
asection * input_section,
bfd_byte * contents,
Elf_Internal_Rela * relocs,
Elf_Internal_Sym * local_syms,
asection ** local_sections)
{
Elf_Internal_Shdr * symtab_hdr;
struct elf_link_hash_entry ** sym_hashes;
Elf_Internal_Rela * rel;
Elf_Internal_Rela * relend;
asection *splt;
symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
relend = relocs + input_section->reloc_count;
Delete duplicate target short-cuts to dynamic sections We'd like to have the elf_link_hash_table srelplt field rather than some private target field used to save short-cuts to a PLT relocation section. This save a little space but mainly is so that the generic ELF code can access the field. Ditto for other dynamic sections. * elf-m10300.c (mn10300_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (mn10300_elf_final_link_relocate): Likewise. (_bfd_mn10300_elf_adjust_dynamic_symbol): Likewise. (_bfd_mn10300_elf_size_dynamic_sections): Likewise. (_bfd_mn10300_elf_finish_dynamic_symbol): Likewise. (_bfd_mn10300_elf_finish_dynamic_sections): Likewise. * elf32-bfin.c (bfin_check_relocs): Likewise. (bfin_relocate_section): Likewise. (bfin_gc_sweep_hook): Likewise. (struct bfinfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (bfinfdpic_got_section, bfinfdpic_gotrel_section, bfinfdpic_plt_section, bfinfdpic_pltrel_section): Define using elf shortcut sections. (_bfin_create_got_section): Use elf htab shortcuts to dyn sections. Delete dead code. (bfin_finish_dynamic_symbol): Use elf htab shortcuts to dyn sections. (bfin_size_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_create_got_section): Likewise. (cr16_elf_check_relocs): Likewise. (cr16_elf_final_link_relocate): Likewise. (_bfd_cr16_elf_create_dynamic_sections): Likewise. (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise. (_bfd_cr16_elf_size_dynamic_sections): Likewise. (_bfd_cr16_elf_finish_dynamic_symbol): Likewise. (_bfd_cr16_elf_finish_dynamic_sections): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. (elf_cris_finish_dynamic_symbol): Likewise. (elf_cris_finish_dynamic_sections): Likewise. (cris_elf_gc_sweep_hook): Likewise. (elf_cris_adjust_gotplt_to_got): Likewise. (elf_cris_adjust_dynamic_symbol): Likewise. (cris_elf_check_relocs): Likewise. Delete dead code. (elf_cris_size_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_cris_discard_excess_program_dynamics): Likewise. * elf32-frv.c (struct frvfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (frvfdpic_got_section, frvfdpic_gotrel_section, frvfdpic_plt_section, frvfdpic_pltrel_section): Define using elf shortcut sections. (_frv_create_got_section): Likewise. * elf32-hppa.c (struct elf32_hppa_link_hash_table): Delete sgot, srelgot, splt and srelplt. (hppa_build_one_stub): Use elf htab shortcuts to dynamic sections. (elf32_hppa_create_dynamic_sections): Likewise. (elf32_hppa_check_relocs): Likewise. (allocate_plt_static): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_size_dynamic_sections): Likewise. (elf32_hppa_relocate_section): Likewise. (elf32_hppa_finish_dynamic_symbol): Likewise. (elf32_hppa_finish_dynamic_sections): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-lm32.c (struct elf_lm32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (lm32fdpic_got_section, lm32fdpic_gotrel_section): Define using elf shortcut sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (lm32_elf_relocate_section): Use elf htab shortcuts to dyn sections. (lm32_elf_check_relocs): Likewise. (lm32_elf_finish_dynamic_sections): Likewise. (lm32_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_size_dynamic_sections): Likewise. (lm32_elf_create_dynamic_sections): Likewise. * elf32-m32c.c (m32c_elf_relocate_section): Likewise. (m32c_elf_check_relocs): Likewise. (m32c_elf_finish_dynamic_sections): Likewise. (m32c_elf_always_size_sections): Likewise. * elf32-m32r.c (struct elf_m32r_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (m32r_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (m32r_elf_size_dynamic_sections): Likewise. (m32r_elf_relocate_section): Likewise. (m32r_elf_finish_dynamic_symbol): Likewise. (m32r_elf_finish_dynamic_sections): Likewise. (m32r_elf_check_relocs): Likewise. * elf32-m68k.c (elf_m68k_partition_multi_got): Likewise. (elf_m68k_check_relocs): Likewise. (elf_m68k_adjust_dynamic_symbol): Likewise. (elf_m68k_size_dynamic_sections): Likewise. (elf_m68k_relocate_section): Likewise. (elf_m68k_finish_dynamic_symbol): Likewise. (elf_m68k_finish_dynamic_sections): Likewise. * elf32-metag.c (struct elf_metag_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_metag_relocate_section): Use elf htab shortcuts to dynamic sections. (elf_metag_create_dynamic_sections): Likewise. Allocate got header here in .got. (elf_metag_check_relocs): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (elf_metag_size_dynamic_sections): Likewise. (elf_metag_finish_dynamic_symbol): Likewise. (elf_metag_finish_dynamic_sections): Likewise. (elf_metag_size_stubs): Likewise. (elf_backend_got_header_size): Don't define. (elf_backend_want_got_plt): Define. * elf32-microblaze.c (struct elf32_mb_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelpl. (microblaze_elf_relocate_section): Use elf htab shortcuts to dynamic sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (microblaze_elf_check_relocs): Use elf htab shortcuts to dyn sections. (microblaze_elf_create_dynamic_sections): Likewise. (allocate_dynrelocs): Likewise. (microblaze_elf_size_dynamic_sections): Likewise. (microblaze_elf_finish_dynamic_symbol): Likewise. (microblaze_elf_finish_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create): Don't NULL already zero fields. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (nds32_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (nds32_elf_size_dynamic_sections): Likewise. (nds32_elf_relocate_section): Likewise. (nds32_elf_finish_dynamic_symbol): Likewise. (nds32_elf_finish_dynamic_sections): Likewise. (nds32_elf_check_relocs): Likewise. (calculate_plt_memory_address): Likewise. (calculate_got_memory_address): Likewise. * elf32-nds32.h (struct elf_nds32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. * elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise. (or1k_elf_relocate_section): Use elf htab shortcuts to dyn sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (or1k_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (or1k_elf_finish_dynamic_sections): Likewise. (or1k_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_size_dynamic_sections): Likewise. (or1k_elf_create_dynamic_sections): Likewise. * elf32-ppc.c (struct ppc_elf_link_hash_table): Delete got, relgot, plt, relplt, iplt, reliplt and sgotplt. (ppc_elf_create_got): Use elf htab shortcuts to dynamic sections. (ppc_elf_create_glink): Likewise. (ppc_elf_create_dynamic_sections): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_select_plt_layout): Likewise. (ppc_elf_tls_setup): Likewise. (allocate_got): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_reloc_type_class): Likewise. (ppc_elf_finish_dynamic_sections): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. (rl78_elf_check_relocs): Likewise. (rl78_elf_finish_dynamic_sections): Likewise. (rl78_elf_always_size_sections): Likewise. * elf32-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section): Set elf shortcuts. (s3_bfd_score_elf_finish_dynamic_sections): Use elf shortcuts. * elf32-score7.c (score_elf_create_got_section): As above. (s7_bfd_score_elf_finish_dynamic_sections): As above. * elf32-sh.c (struct elf_sh_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Don't set them. (sh_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (sh_elf_size_dynamic_sections): Likewise. (sh_elf_add_rofixup): Likewise. (sh_elf_relocate_section): Likewise. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol): Likewise. (sh_elf_finish_dynamic_sections): Likewise. * elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_create_got_section): Likewise. * elf32-vax.c (elf_vax_check_relocs): Likewise. (elf_vax_adjust_dynamic_symbol): Likewise. (elf_vax_always_size_sections): Likewise. (elf_vax_instantiate_got_entries): Likewise. (elf_vax_relocate_section): Likewise. (elf_vax_finish_dynamic_symbol): Likewise. (elf_vax_finish_dynamic_sections): Likewise. * elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise. (xstormy16_elf_always_size_sections): Likewise. (xstormy16_elf_relocate_section): Likewise. (xstormy16_elf_finish_dynamic_sections): Likewise. * elf32-xtensa.c (struct elf_xtensa_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_xtensa_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_xtensa_allocate_dynrelocs): Likewise. (elf_xtensa_allocate_local_got_size): Likewise. (elf_xtensa_size_dynamic_sections): Likewise. (elf_xtensa_relocate_section): Likewise. (elf_xtensa_finish_dynamic_sections): Likewise. (shrink_dynamic_reloc_sections): Likewise. (elf_xtensa_get_plt_section): Likewise. (elf_xtensa_get_gotplt_section): Likewise. (xtensa_callback_required_dependence): Likewise. * elf64-alpha.c (elf64_alpha_create_dynamic_sections): Set elf htab shortcuts to dynamic sections. (elf64_alpha_adjust_dynamic_symbol): Use elf htab shortcuts to dynamic sections. (elf64_alpha_size_plt_section): Likewise. (elf64_alpha_size_rela_got_1): Likewise. (elf64_alpha_size_rela_got_section): Likewise. (elf64_alpha_relocate_section): Likewise. (elf64_alpha_finish_dynamic_symbol): Likewise. (elf64_alpha_finish_dynamic_sections): Likewise. * elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise. * elf64-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Use elf htab shortcuts to dynamic sections. (sh_elf64_check_relocs): Likewise. (sh64_elf64_adjust_dynamic_symbol): Likewise. (sh64_elf64_size_dynamic_sections): Likewise. (sh64_elf64_finish_dynamic_symbol): Likewise. (sh64_elf64_finish_dynamic_sections): Likewise. * elflink.c (_bfd_elf_create_got_section): Likewise. * elfnn-aarch64.c (aarch64_elf_create_got_section): Likewise. * elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise. (elfNN_ia64_finish_dynamic_sections): Likewise. * elfnn-riscv.c (riscv_elf_create_got_section): Likewise. * elfxx-mips.c (struct mips_elf_link_hash_table): Delete srellt, sgotplt, splt and sgot. (mips_elf_initialize_tls_slots): Use elf htab shortcuts to dynamic sections. (mips_elf_gotplt_index): Likewise. (mips_elf_primary_global_got_index): Likewise. (mips_elf_global_got_index): Likewise. (mips_elf_got_offset_from_index): Likewise. (mips_elf_create_local_got_entry): Likewise. (mips_elf_create_got_section): Likewise. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_create_dynamic_sections): Likewise. (_bfd_mips_elf_adjust_dynamic_symbol): Likewise. (mips_elf_lay_out_got): Likewise. (mips_elf_set_plt_sym_value): Likewise. (_bfd_mips_elf_size_dynamic_sections): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (mips_finish_exec_plt): Likewise. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Likewise. * elfxx-sparc.c (sparc_finish_dyn): Likewise. * elfxx-tilegx.c (tilegx_elf_create_got_section): Likewise.
2016-11-23 05:36:34 +01:00
splt = elf_hash_table (info)->splt;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
for (rel = relocs; rel < relend; rel ++)
{
reloc_howto_type * howto;
unsigned long r_symndx;
Elf_Internal_Sym * sym;
asection * sec;
struct elf_link_hash_entry * h;
bfd_vma relocation;
bfd_reloc_status_type r;
const char * name = NULL;
bfd_boolean unresolved_reloc = TRUE;
int r_type;
r_type = ELF32_R_TYPE (rel->r_info);
r_symndx = ELF32_R_SYM (rel->r_info);
howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
h = NULL;
sym = NULL;
sec = NULL;
relocation = 0;
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
sec = local_sections [r_symndx];
relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
name = bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name);
name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
}
else
{
Pass ignored unresolved relocations to ld backend bfd/ PR ld/4409 * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Add an argument for error ignored. * elf-m10200.c (mn10200_elf_relocate_section): Updated. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-bfin.c (bfinfdpic_relocate_section): Likewise. (bfin_relocate_section): Likewise. * elf32-cr16.c (elf32_cr16_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-epiphany.c (epiphany_elf_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-metag.c (elf_metag_relocate_section): Likewise. * elf32-microblaze.c (microblaze_elf_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_relocate_section): Likewise. * elf32-moxie.c (moxie_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-mt.c (mt_elf_relocate_section): Likewise. * elf32-nios2.c (nios2_elf32_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. * elf32-rx.c (rx_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-ia64-vms.c (elf64_ia64_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Likewise. * elfnn-ia64.c (elfNN_ia64_relocate_section): Skip if error from RELOC_FOR_GLOBAL_SYMBOL in executable is ignored. ld/testsuite/ PR ld/4409 * ld-ia64/error1.d: New file. * ld-ia64/error1.s: Likewise. * ld-ia64/error2.d: Likewise. * ld-ia64/error3.d: Likewise.
2013-11-05 19:29:44 +01:00
bfd_boolean warned ATTRIBUTE_UNUSED;
bfd_boolean ignored ATTRIBUTE_UNUSED;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
r_symndx, symtab_hdr, sym_hashes, h,
sec, relocation, unresolved_reloc,
Pass ignored unresolved relocations to ld backend bfd/ PR ld/4409 * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Add an argument for error ignored. * elf-m10200.c (mn10200_elf_relocate_section): Updated. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-bfin.c (bfinfdpic_relocate_section): Likewise. (bfin_relocate_section): Likewise. * elf32-cr16.c (elf32_cr16_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-epiphany.c (epiphany_elf_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-metag.c (elf_metag_relocate_section): Likewise. * elf32-microblaze.c (microblaze_elf_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_relocate_section): Likewise. * elf32-moxie.c (moxie_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-mt.c (mt_elf_relocate_section): Likewise. * elf32-nios2.c (nios2_elf32_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. * elf32-rx.c (rx_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-ia64-vms.c (elf64_ia64_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Likewise. * elfnn-ia64.c (elfNN_ia64_relocate_section): Skip if error from RELOC_FOR_GLOBAL_SYMBOL in executable is ignored. ld/testsuite/ PR ld/4409 * ld-ia64/error1.d: New file. * ld-ia64/error1.s: Likewise. * ld-ia64/error2.d: Likewise. * ld-ia64/error3.d: Likewise.
2013-11-05 19:29:44 +01:00
warned, ignored);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
name = h->root.root.string;
}
if (sec != NULL && discarded_section (sec))
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
* elf-bfd.h (RELOC_AGAINST_DISCARDED_SECTION): Handle compound relocations. * elfxx-mips.c (mips_reloc_against_discarded_section): New function. (_bfd_mips_elf_relocate_section): Call it, in place of RELOC_AGAINST_DISCARDED_SECTION. * elf-m10200.c (mn10200_elf_relocate_section): Update arguments to RELOC_AGAINST_DISCARDED_SECTION. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-bfin.c (bfin_relocate_section): Likewise. (bfinfdpic_relocate_section): Likewise. * elf32-cr16.c (elf32_cr16_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-epiphany.c (epiphany_elf_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i370.c (i370_elf_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m32c.c (m32c_elf_relocate_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_relocate_section): Likewise. * elf32-moxie.c (moxie_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-mt.c (mt_elf_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. * elf32-rx.c (rx_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-score.c (s3_bfd_score_elf_relocate_section): Likewise. * elf32-score7.c (s7_bfd_score_elf_relocate_section): Likewise. * elf32-sh.c (sh_elf_relocate_section): Likewise. * elf32-spu.c (spu_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section_r): Likewise. (elf64_alpha_relocate_section): Likewise. * elf64-hppa.c (elf64_hppa_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Likewise. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise. * elfnn-ia64.c (elfNN_ia64_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise.
2012-05-07 05:27:52 +02:00
rel, 1, relend, howto, 0, contents);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_relocatable (info))
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
{
/* This is a relocatable link. We don't have to change
anything, unless the reloc is against a section symbol,
in which case we have to adjust according to where the
section symbol winds up in the output section. */
if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
rel->r_addend += sec->output_offset;
continue;
}
switch (ELF32_R_TYPE (rel->r_info))
{
case R_RL78_DIR16S:
{
bfd_vma *plt_offset;
if (h != NULL)
plt_offset = &h->plt.offset;
else
plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
if (! valid_16bit_address (relocation))
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
{
/* If this is the first time we've processed this symbol,
fill in the plt entry with the correct symbol address. */
if ((*plt_offset & 1) == 0)
{
unsigned int x;
x = 0x000000ec; /* br !!abs24 */
x |= (relocation << 8) & 0xffffff00;
bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
*plt_offset |= 1;
}
relocation = (splt->output_section->vma
+ splt->output_offset
+ (*plt_offset & -2));
if (name)
{
char *newname = bfd_malloc (strlen(name)+5);
strcpy (newname, name);
strcat(newname, ".plt");
_bfd_generic_link_add_one_symbol (info,
input_bfd,
newname,
BSF_FUNCTION | BSF_WEAK,
splt,
(*plt_offset & -2),
0,
1,
0,
0);
}
}
}
break;
}
if (h != NULL && h->root.type == bfd_link_hash_undefweak)
/* If the symbol is undefined and weak
then the relocation resolves to zero. */
relocation = 0;
else
{
if (howto->pc_relative)
{
relocation -= (input_section->output_section->vma
+ input_section->output_offset
+ rel->r_offset);
relocation -= bfd_get_reloc_size (howto);
}
relocation += rel->r_addend;
}
r = bfd_reloc_ok;
#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
/* Opcode relocs are always big endian. Data relocs are bi-endian. */
switch (r_type)
{
case R_RL78_NONE:
break;
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
case R_RL78_RH_RELAX:
break;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
case R_RL78_DIR8S_PCREL:
RANGE (-128, 127);
OP (0) = relocation;
break;
case R_RL78_DIR8S:
RANGE (-128, 255);
OP (0) = relocation;
break;
case R_RL78_DIR8U:
RANGE (0, 255);
OP (0) = relocation;
break;
case R_RL78_DIR16S_PCREL:
RANGE (-32768, 32767);
OP (0) = relocation;
OP (1) = relocation >> 8;
break;
case R_RL78_DIR16S:
if ((relocation & 0xf0000) == 0xf0000)
relocation &= 0xffff;
RANGE (-32768, 65535);
OP (0) = relocation;
OP (1) = relocation >> 8;
break;
case R_RL78_DIR16U:
RANGE (0, 65536);
OP (0) = relocation;
OP (1) = relocation >> 8;
break;
case R_RL78_DIR16:
RANGE (-32768, 65536);
OP (0) = relocation;
OP (1) = relocation >> 8;
break;
case R_RL78_DIR16_REV:
RANGE (-32768, 65536);
OP (1) = relocation;
OP (0) = relocation >> 8;
break;
case R_RL78_DIR3U_PCREL:
RANGE (3, 10);
OP (0) &= 0xf8;
OP (0) |= relocation & 0x07;
break;
case R_RL78_DIR24S_PCREL:
RANGE (-0x800000, 0x7fffff);
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
break;
case R_RL78_DIR24S:
RANGE (-0x800000, 0x7fffff);
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
break;
case R_RL78_DIR32:
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
OP (3) = relocation >> 24;
break;
case R_RL78_DIR32_REV:
OP (3) = relocation;
OP (2) = relocation >> 8;
OP (1) = relocation >> 16;
OP (0) = relocation >> 24;
break;
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
case R_RL78_RH_SFR:
RANGE (0xfff00, 0xfffff);
OP (0) = relocation & 0xff;
break;
case R_RL78_RH_SADDR:
RANGE (0xffe20, 0xfff1f);
OP (0) = relocation & 0xff;
break;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
/* Complex reloc handling: */
case R_RL78_ABS32:
case R_RL78_ABS32_REV:
case R_RL78_ABS24S_PCREL:
case R_RL78_ABS24S:
case R_RL78_ABS16:
case R_RL78_ABS16_REV:
case R_RL78_ABS16S_PCREL:
case R_RL78_ABS16S:
case R_RL78_ABS16U:
case R_RL78_ABS16UL:
case R_RL78_ABS16UW:
case R_RL78_ABS8:
case R_RL78_ABS8U:
case R_RL78_ABS8UL:
case R_RL78_ABS8UW:
case R_RL78_ABS8S_PCREL:
case R_RL78_ABS8S:
case R_RL78_OPneg:
case R_RL78_OPadd:
case R_RL78_OPsub:
case R_RL78_OPmul:
case R_RL78_OPdiv:
case R_RL78_OPshla:
case R_RL78_OPshra:
case R_RL78_OPsctsize:
case R_RL78_OPscttop:
case R_RL78_OPand:
case R_RL78_OPor:
case R_RL78_OPxor:
case R_RL78_OPnot:
case R_RL78_OPmod:
relocation = rl78_compute_complex_reloc (r_type, 0, input_section);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
switch (r_type)
{
case R_RL78_ABS32:
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
OP (3) = relocation >> 24;
break;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
case R_RL78_ABS32_REV:
OP (3) = relocation;
OP (2) = relocation >> 8;
OP (1) = relocation >> 16;
OP (0) = relocation >> 24;
break;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
case R_RL78_ABS24S_PCREL:
case R_RL78_ABS24S:
RANGE (-0x800000, 0x7fffff);
OP (0) = relocation;
OP (1) = relocation >> 8;
OP (2) = relocation >> 16;
break;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
case R_RL78_ABS16:
RANGE (-32768, 65535);
OP (0) = relocation;
OP (1) = relocation >> 8;
break;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
case R_RL78_ABS16_REV:
RANGE (-32768, 65535);
OP (1) = relocation;
OP (0) = relocation >> 8;
break;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
case R_RL78_ABS16S_PCREL:
case R_RL78_ABS16S:
RANGE (-32768, 32767);
OP (0) = relocation;
OP (1) = relocation >> 8;
break;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
case R_RL78_ABS16U:
case R_RL78_ABS16UL:
case R_RL78_ABS16UW:
RANGE (0, 65536);
OP (0) = relocation;
OP (1) = relocation >> 8;
break;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
case R_RL78_ABS8:
RANGE (-128, 255);
OP (0) = relocation;
break;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
case R_RL78_ABS8U:
case R_RL78_ABS8UL:
case R_RL78_ABS8UW:
RANGE (0, 255);
OP (0) = relocation;
break;
case R_RL78_ABS8S_PCREL:
case R_RL78_ABS8S:
RANGE (-128, 127);
OP (0) = relocation;
break;
default:
break;
}
break;
2015-08-12 13:32:43 +02:00
case R_RL78_SYM:
if (r_symndx < symtab_hdr->sh_info)
relocation = sec->output_section->vma + sec->output_offset
+ sym->st_value + rel->r_addend;
else if (h != NULL
&& (h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak))
relocation = h->root.u.def.value
+ sec->output_section->vma
+ sec->output_offset
+ rel->r_addend;
else
{
relocation = 0;
if (h->root.type != bfd_link_hash_undefweak)
_bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
}
(void) rl78_compute_complex_reloc (r_type, relocation, input_section);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
break;
case R_RL78_OPromtop:
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
relocation = get_romstart (info, input_bfd, input_section, rel->r_offset);
(void) rl78_compute_complex_reloc (r_type, relocation, input_section);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
break;
case R_RL78_OPramtop:
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
relocation = get_ramstart (info, input_bfd, input_section, rel->r_offset);
(void) rl78_compute_complex_reloc (r_type, relocation, input_section);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
break;
default:
r = bfd_reloc_notsupported;
break;
}
if (r != bfd_reloc_ok)
{
const char * msg = NULL;
switch (r)
{
case bfd_reloc_overflow:
/* Catch the case of a missing function declaration
and emit a more helpful error message. */
if (r_type == R_RL78_DIR24S_PCREL)
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
msg = _("%B(%A): error: call to undefined function '%s'");
else
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
(*info->callbacks->reloc_overflow)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
(info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
input_bfd, input_section, rel->r_offset);
break;
case bfd_reloc_undefined:
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
(*info->callbacks->undefined_symbol)
(info, name, input_bfd, input_section, rel->r_offset, TRUE);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
break;
case bfd_reloc_other:
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
break;
case bfd_reloc_outofrange:
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
msg = _("%B(%A): internal error: out of range error");
break;
case bfd_reloc_notsupported:
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
msg = _("%B(%A): internal error: unsupported relocation error");
break;
case bfd_reloc_dangerous:
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
msg = _("%B(%A): internal error: dangerous relocation");
break;
default:
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
msg = _("%B(%A): internal error: unknown error");
break;
}
if (msg)
_bfd_error_handler (msg, input_bfd, input_section, name);
}
}
return TRUE;
}
/* Function to set the ELF flag bits. */
static bfd_boolean
rl78_elf_set_private_flags (bfd * abfd, flagword flags)
{
elf_elfheader (abfd)->e_flags = flags;
elf_flags_init (abfd) = TRUE;
return TRUE;
}
static bfd_boolean no_warn_mismatch = FALSE;
void bfd_elf32_rl78_set_target_flags (bfd_boolean);
void
bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
{
no_warn_mismatch = user_no_warn_mismatch;
}
static const char *
rl78_cpu_name (flagword flags)
{
switch (flags & E_FLAG_RL78_CPU_MASK)
{
default: return "";
case E_FLAG_RL78_G10: return "G10";
case E_FLAG_RL78_G13: return "G13";
case E_FLAG_RL78_G14: return "G14";
}
}
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
/* Merge backend specific data from an object file to the output
object file when linking. */
static bfd_boolean
Pass link_info to _bfd_merge_private_bfd_data Most BFD linker functions take a bfd_link_info param, which reinforces the fact that they are linker functions and allow access to linker callbacks, eg. einfo for printing errors. I was going to use einfo for --fatal-warnings support before I decided a better way was the patch commit 4519d071. bfd/ * targets.c (bfd_target <_bfd_merge_private_bfd_data>): Replace obfd param with struct bfd_link_info param. Update all callers. * linker.c (bfd_merge_private_bfd_data): Likewise. (_bfd_generic_verify_endian_match): Likewise. * aoutf1.h (sunos_merge_private_bfd_data): Likewise. * coff-arm.c (coff_arm_merge_private_bfd_data): Likewise. * elf-attrs.c (_bfd_elf_merge_object_attributes): Likewise. * elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Likewise. (_bfd_elf_merge_object_attributes): Likewise. * elf-m10300.c (_bfd_mn10300_elf_merge_private_bfd_data): Likewise. * elf-s390-common.c (elf_s390_merge_obj_attributes): Likewise. * elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise. * elf32-arm.c (elf32_arm_merge_eabi_attributes): Likewise. (elf32_arm_merge_private_bfd_data): Likewise. * elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Likewise. * elf32-cr16.c (_bfd_cr16_elf_merge_private_bfd_data): Likewise. * elf32-cris.c (cris_elf_merge_private_bfd_data): Likewise. * elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise. * elf32-h8300.c (elf32_h8_merge_private_bfd_data): Likewise. * elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise. * elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise. * elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise. * elf32-m32r.c (m32r_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.h (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Likewise. * elf32-mcore.c (mcore_elf_merge_private_bfd_data): Likewise. * elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise. * elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Likewise. (elf32_msp430_merge_private_bfd_data): Likewise. * elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise. * elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise. * elf32-nios2.c (nios2_elf32_merge_private_bfd_data): Likewise. * elf32-or1k.c (elf32_or1k_merge_private_bfd_data): Likewise. * elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Likewise. (ppc_elf_merge_obj_attributes): Likewise. (ppc_elf_merge_private_bfd_data): Likewise. * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Likewise. * elf32-rx.c (rx_elf_merge_private_bfd_data): Likewise. * elf32-s390.c (elf32_s390_merge_private_bfd_data): Likewise. * elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise. (elf32_score_merge_private_bfd_data): Likewise. * elf32-score.h (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-sh.c (sh_merge_bfd_arch, sh_elf_merge_private_data): Likewise. * elf32-sh64.c (sh64_elf_merge_private_data): Likewise. * elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Likewise. * elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise. (elf32_tic6x_merge_private_bfd_data): Likewise. * elf32-v850.c (v850_elf_merge_private_bfd_data): Likewise. * elf32-vax.c (elf32_vax_merge_private_bfd_data): Likewise. * elf32-visium.c (visium_elf_merge_private_bfd_data): Likewise. * elf32-xtensa.c (elf_xtensa_merge_private_bfd_data): Likewise. * elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise. * elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Likewise. * elf64-s390.c (elf64_s390_merge_private_bfd_data): Likewise. * elf64-sh64.c (sh_elf64_merge_private_data): Likewise. * elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise. * elfnn-aarch64.c (elfNN_aarch64_merge_private_bfd_data): Likewise. * elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise. * elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise. (mips_elf_merge_obj_attributes): Likewise. (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elfxx-mips.h (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): Likewise. * elfxx-sparc.h (_bfd_sparc_elf_merge_private_bfd_data): Likewise. * elfxx-target.h (bfd_elfNN_bfd_merge_private_bfd_data): Likewise. * elfxx-tilegx.c (_bfd_tilegx_elf_merge_private_bfd_data): Likewise. * elfxx-tilegx.h (_bfd_tilegx_elf_merge_private_bfd_data): Likewise. * libbfd-in.h (_bfd_generic_bfd_merge_private_bfd_data): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. ld/ * ldlang.c (lang_check): Update bfd_merge_private_bfd_data call.
2016-09-30 01:14:50 +02:00
rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
{
Pass link_info to _bfd_merge_private_bfd_data Most BFD linker functions take a bfd_link_info param, which reinforces the fact that they are linker functions and allow access to linker callbacks, eg. einfo for printing errors. I was going to use einfo for --fatal-warnings support before I decided a better way was the patch commit 4519d071. bfd/ * targets.c (bfd_target <_bfd_merge_private_bfd_data>): Replace obfd param with struct bfd_link_info param. Update all callers. * linker.c (bfd_merge_private_bfd_data): Likewise. (_bfd_generic_verify_endian_match): Likewise. * aoutf1.h (sunos_merge_private_bfd_data): Likewise. * coff-arm.c (coff_arm_merge_private_bfd_data): Likewise. * elf-attrs.c (_bfd_elf_merge_object_attributes): Likewise. * elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Likewise. (_bfd_elf_merge_object_attributes): Likewise. * elf-m10300.c (_bfd_mn10300_elf_merge_private_bfd_data): Likewise. * elf-s390-common.c (elf_s390_merge_obj_attributes): Likewise. * elf32-arc.c (arc_elf_merge_private_bfd_data): Likewise. * elf32-arm.c (elf32_arm_merge_eabi_attributes): Likewise. (elf32_arm_merge_private_bfd_data): Likewise. * elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Likewise. * elf32-cr16.c (_bfd_cr16_elf_merge_private_bfd_data): Likewise. * elf32-cris.c (cris_elf_merge_private_bfd_data): Likewise. * elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise. * elf32-h8300.c (elf32_h8_merge_private_bfd_data): Likewise. * elf32-i370.c (i370_elf_merge_private_bfd_data): Likewise. * elf32-iq2000.c (iq2000_elf_merge_private_bfd_data): Likewise. * elf32-m32c.c (m32c_elf_merge_private_bfd_data): Likewise. * elf32-m32r.c (m32r_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.c (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-m68hc1x.h (_bfd_m68hc11_elf_merge_private_bfd_data): Likewise. * elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Likewise. * elf32-mcore.c (mcore_elf_merge_private_bfd_data): Likewise. * elf32-mep.c (mep_elf_merge_private_bfd_data): Likewise. * elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Likewise. (elf32_msp430_merge_private_bfd_data): Likewise. * elf32-mt.c (mt_elf_merge_private_bfd_data): Likewise. * elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise. * elf32-nios2.c (nios2_elf32_merge_private_bfd_data): Likewise. * elf32-or1k.c (elf32_or1k_merge_private_bfd_data): Likewise. * elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Likewise. (ppc_elf_merge_obj_attributes): Likewise. (ppc_elf_merge_private_bfd_data): Likewise. * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Likewise. * elf32-rx.c (rx_elf_merge_private_bfd_data): Likewise. * elf32-s390.c (elf32_s390_merge_private_bfd_data): Likewise. * elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise. (elf32_score_merge_private_bfd_data): Likewise. * elf32-score.h (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-sh.c (sh_merge_bfd_arch, sh_elf_merge_private_data): Likewise. * elf32-sh64.c (sh64_elf_merge_private_data): Likewise. * elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Likewise. * elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise. (elf32_tic6x_merge_private_bfd_data): Likewise. * elf32-v850.c (v850_elf_merge_private_bfd_data): Likewise. * elf32-vax.c (elf32_vax_merge_private_bfd_data): Likewise. * elf32-visium.c (visium_elf_merge_private_bfd_data): Likewise. * elf32-xtensa.c (elf_xtensa_merge_private_bfd_data): Likewise. * elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise. * elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Likewise. * elf64-s390.c (elf64_s390_merge_private_bfd_data): Likewise. * elf64-sh64.c (sh_elf64_merge_private_data): Likewise. * elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise. * elfnn-aarch64.c (elfNN_aarch64_merge_private_bfd_data): Likewise. * elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise. * elfxx-mips.c (mips_elf_merge_obj_e_flags): Likewise. (mips_elf_merge_obj_attributes): Likewise. (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elfxx-mips.h (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): Likewise. * elfxx-sparc.h (_bfd_sparc_elf_merge_private_bfd_data): Likewise. * elfxx-target.h (bfd_elfNN_bfd_merge_private_bfd_data): Likewise. * elfxx-tilegx.c (_bfd_tilegx_elf_merge_private_bfd_data): Likewise. * elfxx-tilegx.h (_bfd_tilegx_elf_merge_private_bfd_data): Likewise. * libbfd-in.h (_bfd_generic_bfd_merge_private_bfd_data): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. ld/ * ldlang.c (lang_check): Update bfd_merge_private_bfd_data call.
2016-09-30 01:14:50 +02:00
bfd *obfd = info->output_bfd;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
flagword new_flags;
flagword old_flags;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
bfd_boolean error = FALSE;
new_flags = elf_elfheader (ibfd)->e_flags;
old_flags = elf_elfheader (obfd)->e_flags;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
if (!elf_flags_init (obfd))
{
/* First call, no flags set. */
elf_flags_init (obfd) = TRUE;
elf_elfheader (obfd)->e_flags = new_flags;
}
else if (old_flags != new_flags)
{
flagword changed_flags = old_flags ^ new_flags;
if (changed_flags & E_FLAG_RL78_CPU_MASK)
{
flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK;
flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK;
if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu)
/* It does not matter what new_cpu may have. */;
else if (out_cpu == E_FLAG_RL78_ANY_CPU)
{
if (in_cpu == E_FLAG_RL78_G10)
{
/* G10 files can only be linked with other G10 files.
If the output is set to "any" this means that it is
a G14 file that does not use hardware multiply/divide,
but that is still incompatible with the G10 ABI. */
error = TRUE;
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
(_("RL78 ABI conflict: G10 file %s cannot be linked with %s file %s"),
bfd_get_filename (ibfd),
rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
}
else
{
old_flags &= ~ E_FLAG_RL78_CPU_MASK;
old_flags |= in_cpu;
elf_elfheader (obfd)->e_flags = old_flags;
}
}
else
{
error = TRUE;
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
(_("RL78 ABI conflict: cannot link %s file %s with %s file %s"),
rl78_cpu_name (in_cpu), bfd_get_filename (ibfd),
rl78_cpu_name (out_cpu), bfd_get_filename (obfd));
}
}
if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
{
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler
(_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler (_("- %s is 64-bit, %s is not"),
bfd_get_filename (obfd), bfd_get_filename (ibfd));
else
Add c-format tags to translatable strings with more than one argument-using formatting token. * aout-adobe.c: Add missing c-format tags for translatable strings. * aout-cris.c: Likewise. * aoutx.h: Likewise. * bfd.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * cpu-arm.c: Likewise. * dwarf2.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * m68klinux.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * ppcboot.c: Likewise. * reloc.c: Likewise. * sparclinux.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. * xcofflink.c: Likewise.
2016-10-19 15:04:34 +02:00
/* xgettext:c-format */
Remove syntactic sugar Now that _bfd_error_handler is not a function pointer. * aout-adobe.c: Replace (*_bfd_error_handler) (...) with _bfd_error_handler (...) throughout. * aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c, * coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c, * ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c, * ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c, * mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c, * pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c, * rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c, * stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * xcofflink.c: Likewise.
2016-09-30 05:30:18 +02:00
_bfd_error_handler (_("- %s is 64-bit, %s is not"),
bfd_get_filename (ibfd), bfd_get_filename (obfd));
error = TRUE;
2015-08-12 13:32:43 +02:00
}
}
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
return !error;
}
static bfd_boolean
rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
{
FILE * file = (FILE *) ptr;
flagword flags;
BFD_ASSERT (abfd != NULL && ptr != NULL);
/* Print normal ELF private data. */
_bfd_elf_print_private_bfd_data (abfd, ptr);
flags = elf_elfheader (abfd)->e_flags;
fprintf (file, _("private flags = 0x%lx:"), (long) flags);
if (flags & E_FLAG_RL78_CPU_MASK)
fprintf (file, " [%s]", rl78_cpu_name (flags));
if (flags & E_FLAG_RL78_64BIT_DOUBLES)
fprintf (file, _(" [64-bit doubles]"));
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
fputc ('\n', file);
return TRUE;
}
/* Return the MACH for an e_flags value. */
static int
elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
{
return bfd_mach_rl78;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
}
static bfd_boolean
rl78_elf_object_p (bfd * abfd)
{
bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
elf32_rl78_machine (abfd));
return TRUE;
}
/* support PLT for 16-bit references to 24-bit functions. */
/* We support 16-bit pointers to code above 64k by generating a thunk
below 64k containing a JMP instruction to the final address. */
Remove trailing white spaces in bfd * aout0.c: Remove trailing white spaces. * archive.c: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd-in2.h: Likewise. * coff-alpha.c: Likewise. * coff-i860.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-tic80.c: Likewise. * coff-x86_64.c: Likewise. * coff-z80.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * compress.c: Likewise. * corefile.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-crx.c: Likewise. * cpu-h8300.c: Likewise. * cpu-i386.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m68k.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-sh.c: Likewise. * cpu-xc16x.c: Likewise. * dwarf2.c: Likewise. * ecofflink.c: Likewise. * ecoffswap.h: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-vxworks.c: Likewise. * elf32-avr.c: Likewise. * elf32-avr.h: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.h: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-v850.c: Likewise. * elf32-xc16x.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * libcoff.h: Likewise. * libpei.h: Likewise. * libxcoff.h: Likewise. * linker.c: Likewise. * mach-o-i386.c: Likewise. * mach-o-target.c: Likewise. * mach-o.c: Likewise. * mach-o.h: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pdp11.c: Likewise. * pe-x86_64.c: Likewise. * peXXigen.c: Likewise. * pef-traceback.h: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. * riscix.c: Likewise. * section.c: Likewise. * som.c: Likewise. * syms.c: Likewise. * tekhex.c: Likewise. * ticoff.h: Likewise. * vaxbsd.c: Likewise. * xcofflink.c: Likewise. * xtensa-isa.c: Likewise.
2013-01-10 21:03:55 +01:00
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
static bfd_boolean
rl78_elf_check_relocs
(bfd * abfd,
struct bfd_link_info * info,
asection * sec,
const Elf_Internal_Rela * relocs)
{
Elf_Internal_Shdr * symtab_hdr;
struct elf_link_hash_entry ** sym_hashes;
const Elf_Internal_Rela * rel;
const Elf_Internal_Rela * rel_end;
bfd_vma *local_plt_offsets;
asection *splt;
bfd *dynobj;
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_relocatable (info))
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
return TRUE;
Remove trailing white spaces in bfd * aout0.c: Remove trailing white spaces. * archive.c: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd-in2.h: Likewise. * coff-alpha.c: Likewise. * coff-i860.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-tic80.c: Likewise. * coff-x86_64.c: Likewise. * coff-z80.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * compress.c: Likewise. * corefile.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-crx.c: Likewise. * cpu-h8300.c: Likewise. * cpu-i386.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m68k.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-sh.c: Likewise. * cpu-xc16x.c: Likewise. * dwarf2.c: Likewise. * ecofflink.c: Likewise. * ecoffswap.h: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-vxworks.c: Likewise. * elf32-avr.c: Likewise. * elf32-avr.h: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.h: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-v850.c: Likewise. * elf32-xc16x.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * libcoff.h: Likewise. * libpei.h: Likewise. * libxcoff.h: Likewise. * linker.c: Likewise. * mach-o-i386.c: Likewise. * mach-o-target.c: Likewise. * mach-o.c: Likewise. * mach-o.h: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pdp11.c: Likewise. * pe-x86_64.c: Likewise. * peXXigen.c: Likewise. * pef-traceback.h: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. * riscix.c: Likewise. * section.c: Likewise. * som.c: Likewise. * syms.c: Likewise. * tekhex.c: Likewise. * ticoff.h: Likewise. * vaxbsd.c: Likewise. * xcofflink.c: Likewise. * xtensa-isa.c: Likewise.
2013-01-10 21:03:55 +01:00
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (abfd);
local_plt_offsets = elf_local_got_offsets (abfd);
dynobj = elf_hash_table(info)->dynobj;
rel_end = relocs + sec->reloc_count;
for (rel = relocs; rel < rel_end; rel++)
{
struct elf_link_hash_entry *h;
unsigned long r_symndx;
bfd_vma *offset;
Remove trailing white spaces in bfd * aout0.c: Remove trailing white spaces. * archive.c: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd-in2.h: Likewise. * coff-alpha.c: Likewise. * coff-i860.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-tic80.c: Likewise. * coff-x86_64.c: Likewise. * coff-z80.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * compress.c: Likewise. * corefile.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-crx.c: Likewise. * cpu-h8300.c: Likewise. * cpu-i386.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m68k.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-sh.c: Likewise. * cpu-xc16x.c: Likewise. * dwarf2.c: Likewise. * ecofflink.c: Likewise. * ecoffswap.h: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-vxworks.c: Likewise. * elf32-avr.c: Likewise. * elf32-avr.h: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.h: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-v850.c: Likewise. * elf32-xc16x.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * libcoff.h: Likewise. * libpei.h: Likewise. * libxcoff.h: Likewise. * linker.c: Likewise. * mach-o-i386.c: Likewise. * mach-o-target.c: Likewise. * mach-o.c: Likewise. * mach-o.h: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pdp11.c: Likewise. * pe-x86_64.c: Likewise. * peXXigen.c: Likewise. * pef-traceback.h: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. * riscix.c: Likewise. * section.c: Likewise. * som.c: Likewise. * syms.c: Likewise. * tekhex.c: Likewise. * ticoff.h: Likewise. * vaxbsd.c: Likewise. * xcofflink.c: Likewise. * xtensa-isa.c: Likewise.
2013-01-10 21:03:55 +01:00
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
r_symndx = ELF32_R_SYM (rel->r_info);
if (r_symndx < symtab_hdr->sh_info)
h = NULL;
else
{
h = sym_hashes[r_symndx - symtab_hdr->sh_info];
while (h->root.type == bfd_link_hash_indirect
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
PR ld/15323 bfd/ * elf-m10300.c (mn10300_elf_check_relocs): Set non_ir_ref for global symbols referenced by relocs. * elf32-arm.c (elf32_arm_check_relocs): Likewise. * elf32-bfin.c (bfin_check_relocs): Likewise. * elf32-cr16.c (cr16_elf_check_relocs): Likewise. * elf32-cris.c (cris_elf_check_relocs): Likewise. * elf32-d10v.c (elf32_d10v_check_relocs): Likewise. * elf32-dlx.c (elf32_dlx_check_relocs): Likewise. * elf32-fr30.c (fr30_elf_check_relocs): Likewise. * elf32-frv.c (elf32_frv_check_relocs): Likewise. * elf32-hppa.c (elf32_hppa_check_relocs): Likewise. * elf32-i370.c (i370_elf_check_relocs): Likewise. * elf32-iq2000.c (iq2000_elf_check_relocs): Likewise. * elf32-lm32.c (lm32_elf_check_relocs): Likewise. * elf32-m32c.c (m32c_elf_check_relocs): Likewise. * elf32-m32r.c (m32r_elf_check_relocs): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_check_relocs): Likewise. * elf32-m68k.c (elf_m68k_check_relocs): Likewise. * elf32-mcore.c (mcore_elf_check_relocs): Likewise. * elf32-metag.c (elf_metag_check_relocs): Likewise. * elf32-microblaze.c (microblaze_elf_check_relocs): Likewise. * elf32-moxie.c (moxie_elf_check_relocs): Likewise. * elf32-msp430.c (elf32_msp430_check_relocs): Likewise. * elf32-mt.c (mt_elf_check_relocs): Likewise. * elf32-nios2.c (nios2_elf32_check_relocs): Likewise. * elf32-openrisc.c (openrisc_elf_check_relocs): Likewise. * elf32-ppc.c (ppc_elf_check_relocs): Likewise. * elf32-rl78.c (rl78_elf_check_relocs): Likewise. * elf32-s390.c (elf_s390_check_relocs): Likewise. * elf32-score.c (s3_bfd_score_elf_check_relocs): Likewise. * elf32-score7.c (s7_bfd_score_elf_check_relocs): Likewise. * elf32-sh.c (sh_elf_check_relocs): Likewise. * elf32-tic6x.c (elf32_tic6x_check_relocs): Likewise. * elf32-tilepro.c (tilepro_elf_check_relocs): Likewise. * elf32-v850.c (v850_elf_check_relocs): Likewise. * elf32-vax.c (elf_vax_check_relocs): Likewise. * elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise. * elf32-xtensa.c (elf_xtensa_check_relocs): Likewise. * elf64-aarch64.c (elf64_aarch64_check_relocs): Likewise. * elf64-alpha.c (elf64_alpha_check_relocs): Likewise. * elf64-hppa.c (elf64_hppa_check_relocs): Likewise. * elf64-ia64-vms.c (elf64_ia64_check_relocs): Likewise. * elf64-mmix.c (mmix_elf_check_relocs): Likewise. * elf64-ppc.c (ppc64_elf_check_relocs): Likewise. * elf64-s390.c (elf_s390_check_relocs): Likewise. * elf64-sh64.c (sh_elf64_check_relocs): Likewise. * elfnn-ia64.c (elfNN_ia64_check_relocs): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise. * elfxx-tilegx.c (tilegx_elf_check_relocs): Likewise. * elfxx-mips.c (_bfd_mips_elf_check_relocs): Likewise. Don't test indirect/warning links for NULL. ld/testsuite/ * ld-plugin/lto.exp (pr15323a.c): Compile without -flto rather than using -r to effectively strip out lto info.
2013-03-30 11:14:15 +01:00
/* PR15323, ref flags aren't set for references in the same
object. */
h->root.non_ir_ref = 1;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
}
Remove trailing white spaces in bfd * aout0.c: Remove trailing white spaces. * archive.c: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd-in2.h: Likewise. * coff-alpha.c: Likewise. * coff-i860.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-tic80.c: Likewise. * coff-x86_64.c: Likewise. * coff-z80.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * compress.c: Likewise. * corefile.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-crx.c: Likewise. * cpu-h8300.c: Likewise. * cpu-i386.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m68k.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-sh.c: Likewise. * cpu-xc16x.c: Likewise. * dwarf2.c: Likewise. * ecofflink.c: Likewise. * ecoffswap.h: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-vxworks.c: Likewise. * elf32-avr.c: Likewise. * elf32-avr.h: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.h: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-v850.c: Likewise. * elf32-xc16x.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * libcoff.h: Likewise. * libpei.h: Likewise. * libxcoff.h: Likewise. * linker.c: Likewise. * mach-o-i386.c: Likewise. * mach-o-target.c: Likewise. * mach-o.c: Likewise. * mach-o.h: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pdp11.c: Likewise. * pe-x86_64.c: Likewise. * peXXigen.c: Likewise. * pef-traceback.h: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. * riscix.c: Likewise. * section.c: Likewise. * som.c: Likewise. * syms.c: Likewise. * tekhex.c: Likewise. * ticoff.h: Likewise. * vaxbsd.c: Likewise. * xcofflink.c: Likewise. * xtensa-isa.c: Likewise.
2013-01-10 21:03:55 +01:00
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
switch (ELF32_R_TYPE (rel->r_info))
{
/* This relocation describes a 16-bit pointer to a function.
We may need to allocate a thunk in low memory; reserve memory
for it now. */
case R_RL78_DIR16S:
if (dynobj == NULL)
elf_hash_table (info)->dynobj = dynobj = abfd;
Delete duplicate target short-cuts to dynamic sections We'd like to have the elf_link_hash_table srelplt field rather than some private target field used to save short-cuts to a PLT relocation section. This save a little space but mainly is so that the generic ELF code can access the field. Ditto for other dynamic sections. * elf-m10300.c (mn10300_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (mn10300_elf_final_link_relocate): Likewise. (_bfd_mn10300_elf_adjust_dynamic_symbol): Likewise. (_bfd_mn10300_elf_size_dynamic_sections): Likewise. (_bfd_mn10300_elf_finish_dynamic_symbol): Likewise. (_bfd_mn10300_elf_finish_dynamic_sections): Likewise. * elf32-bfin.c (bfin_check_relocs): Likewise. (bfin_relocate_section): Likewise. (bfin_gc_sweep_hook): Likewise. (struct bfinfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (bfinfdpic_got_section, bfinfdpic_gotrel_section, bfinfdpic_plt_section, bfinfdpic_pltrel_section): Define using elf shortcut sections. (_bfin_create_got_section): Use elf htab shortcuts to dyn sections. Delete dead code. (bfin_finish_dynamic_symbol): Use elf htab shortcuts to dyn sections. (bfin_size_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_create_got_section): Likewise. (cr16_elf_check_relocs): Likewise. (cr16_elf_final_link_relocate): Likewise. (_bfd_cr16_elf_create_dynamic_sections): Likewise. (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise. (_bfd_cr16_elf_size_dynamic_sections): Likewise. (_bfd_cr16_elf_finish_dynamic_symbol): Likewise. (_bfd_cr16_elf_finish_dynamic_sections): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. (elf_cris_finish_dynamic_symbol): Likewise. (elf_cris_finish_dynamic_sections): Likewise. (cris_elf_gc_sweep_hook): Likewise. (elf_cris_adjust_gotplt_to_got): Likewise. (elf_cris_adjust_dynamic_symbol): Likewise. (cris_elf_check_relocs): Likewise. Delete dead code. (elf_cris_size_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_cris_discard_excess_program_dynamics): Likewise. * elf32-frv.c (struct frvfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (frvfdpic_got_section, frvfdpic_gotrel_section, frvfdpic_plt_section, frvfdpic_pltrel_section): Define using elf shortcut sections. (_frv_create_got_section): Likewise. * elf32-hppa.c (struct elf32_hppa_link_hash_table): Delete sgot, srelgot, splt and srelplt. (hppa_build_one_stub): Use elf htab shortcuts to dynamic sections. (elf32_hppa_create_dynamic_sections): Likewise. (elf32_hppa_check_relocs): Likewise. (allocate_plt_static): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_size_dynamic_sections): Likewise. (elf32_hppa_relocate_section): Likewise. (elf32_hppa_finish_dynamic_symbol): Likewise. (elf32_hppa_finish_dynamic_sections): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-lm32.c (struct elf_lm32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (lm32fdpic_got_section, lm32fdpic_gotrel_section): Define using elf shortcut sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (lm32_elf_relocate_section): Use elf htab shortcuts to dyn sections. (lm32_elf_check_relocs): Likewise. (lm32_elf_finish_dynamic_sections): Likewise. (lm32_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_size_dynamic_sections): Likewise. (lm32_elf_create_dynamic_sections): Likewise. * elf32-m32c.c (m32c_elf_relocate_section): Likewise. (m32c_elf_check_relocs): Likewise. (m32c_elf_finish_dynamic_sections): Likewise. (m32c_elf_always_size_sections): Likewise. * elf32-m32r.c (struct elf_m32r_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (m32r_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (m32r_elf_size_dynamic_sections): Likewise. (m32r_elf_relocate_section): Likewise. (m32r_elf_finish_dynamic_symbol): Likewise. (m32r_elf_finish_dynamic_sections): Likewise. (m32r_elf_check_relocs): Likewise. * elf32-m68k.c (elf_m68k_partition_multi_got): Likewise. (elf_m68k_check_relocs): Likewise. (elf_m68k_adjust_dynamic_symbol): Likewise. (elf_m68k_size_dynamic_sections): Likewise. (elf_m68k_relocate_section): Likewise. (elf_m68k_finish_dynamic_symbol): Likewise. (elf_m68k_finish_dynamic_sections): Likewise. * elf32-metag.c (struct elf_metag_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_metag_relocate_section): Use elf htab shortcuts to dynamic sections. (elf_metag_create_dynamic_sections): Likewise. Allocate got header here in .got. (elf_metag_check_relocs): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (elf_metag_size_dynamic_sections): Likewise. (elf_metag_finish_dynamic_symbol): Likewise. (elf_metag_finish_dynamic_sections): Likewise. (elf_metag_size_stubs): Likewise. (elf_backend_got_header_size): Don't define. (elf_backend_want_got_plt): Define. * elf32-microblaze.c (struct elf32_mb_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelpl. (microblaze_elf_relocate_section): Use elf htab shortcuts to dynamic sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (microblaze_elf_check_relocs): Use elf htab shortcuts to dyn sections. (microblaze_elf_create_dynamic_sections): Likewise. (allocate_dynrelocs): Likewise. (microblaze_elf_size_dynamic_sections): Likewise. (microblaze_elf_finish_dynamic_symbol): Likewise. (microblaze_elf_finish_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create): Don't NULL already zero fields. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (nds32_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (nds32_elf_size_dynamic_sections): Likewise. (nds32_elf_relocate_section): Likewise. (nds32_elf_finish_dynamic_symbol): Likewise. (nds32_elf_finish_dynamic_sections): Likewise. (nds32_elf_check_relocs): Likewise. (calculate_plt_memory_address): Likewise. (calculate_got_memory_address): Likewise. * elf32-nds32.h (struct elf_nds32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. * elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise. (or1k_elf_relocate_section): Use elf htab shortcuts to dyn sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (or1k_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (or1k_elf_finish_dynamic_sections): Likewise. (or1k_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_size_dynamic_sections): Likewise. (or1k_elf_create_dynamic_sections): Likewise. * elf32-ppc.c (struct ppc_elf_link_hash_table): Delete got, relgot, plt, relplt, iplt, reliplt and sgotplt. (ppc_elf_create_got): Use elf htab shortcuts to dynamic sections. (ppc_elf_create_glink): Likewise. (ppc_elf_create_dynamic_sections): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_select_plt_layout): Likewise. (ppc_elf_tls_setup): Likewise. (allocate_got): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_reloc_type_class): Likewise. (ppc_elf_finish_dynamic_sections): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. (rl78_elf_check_relocs): Likewise. (rl78_elf_finish_dynamic_sections): Likewise. (rl78_elf_always_size_sections): Likewise. * elf32-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section): Set elf shortcuts. (s3_bfd_score_elf_finish_dynamic_sections): Use elf shortcuts. * elf32-score7.c (score_elf_create_got_section): As above. (s7_bfd_score_elf_finish_dynamic_sections): As above. * elf32-sh.c (struct elf_sh_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Don't set them. (sh_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (sh_elf_size_dynamic_sections): Likewise. (sh_elf_add_rofixup): Likewise. (sh_elf_relocate_section): Likewise. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol): Likewise. (sh_elf_finish_dynamic_sections): Likewise. * elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_create_got_section): Likewise. * elf32-vax.c (elf_vax_check_relocs): Likewise. (elf_vax_adjust_dynamic_symbol): Likewise. (elf_vax_always_size_sections): Likewise. (elf_vax_instantiate_got_entries): Likewise. (elf_vax_relocate_section): Likewise. (elf_vax_finish_dynamic_symbol): Likewise. (elf_vax_finish_dynamic_sections): Likewise. * elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise. (xstormy16_elf_always_size_sections): Likewise. (xstormy16_elf_relocate_section): Likewise. (xstormy16_elf_finish_dynamic_sections): Likewise. * elf32-xtensa.c (struct elf_xtensa_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_xtensa_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_xtensa_allocate_dynrelocs): Likewise. (elf_xtensa_allocate_local_got_size): Likewise. (elf_xtensa_size_dynamic_sections): Likewise. (elf_xtensa_relocate_section): Likewise. (elf_xtensa_finish_dynamic_sections): Likewise. (shrink_dynamic_reloc_sections): Likewise. (elf_xtensa_get_plt_section): Likewise. (elf_xtensa_get_gotplt_section): Likewise. (xtensa_callback_required_dependence): Likewise. * elf64-alpha.c (elf64_alpha_create_dynamic_sections): Set elf htab shortcuts to dynamic sections. (elf64_alpha_adjust_dynamic_symbol): Use elf htab shortcuts to dynamic sections. (elf64_alpha_size_plt_section): Likewise. (elf64_alpha_size_rela_got_1): Likewise. (elf64_alpha_size_rela_got_section): Likewise. (elf64_alpha_relocate_section): Likewise. (elf64_alpha_finish_dynamic_symbol): Likewise. (elf64_alpha_finish_dynamic_sections): Likewise. * elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise. * elf64-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Use elf htab shortcuts to dynamic sections. (sh_elf64_check_relocs): Likewise. (sh64_elf64_adjust_dynamic_symbol): Likewise. (sh64_elf64_size_dynamic_sections): Likewise. (sh64_elf64_finish_dynamic_symbol): Likewise. (sh64_elf64_finish_dynamic_sections): Likewise. * elflink.c (_bfd_elf_create_got_section): Likewise. * elfnn-aarch64.c (aarch64_elf_create_got_section): Likewise. * elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise. (elfNN_ia64_finish_dynamic_sections): Likewise. * elfnn-riscv.c (riscv_elf_create_got_section): Likewise. * elfxx-mips.c (struct mips_elf_link_hash_table): Delete srellt, sgotplt, splt and sgot. (mips_elf_initialize_tls_slots): Use elf htab shortcuts to dynamic sections. (mips_elf_gotplt_index): Likewise. (mips_elf_primary_global_got_index): Likewise. (mips_elf_global_got_index): Likewise. (mips_elf_got_offset_from_index): Likewise. (mips_elf_create_local_got_entry): Likewise. (mips_elf_create_got_section): Likewise. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_create_dynamic_sections): Likewise. (_bfd_mips_elf_adjust_dynamic_symbol): Likewise. (mips_elf_lay_out_got): Likewise. (mips_elf_set_plt_sym_value): Likewise. (_bfd_mips_elf_size_dynamic_sections): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (mips_finish_exec_plt): Likewise. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Likewise. * elfxx-sparc.c (sparc_finish_dyn): Likewise. * elfxx-tilegx.c (tilegx_elf_create_got_section): Likewise.
2016-11-23 05:36:34 +01:00
splt = elf_hash_table (info)->splt;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
if (splt == NULL)
{
Delete duplicate target short-cuts to dynamic sections We'd like to have the elf_link_hash_table srelplt field rather than some private target field used to save short-cuts to a PLT relocation section. This save a little space but mainly is so that the generic ELF code can access the field. Ditto for other dynamic sections. * elf-m10300.c (mn10300_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (mn10300_elf_final_link_relocate): Likewise. (_bfd_mn10300_elf_adjust_dynamic_symbol): Likewise. (_bfd_mn10300_elf_size_dynamic_sections): Likewise. (_bfd_mn10300_elf_finish_dynamic_symbol): Likewise. (_bfd_mn10300_elf_finish_dynamic_sections): Likewise. * elf32-bfin.c (bfin_check_relocs): Likewise. (bfin_relocate_section): Likewise. (bfin_gc_sweep_hook): Likewise. (struct bfinfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (bfinfdpic_got_section, bfinfdpic_gotrel_section, bfinfdpic_plt_section, bfinfdpic_pltrel_section): Define using elf shortcut sections. (_bfin_create_got_section): Use elf htab shortcuts to dyn sections. Delete dead code. (bfin_finish_dynamic_symbol): Use elf htab shortcuts to dyn sections. (bfin_size_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_create_got_section): Likewise. (cr16_elf_check_relocs): Likewise. (cr16_elf_final_link_relocate): Likewise. (_bfd_cr16_elf_create_dynamic_sections): Likewise. (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise. (_bfd_cr16_elf_size_dynamic_sections): Likewise. (_bfd_cr16_elf_finish_dynamic_symbol): Likewise. (_bfd_cr16_elf_finish_dynamic_sections): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. (elf_cris_finish_dynamic_symbol): Likewise. (elf_cris_finish_dynamic_sections): Likewise. (cris_elf_gc_sweep_hook): Likewise. (elf_cris_adjust_gotplt_to_got): Likewise. (elf_cris_adjust_dynamic_symbol): Likewise. (cris_elf_check_relocs): Likewise. Delete dead code. (elf_cris_size_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_cris_discard_excess_program_dynamics): Likewise. * elf32-frv.c (struct frvfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (frvfdpic_got_section, frvfdpic_gotrel_section, frvfdpic_plt_section, frvfdpic_pltrel_section): Define using elf shortcut sections. (_frv_create_got_section): Likewise. * elf32-hppa.c (struct elf32_hppa_link_hash_table): Delete sgot, srelgot, splt and srelplt. (hppa_build_one_stub): Use elf htab shortcuts to dynamic sections. (elf32_hppa_create_dynamic_sections): Likewise. (elf32_hppa_check_relocs): Likewise. (allocate_plt_static): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_size_dynamic_sections): Likewise. (elf32_hppa_relocate_section): Likewise. (elf32_hppa_finish_dynamic_symbol): Likewise. (elf32_hppa_finish_dynamic_sections): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-lm32.c (struct elf_lm32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (lm32fdpic_got_section, lm32fdpic_gotrel_section): Define using elf shortcut sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (lm32_elf_relocate_section): Use elf htab shortcuts to dyn sections. (lm32_elf_check_relocs): Likewise. (lm32_elf_finish_dynamic_sections): Likewise. (lm32_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_size_dynamic_sections): Likewise. (lm32_elf_create_dynamic_sections): Likewise. * elf32-m32c.c (m32c_elf_relocate_section): Likewise. (m32c_elf_check_relocs): Likewise. (m32c_elf_finish_dynamic_sections): Likewise. (m32c_elf_always_size_sections): Likewise. * elf32-m32r.c (struct elf_m32r_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (m32r_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (m32r_elf_size_dynamic_sections): Likewise. (m32r_elf_relocate_section): Likewise. (m32r_elf_finish_dynamic_symbol): Likewise. (m32r_elf_finish_dynamic_sections): Likewise. (m32r_elf_check_relocs): Likewise. * elf32-m68k.c (elf_m68k_partition_multi_got): Likewise. (elf_m68k_check_relocs): Likewise. (elf_m68k_adjust_dynamic_symbol): Likewise. (elf_m68k_size_dynamic_sections): Likewise. (elf_m68k_relocate_section): Likewise. (elf_m68k_finish_dynamic_symbol): Likewise. (elf_m68k_finish_dynamic_sections): Likewise. * elf32-metag.c (struct elf_metag_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_metag_relocate_section): Use elf htab shortcuts to dynamic sections. (elf_metag_create_dynamic_sections): Likewise. Allocate got header here in .got. (elf_metag_check_relocs): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (elf_metag_size_dynamic_sections): Likewise. (elf_metag_finish_dynamic_symbol): Likewise. (elf_metag_finish_dynamic_sections): Likewise. (elf_metag_size_stubs): Likewise. (elf_backend_got_header_size): Don't define. (elf_backend_want_got_plt): Define. * elf32-microblaze.c (struct elf32_mb_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelpl. (microblaze_elf_relocate_section): Use elf htab shortcuts to dynamic sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (microblaze_elf_check_relocs): Use elf htab shortcuts to dyn sections. (microblaze_elf_create_dynamic_sections): Likewise. (allocate_dynrelocs): Likewise. (microblaze_elf_size_dynamic_sections): Likewise. (microblaze_elf_finish_dynamic_symbol): Likewise. (microblaze_elf_finish_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create): Don't NULL already zero fields. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (nds32_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (nds32_elf_size_dynamic_sections): Likewise. (nds32_elf_relocate_section): Likewise. (nds32_elf_finish_dynamic_symbol): Likewise. (nds32_elf_finish_dynamic_sections): Likewise. (nds32_elf_check_relocs): Likewise. (calculate_plt_memory_address): Likewise. (calculate_got_memory_address): Likewise. * elf32-nds32.h (struct elf_nds32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. * elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise. (or1k_elf_relocate_section): Use elf htab shortcuts to dyn sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (or1k_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (or1k_elf_finish_dynamic_sections): Likewise. (or1k_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_size_dynamic_sections): Likewise. (or1k_elf_create_dynamic_sections): Likewise. * elf32-ppc.c (struct ppc_elf_link_hash_table): Delete got, relgot, plt, relplt, iplt, reliplt and sgotplt. (ppc_elf_create_got): Use elf htab shortcuts to dynamic sections. (ppc_elf_create_glink): Likewise. (ppc_elf_create_dynamic_sections): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_select_plt_layout): Likewise. (ppc_elf_tls_setup): Likewise. (allocate_got): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_reloc_type_class): Likewise. (ppc_elf_finish_dynamic_sections): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. (rl78_elf_check_relocs): Likewise. (rl78_elf_finish_dynamic_sections): Likewise. (rl78_elf_always_size_sections): Likewise. * elf32-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section): Set elf shortcuts. (s3_bfd_score_elf_finish_dynamic_sections): Use elf shortcuts. * elf32-score7.c (score_elf_create_got_section): As above. (s7_bfd_score_elf_finish_dynamic_sections): As above. * elf32-sh.c (struct elf_sh_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Don't set them. (sh_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (sh_elf_size_dynamic_sections): Likewise. (sh_elf_add_rofixup): Likewise. (sh_elf_relocate_section): Likewise. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol): Likewise. (sh_elf_finish_dynamic_sections): Likewise. * elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_create_got_section): Likewise. * elf32-vax.c (elf_vax_check_relocs): Likewise. (elf_vax_adjust_dynamic_symbol): Likewise. (elf_vax_always_size_sections): Likewise. (elf_vax_instantiate_got_entries): Likewise. (elf_vax_relocate_section): Likewise. (elf_vax_finish_dynamic_symbol): Likewise. (elf_vax_finish_dynamic_sections): Likewise. * elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise. (xstormy16_elf_always_size_sections): Likewise. (xstormy16_elf_relocate_section): Likewise. (xstormy16_elf_finish_dynamic_sections): Likewise. * elf32-xtensa.c (struct elf_xtensa_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_xtensa_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_xtensa_allocate_dynrelocs): Likewise. (elf_xtensa_allocate_local_got_size): Likewise. (elf_xtensa_size_dynamic_sections): Likewise. (elf_xtensa_relocate_section): Likewise. (elf_xtensa_finish_dynamic_sections): Likewise. (shrink_dynamic_reloc_sections): Likewise. (elf_xtensa_get_plt_section): Likewise. (elf_xtensa_get_gotplt_section): Likewise. (xtensa_callback_required_dependence): Likewise. * elf64-alpha.c (elf64_alpha_create_dynamic_sections): Set elf htab shortcuts to dynamic sections. (elf64_alpha_adjust_dynamic_symbol): Use elf htab shortcuts to dynamic sections. (elf64_alpha_size_plt_section): Likewise. (elf64_alpha_size_rela_got_1): Likewise. (elf64_alpha_size_rela_got_section): Likewise. (elf64_alpha_relocate_section): Likewise. (elf64_alpha_finish_dynamic_symbol): Likewise. (elf64_alpha_finish_dynamic_sections): Likewise. * elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise. * elf64-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Use elf htab shortcuts to dynamic sections. (sh_elf64_check_relocs): Likewise. (sh64_elf64_adjust_dynamic_symbol): Likewise. (sh64_elf64_size_dynamic_sections): Likewise. (sh64_elf64_finish_dynamic_symbol): Likewise. (sh64_elf64_finish_dynamic_sections): Likewise. * elflink.c (_bfd_elf_create_got_section): Likewise. * elfnn-aarch64.c (aarch64_elf_create_got_section): Likewise. * elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise. (elfNN_ia64_finish_dynamic_sections): Likewise. * elfnn-riscv.c (riscv_elf_create_got_section): Likewise. * elfxx-mips.c (struct mips_elf_link_hash_table): Delete srellt, sgotplt, splt and sgot. (mips_elf_initialize_tls_slots): Use elf htab shortcuts to dynamic sections. (mips_elf_gotplt_index): Likewise. (mips_elf_primary_global_got_index): Likewise. (mips_elf_global_got_index): Likewise. (mips_elf_got_offset_from_index): Likewise. (mips_elf_create_local_got_entry): Likewise. (mips_elf_create_got_section): Likewise. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_create_dynamic_sections): Likewise. (_bfd_mips_elf_adjust_dynamic_symbol): Likewise. (mips_elf_lay_out_got): Likewise. (mips_elf_set_plt_sym_value): Likewise. (_bfd_mips_elf_size_dynamic_sections): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (mips_finish_exec_plt): Likewise. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Likewise. * elfxx-sparc.c (sparc_finish_dyn): Likewise. * elfxx-tilegx.c (tilegx_elf_create_got_section): Likewise.
2016-11-23 05:36:34 +01:00
flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
| SEC_IN_MEMORY | SEC_LINKER_CREATED
| SEC_READONLY | SEC_CODE);
splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
flags);
elf_hash_table (info)->splt = splt;
if (splt == NULL
|| ! bfd_set_section_alignment (dynobj, splt, 1))
return FALSE;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
}
if (h != NULL)
offset = &h->plt.offset;
else
{
if (local_plt_offsets == NULL)
{
size_t size;
unsigned int i;
size = symtab_hdr->sh_info * sizeof (bfd_vma);
local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
if (local_plt_offsets == NULL)
return FALSE;
elf_local_got_offsets (abfd) = local_plt_offsets;
for (i = 0; i < symtab_hdr->sh_info; i++)
local_plt_offsets[i] = (bfd_vma) -1;
}
offset = &local_plt_offsets[r_symndx];
}
if (*offset == (bfd_vma) -1)
{
*offset = splt->size;
splt->size += 4;
}
break;
}
}
Remove trailing white spaces in bfd * aout0.c: Remove trailing white spaces. * archive.c: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd-in2.h: Likewise. * coff-alpha.c: Likewise. * coff-i860.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-tic80.c: Likewise. * coff-x86_64.c: Likewise. * coff-z80.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * compress.c: Likewise. * corefile.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-crx.c: Likewise. * cpu-h8300.c: Likewise. * cpu-i386.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m68k.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-sh.c: Likewise. * cpu-xc16x.c: Likewise. * dwarf2.c: Likewise. * ecofflink.c: Likewise. * ecoffswap.h: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-vxworks.c: Likewise. * elf32-avr.c: Likewise. * elf32-avr.h: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.h: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-v850.c: Likewise. * elf32-xc16x.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * libcoff.h: Likewise. * libpei.h: Likewise. * libxcoff.h: Likewise. * linker.c: Likewise. * mach-o-i386.c: Likewise. * mach-o-target.c: Likewise. * mach-o.c: Likewise. * mach-o.h: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pdp11.c: Likewise. * pe-x86_64.c: Likewise. * peXXigen.c: Likewise. * pef-traceback.h: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. * riscix.c: Likewise. * section.c: Likewise. * som.c: Likewise. * syms.c: Likewise. * tekhex.c: Likewise. * ticoff.h: Likewise. * vaxbsd.c: Likewise. * xcofflink.c: Likewise. * xtensa-isa.c: Likewise.
2013-01-10 21:03:55 +01:00
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
return TRUE;
}
/* This must exist if dynobj is ever set. */
static bfd_boolean
rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
struct bfd_link_info *info)
{
bfd *dynobj;
asection *splt;
if (!elf_hash_table (info)->dynamic_sections_created)
return TRUE;
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
/* As an extra sanity check, verify that all plt entries have been
filled in. However, relaxing might have changed the relocs so
that some plt entries don't get filled in, so we have to skip
this check if we're relaxing. Unfortunately, check_relocs is
called before relaxation. */
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
if (info->relax_trip > 0)
return TRUE;
Delete duplicate target short-cuts to dynamic sections We'd like to have the elf_link_hash_table srelplt field rather than some private target field used to save short-cuts to a PLT relocation section. This save a little space but mainly is so that the generic ELF code can access the field. Ditto for other dynamic sections. * elf-m10300.c (mn10300_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (mn10300_elf_final_link_relocate): Likewise. (_bfd_mn10300_elf_adjust_dynamic_symbol): Likewise. (_bfd_mn10300_elf_size_dynamic_sections): Likewise. (_bfd_mn10300_elf_finish_dynamic_symbol): Likewise. (_bfd_mn10300_elf_finish_dynamic_sections): Likewise. * elf32-bfin.c (bfin_check_relocs): Likewise. (bfin_relocate_section): Likewise. (bfin_gc_sweep_hook): Likewise. (struct bfinfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (bfinfdpic_got_section, bfinfdpic_gotrel_section, bfinfdpic_plt_section, bfinfdpic_pltrel_section): Define using elf shortcut sections. (_bfin_create_got_section): Use elf htab shortcuts to dyn sections. Delete dead code. (bfin_finish_dynamic_symbol): Use elf htab shortcuts to dyn sections. (bfin_size_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_create_got_section): Likewise. (cr16_elf_check_relocs): Likewise. (cr16_elf_final_link_relocate): Likewise. (_bfd_cr16_elf_create_dynamic_sections): Likewise. (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise. (_bfd_cr16_elf_size_dynamic_sections): Likewise. (_bfd_cr16_elf_finish_dynamic_symbol): Likewise. (_bfd_cr16_elf_finish_dynamic_sections): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. (elf_cris_finish_dynamic_symbol): Likewise. (elf_cris_finish_dynamic_sections): Likewise. (cris_elf_gc_sweep_hook): Likewise. (elf_cris_adjust_gotplt_to_got): Likewise. (elf_cris_adjust_dynamic_symbol): Likewise. (cris_elf_check_relocs): Likewise. Delete dead code. (elf_cris_size_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_cris_discard_excess_program_dynamics): Likewise. * elf32-frv.c (struct frvfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (frvfdpic_got_section, frvfdpic_gotrel_section, frvfdpic_plt_section, frvfdpic_pltrel_section): Define using elf shortcut sections. (_frv_create_got_section): Likewise. * elf32-hppa.c (struct elf32_hppa_link_hash_table): Delete sgot, srelgot, splt and srelplt. (hppa_build_one_stub): Use elf htab shortcuts to dynamic sections. (elf32_hppa_create_dynamic_sections): Likewise. (elf32_hppa_check_relocs): Likewise. (allocate_plt_static): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_size_dynamic_sections): Likewise. (elf32_hppa_relocate_section): Likewise. (elf32_hppa_finish_dynamic_symbol): Likewise. (elf32_hppa_finish_dynamic_sections): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-lm32.c (struct elf_lm32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (lm32fdpic_got_section, lm32fdpic_gotrel_section): Define using elf shortcut sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (lm32_elf_relocate_section): Use elf htab shortcuts to dyn sections. (lm32_elf_check_relocs): Likewise. (lm32_elf_finish_dynamic_sections): Likewise. (lm32_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_size_dynamic_sections): Likewise. (lm32_elf_create_dynamic_sections): Likewise. * elf32-m32c.c (m32c_elf_relocate_section): Likewise. (m32c_elf_check_relocs): Likewise. (m32c_elf_finish_dynamic_sections): Likewise. (m32c_elf_always_size_sections): Likewise. * elf32-m32r.c (struct elf_m32r_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (m32r_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (m32r_elf_size_dynamic_sections): Likewise. (m32r_elf_relocate_section): Likewise. (m32r_elf_finish_dynamic_symbol): Likewise. (m32r_elf_finish_dynamic_sections): Likewise. (m32r_elf_check_relocs): Likewise. * elf32-m68k.c (elf_m68k_partition_multi_got): Likewise. (elf_m68k_check_relocs): Likewise. (elf_m68k_adjust_dynamic_symbol): Likewise. (elf_m68k_size_dynamic_sections): Likewise. (elf_m68k_relocate_section): Likewise. (elf_m68k_finish_dynamic_symbol): Likewise. (elf_m68k_finish_dynamic_sections): Likewise. * elf32-metag.c (struct elf_metag_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_metag_relocate_section): Use elf htab shortcuts to dynamic sections. (elf_metag_create_dynamic_sections): Likewise. Allocate got header here in .got. (elf_metag_check_relocs): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (elf_metag_size_dynamic_sections): Likewise. (elf_metag_finish_dynamic_symbol): Likewise. (elf_metag_finish_dynamic_sections): Likewise. (elf_metag_size_stubs): Likewise. (elf_backend_got_header_size): Don't define. (elf_backend_want_got_plt): Define. * elf32-microblaze.c (struct elf32_mb_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelpl. (microblaze_elf_relocate_section): Use elf htab shortcuts to dynamic sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (microblaze_elf_check_relocs): Use elf htab shortcuts to dyn sections. (microblaze_elf_create_dynamic_sections): Likewise. (allocate_dynrelocs): Likewise. (microblaze_elf_size_dynamic_sections): Likewise. (microblaze_elf_finish_dynamic_symbol): Likewise. (microblaze_elf_finish_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create): Don't NULL already zero fields. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (nds32_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (nds32_elf_size_dynamic_sections): Likewise. (nds32_elf_relocate_section): Likewise. (nds32_elf_finish_dynamic_symbol): Likewise. (nds32_elf_finish_dynamic_sections): Likewise. (nds32_elf_check_relocs): Likewise. (calculate_plt_memory_address): Likewise. (calculate_got_memory_address): Likewise. * elf32-nds32.h (struct elf_nds32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. * elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise. (or1k_elf_relocate_section): Use elf htab shortcuts to dyn sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (or1k_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (or1k_elf_finish_dynamic_sections): Likewise. (or1k_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_size_dynamic_sections): Likewise. (or1k_elf_create_dynamic_sections): Likewise. * elf32-ppc.c (struct ppc_elf_link_hash_table): Delete got, relgot, plt, relplt, iplt, reliplt and sgotplt. (ppc_elf_create_got): Use elf htab shortcuts to dynamic sections. (ppc_elf_create_glink): Likewise. (ppc_elf_create_dynamic_sections): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_select_plt_layout): Likewise. (ppc_elf_tls_setup): Likewise. (allocate_got): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_reloc_type_class): Likewise. (ppc_elf_finish_dynamic_sections): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. (rl78_elf_check_relocs): Likewise. (rl78_elf_finish_dynamic_sections): Likewise. (rl78_elf_always_size_sections): Likewise. * elf32-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section): Set elf shortcuts. (s3_bfd_score_elf_finish_dynamic_sections): Use elf shortcuts. * elf32-score7.c (score_elf_create_got_section): As above. (s7_bfd_score_elf_finish_dynamic_sections): As above. * elf32-sh.c (struct elf_sh_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Don't set them. (sh_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (sh_elf_size_dynamic_sections): Likewise. (sh_elf_add_rofixup): Likewise. (sh_elf_relocate_section): Likewise. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol): Likewise. (sh_elf_finish_dynamic_sections): Likewise. * elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_create_got_section): Likewise. * elf32-vax.c (elf_vax_check_relocs): Likewise. (elf_vax_adjust_dynamic_symbol): Likewise. (elf_vax_always_size_sections): Likewise. (elf_vax_instantiate_got_entries): Likewise. (elf_vax_relocate_section): Likewise. (elf_vax_finish_dynamic_symbol): Likewise. (elf_vax_finish_dynamic_sections): Likewise. * elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise. (xstormy16_elf_always_size_sections): Likewise. (xstormy16_elf_relocate_section): Likewise. (xstormy16_elf_finish_dynamic_sections): Likewise. * elf32-xtensa.c (struct elf_xtensa_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_xtensa_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_xtensa_allocate_dynrelocs): Likewise. (elf_xtensa_allocate_local_got_size): Likewise. (elf_xtensa_size_dynamic_sections): Likewise. (elf_xtensa_relocate_section): Likewise. (elf_xtensa_finish_dynamic_sections): Likewise. (shrink_dynamic_reloc_sections): Likewise. (elf_xtensa_get_plt_section): Likewise. (elf_xtensa_get_gotplt_section): Likewise. (xtensa_callback_required_dependence): Likewise. * elf64-alpha.c (elf64_alpha_create_dynamic_sections): Set elf htab shortcuts to dynamic sections. (elf64_alpha_adjust_dynamic_symbol): Use elf htab shortcuts to dynamic sections. (elf64_alpha_size_plt_section): Likewise. (elf64_alpha_size_rela_got_1): Likewise. (elf64_alpha_size_rela_got_section): Likewise. (elf64_alpha_relocate_section): Likewise. (elf64_alpha_finish_dynamic_symbol): Likewise. (elf64_alpha_finish_dynamic_sections): Likewise. * elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise. * elf64-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Use elf htab shortcuts to dynamic sections. (sh_elf64_check_relocs): Likewise. (sh64_elf64_adjust_dynamic_symbol): Likewise. (sh64_elf64_size_dynamic_sections): Likewise. (sh64_elf64_finish_dynamic_symbol): Likewise. (sh64_elf64_finish_dynamic_sections): Likewise. * elflink.c (_bfd_elf_create_got_section): Likewise. * elfnn-aarch64.c (aarch64_elf_create_got_section): Likewise. * elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise. (elfNN_ia64_finish_dynamic_sections): Likewise. * elfnn-riscv.c (riscv_elf_create_got_section): Likewise. * elfxx-mips.c (struct mips_elf_link_hash_table): Delete srellt, sgotplt, splt and sgot. (mips_elf_initialize_tls_slots): Use elf htab shortcuts to dynamic sections. (mips_elf_gotplt_index): Likewise. (mips_elf_primary_global_got_index): Likewise. (mips_elf_global_got_index): Likewise. (mips_elf_got_offset_from_index): Likewise. (mips_elf_create_local_got_entry): Likewise. (mips_elf_create_got_section): Likewise. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_create_dynamic_sections): Likewise. (_bfd_mips_elf_adjust_dynamic_symbol): Likewise. (mips_elf_lay_out_got): Likewise. (mips_elf_set_plt_sym_value): Likewise. (_bfd_mips_elf_size_dynamic_sections): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (mips_finish_exec_plt): Likewise. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Likewise. * elfxx-sparc.c (sparc_finish_dyn): Likewise. * elfxx-tilegx.c (tilegx_elf_create_got_section): Likewise.
2016-11-23 05:36:34 +01:00
dynobj = elf_hash_table (info)->dynobj;
splt = elf_hash_table (info)->splt;
if (dynobj != NULL && splt != NULL)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
{
bfd_byte *contents = splt->contents;
unsigned int i, size = splt->size;
for (i = 0; i < size; i += 4)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
{
unsigned int x = bfd_get_32 (dynobj, contents + i);
BFD_ASSERT (x != 0);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
}
}
return TRUE;
}
static bfd_boolean
rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
struct bfd_link_info *info)
{
bfd *dynobj;
asection *splt;
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_relocatable (info))
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
return TRUE;
dynobj = elf_hash_table (info)->dynobj;
if (dynobj == NULL)
return TRUE;
Delete duplicate target short-cuts to dynamic sections We'd like to have the elf_link_hash_table srelplt field rather than some private target field used to save short-cuts to a PLT relocation section. This save a little space but mainly is so that the generic ELF code can access the field. Ditto for other dynamic sections. * elf-m10300.c (mn10300_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (mn10300_elf_final_link_relocate): Likewise. (_bfd_mn10300_elf_adjust_dynamic_symbol): Likewise. (_bfd_mn10300_elf_size_dynamic_sections): Likewise. (_bfd_mn10300_elf_finish_dynamic_symbol): Likewise. (_bfd_mn10300_elf_finish_dynamic_sections): Likewise. * elf32-bfin.c (bfin_check_relocs): Likewise. (bfin_relocate_section): Likewise. (bfin_gc_sweep_hook): Likewise. (struct bfinfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (bfinfdpic_got_section, bfinfdpic_gotrel_section, bfinfdpic_plt_section, bfinfdpic_pltrel_section): Define using elf shortcut sections. (_bfin_create_got_section): Use elf htab shortcuts to dyn sections. Delete dead code. (bfin_finish_dynamic_symbol): Use elf htab shortcuts to dyn sections. (bfin_size_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_create_got_section): Likewise. (cr16_elf_check_relocs): Likewise. (cr16_elf_final_link_relocate): Likewise. (_bfd_cr16_elf_create_dynamic_sections): Likewise. (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise. (_bfd_cr16_elf_size_dynamic_sections): Likewise. (_bfd_cr16_elf_finish_dynamic_symbol): Likewise. (_bfd_cr16_elf_finish_dynamic_sections): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. (elf_cris_finish_dynamic_symbol): Likewise. (elf_cris_finish_dynamic_sections): Likewise. (cris_elf_gc_sweep_hook): Likewise. (elf_cris_adjust_gotplt_to_got): Likewise. (elf_cris_adjust_dynamic_symbol): Likewise. (cris_elf_check_relocs): Likewise. Delete dead code. (elf_cris_size_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_cris_discard_excess_program_dynamics): Likewise. * elf32-frv.c (struct frvfdpic_elf_link_hash_table): Delete sgot, sgotrel, splt and spltrel. (frvfdpic_got_section, frvfdpic_gotrel_section, frvfdpic_plt_section, frvfdpic_pltrel_section): Define using elf shortcut sections. (_frv_create_got_section): Likewise. * elf32-hppa.c (struct elf32_hppa_link_hash_table): Delete sgot, srelgot, splt and srelplt. (hppa_build_one_stub): Use elf htab shortcuts to dynamic sections. (elf32_hppa_create_dynamic_sections): Likewise. (elf32_hppa_check_relocs): Likewise. (allocate_plt_static): Likewise. (allocate_dynrelocs): Likewise. (elf32_hppa_size_dynamic_sections): Likewise. (elf32_hppa_relocate_section): Likewise. (elf32_hppa_finish_dynamic_symbol): Likewise. (elf32_hppa_finish_dynamic_sections): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-lm32.c (struct elf_lm32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (lm32fdpic_got_section, lm32fdpic_gotrel_section): Define using elf shortcut sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (lm32_elf_relocate_section): Use elf htab shortcuts to dyn sections. (lm32_elf_check_relocs): Likewise. (lm32_elf_finish_dynamic_sections): Likewise. (lm32_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (lm32_elf_size_dynamic_sections): Likewise. (lm32_elf_create_dynamic_sections): Likewise. * elf32-m32c.c (m32c_elf_relocate_section): Likewise. (m32c_elf_check_relocs): Likewise. (m32c_elf_finish_dynamic_sections): Likewise. (m32c_elf_always_size_sections): Likewise. * elf32-m32r.c (struct elf_m32r_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (m32r_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (m32r_elf_size_dynamic_sections): Likewise. (m32r_elf_relocate_section): Likewise. (m32r_elf_finish_dynamic_symbol): Likewise. (m32r_elf_finish_dynamic_sections): Likewise. (m32r_elf_check_relocs): Likewise. * elf32-m68k.c (elf_m68k_partition_multi_got): Likewise. (elf_m68k_check_relocs): Likewise. (elf_m68k_adjust_dynamic_symbol): Likewise. (elf_m68k_size_dynamic_sections): Likewise. (elf_m68k_relocate_section): Likewise. (elf_m68k_finish_dynamic_symbol): Likewise. (elf_m68k_finish_dynamic_sections): Likewise. * elf32-metag.c (struct elf_metag_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_metag_relocate_section): Use elf htab shortcuts to dynamic sections. (elf_metag_create_dynamic_sections): Likewise. Allocate got header here in .got. (elf_metag_check_relocs): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (elf_metag_size_dynamic_sections): Likewise. (elf_metag_finish_dynamic_symbol): Likewise. (elf_metag_finish_dynamic_sections): Likewise. (elf_metag_size_stubs): Likewise. (elf_backend_got_header_size): Don't define. (elf_backend_want_got_plt): Define. * elf32-microblaze.c (struct elf32_mb_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelpl. (microblaze_elf_relocate_section): Use elf htab shortcuts to dynamic sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (microblaze_elf_check_relocs): Use elf htab shortcuts to dyn sections. (microblaze_elf_create_dynamic_sections): Likewise. (allocate_dynrelocs): Likewise. (microblaze_elf_size_dynamic_sections): Likewise. (microblaze_elf_finish_dynamic_symbol): Likewise. (microblaze_elf_finish_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_link_hash_table_create): Don't NULL already zero fields. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (nds32_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (nds32_elf_size_dynamic_sections): Likewise. (nds32_elf_relocate_section): Likewise. (nds32_elf_finish_dynamic_symbol): Likewise. (nds32_elf_finish_dynamic_sections): Likewise. (nds32_elf_check_relocs): Likewise. (calculate_plt_memory_address): Likewise. (calculate_got_memory_address): Likewise. * elf32-nds32.h (struct elf_nds32_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. * elf32-or1k.c (struct elf_or1k_link_hash_table): Likewise. (or1k_elf_relocate_section): Use elf htab shortcuts to dyn sections. (create_got_section): Delete. Use _bfd_elf_create_got_section instead. (or1k_elf_check_relocs): Use elf htab shortcuts to dynamic sections. (or1k_elf_finish_dynamic_sections): Likewise. (or1k_elf_finish_dynamic_symbol): Likewise. (allocate_dynrelocs): Likewise. (or1k_elf_size_dynamic_sections): Likewise. (or1k_elf_create_dynamic_sections): Likewise. * elf32-ppc.c (struct ppc_elf_link_hash_table): Delete got, relgot, plt, relplt, iplt, reliplt and sgotplt. (ppc_elf_create_got): Use elf htab shortcuts to dynamic sections. (ppc_elf_create_glink): Likewise. (ppc_elf_create_dynamic_sections): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_select_plt_layout): Likewise. (ppc_elf_tls_setup): Likewise. (allocate_got): Likewise. (allocate_dynrelocs): Likewise. (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relax_section): Likewise. (ppc_elf_relocate_section): Likewise. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_reloc_type_class): Likewise. (ppc_elf_finish_dynamic_sections): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. (rl78_elf_check_relocs): Likewise. (rl78_elf_finish_dynamic_sections): Likewise. (rl78_elf_always_size_sections): Likewise. * elf32-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf32-score.c (score_elf_create_got_section): Set elf shortcuts. (s3_bfd_score_elf_finish_dynamic_sections): Use elf shortcuts. * elf32-score7.c (score_elf_create_got_section): As above. (s7_bfd_score_elf_finish_dynamic_sections): As above. * elf32-sh.c (struct elf_sh_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (create_got_section): Don't set them. (sh_elf_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (allocate_dynrelocs): Likewise. (sh_elf_size_dynamic_sections): Likewise. (sh_elf_add_rofixup): Likewise. (sh_elf_relocate_section): Likewise. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol): Likewise. (sh_elf_finish_dynamic_sections): Likewise. * elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise. * elf32-tilepro.c (tilepro_elf_create_got_section): Likewise. * elf32-vax.c (elf_vax_check_relocs): Likewise. (elf_vax_adjust_dynamic_symbol): Likewise. (elf_vax_always_size_sections): Likewise. (elf_vax_instantiate_got_entries): Likewise. (elf_vax_relocate_section): Likewise. (elf_vax_finish_dynamic_symbol): Likewise. (elf_vax_finish_dynamic_sections): Likewise. * elf32-xstormy16.c (xstormy16_elf_check_relocs): Likewise. (xstormy16_elf_always_size_sections): Likewise. (xstormy16_elf_relocate_section): Likewise. (xstormy16_elf_finish_dynamic_sections): Likewise. * elf32-xtensa.c (struct elf_xtensa_link_hash_table): Delete sgot, sgotplt, srelgot, splt and srelplt. (elf_xtensa_create_dynamic_sections): Use elf htab shortcuts to dynamic sections. (elf_xtensa_allocate_dynrelocs): Likewise. (elf_xtensa_allocate_local_got_size): Likewise. (elf_xtensa_size_dynamic_sections): Likewise. (elf_xtensa_relocate_section): Likewise. (elf_xtensa_finish_dynamic_sections): Likewise. (shrink_dynamic_reloc_sections): Likewise. (elf_xtensa_get_plt_section): Likewise. (elf_xtensa_get_gotplt_section): Likewise. (xtensa_callback_required_dependence): Likewise. * elf64-alpha.c (elf64_alpha_create_dynamic_sections): Set elf htab shortcuts to dynamic sections. (elf64_alpha_adjust_dynamic_symbol): Use elf htab shortcuts to dynamic sections. (elf64_alpha_size_plt_section): Likewise. (elf64_alpha_size_rela_got_1): Likewise. (elf64_alpha_size_rela_got_section): Likewise. (elf64_alpha_relocate_section): Likewise. (elf64_alpha_finish_dynamic_symbol): Likewise. (elf64_alpha_finish_dynamic_sections): Likewise. * elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise. * elf64-s390.c (create_got_section): Delete. (elf_s390_create_dynamic_sections): Use _bfd_elf_create_got_section. (elf_s390_check_relocs): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Use elf htab shortcuts to dynamic sections. (sh_elf64_check_relocs): Likewise. (sh64_elf64_adjust_dynamic_symbol): Likewise. (sh64_elf64_size_dynamic_sections): Likewise. (sh64_elf64_finish_dynamic_symbol): Likewise. (sh64_elf64_finish_dynamic_sections): Likewise. * elflink.c (_bfd_elf_create_got_section): Likewise. * elfnn-aarch64.c (aarch64_elf_create_got_section): Likewise. * elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise. (elfNN_ia64_finish_dynamic_sections): Likewise. * elfnn-riscv.c (riscv_elf_create_got_section): Likewise. * elfxx-mips.c (struct mips_elf_link_hash_table): Delete srellt, sgotplt, splt and sgot. (mips_elf_initialize_tls_slots): Use elf htab shortcuts to dynamic sections. (mips_elf_gotplt_index): Likewise. (mips_elf_primary_global_got_index): Likewise. (mips_elf_global_got_index): Likewise. (mips_elf_got_offset_from_index): Likewise. (mips_elf_create_local_got_entry): Likewise. (mips_elf_create_got_section): Likewise. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_create_dynamic_sections): Likewise. (_bfd_mips_elf_adjust_dynamic_symbol): Likewise. (mips_elf_lay_out_got): Likewise. (mips_elf_set_plt_sym_value): Likewise. (_bfd_mips_elf_size_dynamic_sections): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (mips_finish_exec_plt): Likewise. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Likewise. * elfxx-sparc.c (sparc_finish_dyn): Likewise. * elfxx-tilegx.c (tilegx_elf_create_got_section): Likewise.
2016-11-23 05:36:34 +01:00
splt = elf_hash_table (info)->splt;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
BFD_ASSERT (splt != NULL);
splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
if (splt->contents == NULL)
return FALSE;
return TRUE;
}
/* Handle relaxing. */
/* A subroutine of rl78_elf_relax_section. If the global symbol H
is within the low 64k, remove any entry for it in the plt. */
struct relax_plt_data
{
asection *splt;
bfd_boolean *again;
};
static bfd_boolean
* aix386-core.c: Remove use of PTR and PARAMS macros. * archive.c: Likewise. * cache.c: Likewise. * cisco-core.c: Likewise. * coff-alpha.c: Likewise. * coff-apollo.c: Likewise. * coff-aux.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i386.c: Likewise. * coff-i960.c: Likewise. * coff-ia64.c: Likewise. * coff-m68k.c: Likewise. * coff-m88k.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-or32.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-sparc.c: Likewise. * coff-stgo32.c: Likewise. * coff-tic30.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * cofflink.c: Likewise. * cpu-arc.c: Likewise. * cpu-cris.c: Likewise. * cpu-h8500.c: Likewise. * cpu-i960.c: Likewise. * cpu-msp430.c: Likewise. * cpu-ns32k.c: Likewise. * cpu-powerpc.c: Likewise. * cpu-rs6000.c: Likewise. * cpu-tic4x.c: Likewise. * cpu-w65.c: Likewise. * ecoff.c: Likewise. * ecofflink.c: Likewise. * elf-m10200.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-h8300.c: Likewise. * elf32-i960.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-vax.c: Likewise. * elf64-alpha.c: Likewise. * elf64-mmix.c: Likewise. * elf64-s390.c: Likewise. * elf64-sparc.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * hash.c: Likewise. * hp300hpux.c: Likewise. * hppabsd-core.c: Likewise. * hpux-core.c: Likewise. * i386dynix.c: Likewise. * i386linux.c: Likewise. * i386lynx.c: Likewise. * i386mach3.c: Likewise. * i386msdos.c: Likewise. * i386os9k.c: Likewise. * irix-core.c: Likewise. * lynx-core.c: Likewise. * m68klinux.c: Likewise. * mach-o.h: Likewise. * mipsbsd.c: Likewise. * netbsd-core.c: Likewise. * nlm32-i386.c: Likewise. * osf-core.c: Likewise. * pc532-mach.c: Likewise. * pef.c: Likewise. * ppcboot.c: Likewise. * ptrace-core.c: Likewise. * reloc16.c: Likewise. * sco5-core.c: Likewise. * som.h: Likewise. * sparclinux.c: Likewise. * sparclynx.c: Likewise. * ticoff.h: Likewise. * trad-core.c: Likewise. * vms-lib.c: Likewise. * xsym.h: Likewise.
2012-07-13 16:22:50 +02:00
rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
{
struct relax_plt_data *data = (struct relax_plt_data *) xdata;
if (h->plt.offset != (bfd_vma) -1)
{
bfd_vma address;
if (h->root.type == bfd_link_hash_undefined
|| h->root.type == bfd_link_hash_undefweak)
address = 0;
else
address = (h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset
+ h->root.u.def.value);
if (valid_16bit_address (address))
{
h->plt.offset = -1;
data->splt->size -= 4;
*data->again = TRUE;
}
}
return TRUE;
}
/* A subroutine of rl78_elf_relax_section. If the global symbol H
previously had a plt entry, give it a new entry offset. */
static bfd_boolean
* aix386-core.c: Remove use of PTR and PARAMS macros. * archive.c: Likewise. * cache.c: Likewise. * cisco-core.c: Likewise. * coff-alpha.c: Likewise. * coff-apollo.c: Likewise. * coff-aux.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i386.c: Likewise. * coff-i960.c: Likewise. * coff-ia64.c: Likewise. * coff-m68k.c: Likewise. * coff-m88k.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-or32.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-sparc.c: Likewise. * coff-stgo32.c: Likewise. * coff-tic30.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * cofflink.c: Likewise. * cpu-arc.c: Likewise. * cpu-cris.c: Likewise. * cpu-h8500.c: Likewise. * cpu-i960.c: Likewise. * cpu-msp430.c: Likewise. * cpu-ns32k.c: Likewise. * cpu-powerpc.c: Likewise. * cpu-rs6000.c: Likewise. * cpu-tic4x.c: Likewise. * cpu-w65.c: Likewise. * ecoff.c: Likewise. * ecofflink.c: Likewise. * elf-m10200.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-h8300.c: Likewise. * elf32-i960.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-vax.c: Likewise. * elf64-alpha.c: Likewise. * elf64-mmix.c: Likewise. * elf64-s390.c: Likewise. * elf64-sparc.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * hash.c: Likewise. * hp300hpux.c: Likewise. * hppabsd-core.c: Likewise. * hpux-core.c: Likewise. * i386dynix.c: Likewise. * i386linux.c: Likewise. * i386lynx.c: Likewise. * i386mach3.c: Likewise. * i386msdos.c: Likewise. * i386os9k.c: Likewise. * irix-core.c: Likewise. * lynx-core.c: Likewise. * m68klinux.c: Likewise. * mach-o.h: Likewise. * mipsbsd.c: Likewise. * netbsd-core.c: Likewise. * nlm32-i386.c: Likewise. * osf-core.c: Likewise. * pc532-mach.c: Likewise. * pef.c: Likewise. * ppcboot.c: Likewise. * ptrace-core.c: Likewise. * reloc16.c: Likewise. * sco5-core.c: Likewise. * som.h: Likewise. * sparclinux.c: Likewise. * sparclynx.c: Likewise. * ticoff.h: Likewise. * trad-core.c: Likewise. * vms-lib.c: Likewise. * xsym.h: Likewise.
2012-07-13 16:22:50 +02:00
rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
{
bfd_vma *entry = (bfd_vma *) xdata;
if (h->plt.offset != (bfd_vma) -1)
{
h->plt.offset = *entry;
*entry += 4;
}
return TRUE;
}
static bfd_boolean
rl78_elf_relax_plt_section (bfd *dynobj,
asection *splt,
struct bfd_link_info *info,
bfd_boolean *again)
{
struct relax_plt_data relax_plt_data;
bfd *ibfd;
/* Assume nothing changes. */
*again = FALSE;
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_relocatable (info))
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
return TRUE;
/* We only relax the .plt section at the moment. */
if (dynobj != elf_hash_table (info)->dynobj
|| strcmp (splt->name, ".plt") != 0)
return TRUE;
/* Quick check for an empty plt. */
if (splt->size == 0)
return TRUE;
/* Map across all global symbols; see which ones happen to
fall in the low 64k. */
relax_plt_data.splt = splt;
relax_plt_data.again = again;
elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
&relax_plt_data);
/* Likewise for local symbols, though that's somewhat less convenient
as we have to walk the list of input bfds and swap in symbol data. */
for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
{
bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
Elf_Internal_Shdr *symtab_hdr;
Elf_Internal_Sym *isymbuf = NULL;
unsigned int idx;
if (! local_plt_offsets)
continue;
symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
if (symtab_hdr->sh_info != 0)
{
isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
if (isymbuf == NULL)
isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
symtab_hdr->sh_info, 0,
NULL, NULL, NULL);
if (isymbuf == NULL)
return FALSE;
}
for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
{
Elf_Internal_Sym *isym;
asection *tsec;
bfd_vma address;
if (local_plt_offsets[idx] == (bfd_vma) -1)
continue;
isym = &isymbuf[idx];
if (isym->st_shndx == SHN_UNDEF)
continue;
else if (isym->st_shndx == SHN_ABS)
tsec = bfd_abs_section_ptr;
else if (isym->st_shndx == SHN_COMMON)
tsec = bfd_com_section_ptr;
else
tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
address = (tsec->output_section->vma
+ tsec->output_offset
+ isym->st_value);
if (valid_16bit_address (address))
{
local_plt_offsets[idx] = -1;
splt->size -= 4;
*again = TRUE;
}
}
if (isymbuf != NULL
&& symtab_hdr->contents != (unsigned char *) isymbuf)
{
if (! info->keep_memory)
free (isymbuf);
else
{
/* Cache the symbols for elf_link_input_bfd. */
symtab_hdr->contents = (unsigned char *) isymbuf;
}
}
}
/* If we changed anything, walk the symbols again to reallocate
.plt entry addresses. */
if (*again && splt->size > 0)
{
bfd_vma entry = 0;
elf_link_hash_traverse (elf_hash_table (info),
rl78_relax_plt_realloc, &entry);
for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
{
bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
unsigned int idx;
if (! local_plt_offsets)
continue;
for (idx = 0; idx < nlocals; ++idx)
if (local_plt_offsets[idx] != (bfd_vma) -1)
{
local_plt_offsets[idx] = entry;
entry += 4;
}
}
}
return TRUE;
}
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
/* Delete some bytes from a section while relaxing. */
static bfd_boolean
elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
Elf_Internal_Rela *alignment_rel, int force_snip)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
{
Elf_Internal_Shdr * symtab_hdr;
unsigned int sec_shndx;
bfd_byte * contents;
Elf_Internal_Rela * irel;
Elf_Internal_Rela * irelend;
Elf_Internal_Sym * isym;
Elf_Internal_Sym * isymend;
bfd_vma toaddr;
unsigned int symcount;
struct elf_link_hash_entry ** sym_hashes;
struct elf_link_hash_entry ** end_hashes;
if (!alignment_rel)
force_snip = 1;
sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
contents = elf_section_data (sec)->this_hdr.contents;
/* The deletion must stop at the next alignment boundary, if
ALIGNMENT_REL is non-NULL. */
toaddr = sec->size;
if (alignment_rel)
toaddr = alignment_rel->r_offset;
irel = elf_section_data (sec)->relocs;
if (irel == NULL)
{
_bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
irel = elf_section_data (sec)->relocs;
}
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
irelend = irel + sec->reloc_count;
/* Actually delete the bytes. */
memmove (contents + addr, contents + addr + count,
(size_t) (toaddr - addr - count));
/* If we don't have an alignment marker to worry about, we can just
shrink the section. Otherwise, we have to fill in the newly
created gap with NOP insns (0x03). */
if (force_snip)
sec->size -= count;
else
memset (contents + toaddr - count, 0x03, count);
/* Adjust all the relocs. */
for (; irel && irel < irelend; irel++)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
{
/* Get the new reloc address. */
if (irel->r_offset > addr
&& (irel->r_offset < toaddr
|| (force_snip && irel->r_offset == toaddr)))
irel->r_offset -= count;
/* If we see an ALIGN marker at the end of the gap, we move it
to the beginning of the gap, since marking these gaps is what
they're for. */
if (irel->r_offset == toaddr
&& ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
&& irel->r_addend & RL78_RELAXA_ALIGN)
irel->r_offset -= count;
}
/* Adjust the local symbols defined in this section. */
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
isym = (Elf_Internal_Sym *) symtab_hdr->contents;
isymend = isym + symtab_hdr->sh_info;
for (; isym < isymend; isym++)
{
/* If the symbol is in the range of memory we just moved, we
have to adjust its value. */
if (isym->st_shndx == sec_shndx
&& isym->st_value > addr
&& isym->st_value < toaddr)
isym->st_value -= count;
/* If the symbol *spans* the bytes we just deleted (i.e. it's
*end* is in the moved bytes but it's *start* isn't), then we
must adjust its size. */
if (isym->st_shndx == sec_shndx
&& isym->st_value < addr
&& isym->st_value + isym->st_size > addr
&& isym->st_value + isym->st_size < toaddr)
isym->st_size -= count;
}
/* Now adjust the global symbols defined in this section. */
symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
- symtab_hdr->sh_info);
sym_hashes = elf_sym_hashes (abfd);
end_hashes = sym_hashes + symcount;
for (; sym_hashes < end_hashes; sym_hashes++)
{
struct elf_link_hash_entry *sym_hash = *sym_hashes;
if ((sym_hash->root.type == bfd_link_hash_defined
|| sym_hash->root.type == bfd_link_hash_defweak)
&& sym_hash->root.u.def.section == sec)
{
/* As above, adjust the value if needed. */
if (sym_hash->root.u.def.value > addr
&& sym_hash->root.u.def.value < toaddr)
sym_hash->root.u.def.value -= count;
/* As above, adjust the size if needed. */
if (sym_hash->root.u.def.value < addr
&& sym_hash->root.u.def.value + sym_hash->size > addr
&& sym_hash->root.u.def.value + sym_hash->size < toaddr)
sym_hash->size -= count;
}
}
return TRUE;
}
/* Used to sort relocs by address. If relocs have the same address,
we maintain their relative order, except that R_RL78_RH_RELAX
alignment relocs must be the first reloc for any given address. */
static void
reloc_bubblesort (Elf_Internal_Rela * r, int count)
{
int i;
bfd_boolean again;
bfd_boolean swappit;
/* This is almost a classic bubblesort. It's the slowest sort, but
we're taking advantage of the fact that the relocations are
mostly in order already (the assembler emits them that way) and
we need relocs with the same address to remain in the same
relative order. */
again = TRUE;
while (again)
{
again = FALSE;
for (i = 0; i < count - 1; i ++)
{
if (r[i].r_offset > r[i + 1].r_offset)
swappit = TRUE;
else if (r[i].r_offset < r[i + 1].r_offset)
swappit = FALSE;
else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
&& (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
swappit = TRUE;
else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
&& (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
&& !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
&& (r[i].r_addend & RL78_RELAXA_ALIGN)))
swappit = TRUE;
else
swappit = FALSE;
if (swappit)
{
Elf_Internal_Rela tmp;
tmp = r[i];
r[i] = r[i + 1];
r[i + 1] = tmp;
/* If we do move a reloc back, re-scan to see if it
needs to be moved even further back. This avoids
most of the O(n^2) behavior for our cases. */
if (i > 0)
i -= 2;
again = TRUE;
}
}
}
}
#define OFFSET_FOR_RELOC(rel, lrel, scale) \
rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
lrel, abfd, sec, link_info, scale)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
static bfd_vma
rl78_offset_for_reloc (bfd * abfd,
Elf_Internal_Rela * rel,
Elf_Internal_Shdr * symtab_hdr,
Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
Elf_Internal_Sym * intsyms,
Elf_Internal_Rela ** lrel,
bfd * input_bfd,
asection * input_section,
struct bfd_link_info * info,
int * scale)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
{
bfd_vma symval;
*scale = 1;
/* REL is the first of 1..N relocations. We compute the symbol
value for each relocation, then combine them if needed. LREL
gets a pointer to the last relocation used. */
while (1)
{
unsigned long r_type;
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
/* Get the value of the symbol referred to by the reloc. */
if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
{
/* A local symbol. */
Elf_Internal_Sym *isym;
asection *ssec;
isym = intsyms + ELF32_R_SYM (rel->r_info);
if (isym->st_shndx == SHN_UNDEF)
ssec = bfd_und_section_ptr;
else if (isym->st_shndx == SHN_ABS)
ssec = bfd_abs_section_ptr;
else if (isym->st_shndx == SHN_COMMON)
ssec = bfd_com_section_ptr;
else
ssec = bfd_section_from_elf_index (abfd,
isym->st_shndx);
/* Initial symbol value. */
symval = isym->st_value;
/* GAS may have made this symbol relative to a section, in
which case, we have to add the addend to find the
symbol. */
if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
symval += rel->r_addend;
if (ssec)
{
if ((ssec->flags & SEC_MERGE)
PR ld/13991 bfd/ * bfd/elf-bfd.h (_bfd_elf_link_just_syms): Define as _bfd_generic_link_just_syms. * bfd/elflink.c (_bfd_elf_link_just_syms): Delete. * bfd/linker.c (_bfd_generic_link_just_syms): Set sec_info_type. * bfd/bfd-in.h (discarded_section): Renamed from elf_discarded_section. * bfd/section.c (SEC_INFO_TYPE_NONE, SEC_INFO_TYPE_STABS, SEC_INFO_TYPE_MERGE, SEC_INFO_TYPE_EH_FRAME, SEC_INFO_TYPE_JUST_SYMS): Renamed from corresponding ELF_INFO_TYPE. * bfd/elf-eh-frame.c, * bfd/elf-m10200.c, * bfd/elf-m10300.c, * bfd/elf.c, * bfd/elf32-arm.c, * bfd/elf32-avr.c, * bfd/elf32-bfin.c, * bfd/elf32-cr16.c, * bfd/elf32-cr16c.c, * bfd/elf32-cris.c, * bfd/elf32-crx.c, * bfd/elf32-d10v.c, * bfd/elf32-epiphany.c, * bfd/elf32-fr30.c, * bfd/elf32-frv.c, * bfd/elf32-h8300.c, * bfd/elf32-hppa.c, * bfd/elf32-i370.c, * bfd/elf32-i386.c, * bfd/elf32-i860.c, * bfd/elf32-ip2k.c, * bfd/elf32-iq2000.c, * bfd/elf32-lm32.c, * bfd/elf32-m32c.c, * bfd/elf32-m32r.c, * bfd/elf32-m68hc1x.c, * bfd/elf32-m68k.c, * bfd/elf32-mcore.c, * bfd/elf32-mep.c, * bfd/elf32-moxie.c, * bfd/elf32-msp430.c, * bfd/elf32-mt.c, * bfd/elf32-openrisc.c, * bfd/elf32-ppc.c, * bfd/elf32-rl78.c, * bfd/elf32-rx.c, * bfd/elf32-s390.c, * bfd/elf32-score.c, * bfd/elf32-score7.c, * bfd/elf32-sh.c, * bfd/elf32-spu.c, * bfd/elf32-tic6x.c, * bfd/elf32-tilepro.c, * bfd/elf32-v850.c, * bfd/elf32-vax.c, * bfd/elf32-xc16x.c, * bfd/elf32-xstormy16.c, * bfd/elf32-xtensa.c, * bfd/elf64-alpha.c, * bfd/elf64-hppa.c, * bfd/elf64-ia64-vms.c, * bfd/elf64-mmix.c, * bfd/elf64-ppc.c, * bfd/elf64-s390.c, * bfd/elf64-sh64.c, * bfd/elf64-x86-64.c, * bfd/elflink.c, * bfd/elfnn-ia64.c, * bfd/elfxx-mips.c, * bfd/elfxx-sparc.c, * bfd/elfxx-tilegx.c, * bfd/reloc.c: Update all references. * bfd/bfd-in2.h: Regenerate. ld/ * ld/ldlang.c (size_input_section): Use sec_info_type rather than usrdata->flags.just_syms. * ld/ldwrite.c (build_link_order): Likewise. * ld/emultempl/hppaelf.em (build_section_lists): Likewise. * ld/emultempl/ppc64elf.em (build_toc_list): Likewise. * ld/emultempl/armelf.em (build_section_lists): Likewise. (after_allocation): Update for renamed sec_info_type value. * ld/emultempl/tic6xdsbt.em: Likewise.
2012-04-24 07:12:40 +02:00
&& ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
symval = _bfd_merged_section_offset (abfd, & ssec,
elf_section_data (ssec)->sec_info,
symval);
}
/* Now make the offset relative to where the linker is putting it. */
if (ssec)
symval +=
ssec->output_section->vma + ssec->output_offset;
symval += rel->r_addend;
}
else
{
unsigned long indx;
struct elf_link_hash_entry * h;
/* An external symbol. */
indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
h = elf_sym_hashes (abfd)[indx];
BFD_ASSERT (h != NULL);
if (h->root.type != bfd_link_hash_defined
&& h->root.type != bfd_link_hash_defweak)
{
/* This appears to be a reference to an undefined
symbol. Just ignore it--it will be caught by the
regular reloc processing. */
if (lrel)
*lrel = rel;
return 0;
}
symval = (h->root.u.def.value
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
symval += rel->r_addend;
}
r_type = ELF32_R_TYPE (rel->r_info);
switch (r_type)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
{
case R_RL78_SYM:
(void) rl78_compute_complex_reloc (r_type, symval, input_section);
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
break;
case R_RL78_OPromtop:
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
symval = get_romstart (info, input_bfd, input_section, rel->r_offset);
(void) rl78_compute_complex_reloc (r_type, symval, input_section);
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
break;
case R_RL78_OPramtop:
Return void from linker callbacks The ldmain.c implementation of these linker callback functions always return true, so any code handling a false return is dead. What's more, some of the bfd backends abort if ever a false return is seen, and there seems to be some confusion in gdb's compile-object-load.c. The return value was never meant to be "oh yes, a multiple_definition error occurred", but rather "out of memory or other catastrophic failure". This patch removes the status return on the callbacks that always return true. I kept the return status for "notice" because that one does happen to need to return "out of memory". include/ * bfdlink.h (struct bfd_link_callbacks): Update comments. Return void from multiple_definition, multiple_common, add_to_set, constructor, warning, undefined_symbol, reloc_overflow, reloc_dangerous and unattached_reloc. bfd/ * aoutx.h: Adjust linker callback calls throughout file, removing dead code. * bout.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i960.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * coff-z80.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * cofflink.c: Likewise. * ecoff.c: Likewise. * elf-bfd.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-ft32.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * reloc.c: Likewise. * reloc16.c: Likewise. * simple.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. * elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. * elf32-rx.c: (get_symbol_value, get_gp, get_romstart, get_ramstart): Delete status param. Adjust calls to these and linker callbacks throughout. ld/ * ldmain.c (multiple_definition, multiple_common, add_to_set, constructor_callback, warning_callback, undefined_symbol, reloc_overflow, reloc_dangerous, unattached_reloc): Return void. * emultempl/elf32.em: Adjust callback calls. gdb/ * compile/compile-object-load.c (link_callbacks_multiple_definition, link_callbacks_warning, link_callbacks_undefined_symbol, link_callbacks_undefined_symbol, link_callbacks_reloc_overflow, link_callbacks_reloc_dangerous, link_callbacks_unattached_reloc): Return void.
2016-05-27 09:50:55 +02:00
symval = get_ramstart (info, input_bfd, input_section, rel->r_offset);
(void) rl78_compute_complex_reloc (r_type, symval, input_section);
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
break;
case R_RL78_OPneg:
case R_RL78_OPadd:
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
case R_RL78_OPsub:
case R_RL78_OPmul:
case R_RL78_OPdiv:
case R_RL78_OPshla:
case R_RL78_OPshra:
case R_RL78_OPsctsize:
case R_RL78_OPscttop:
case R_RL78_OPand:
case R_RL78_OPor:
case R_RL78_OPxor:
case R_RL78_OPnot:
case R_RL78_OPmod:
(void) rl78_compute_complex_reloc (r_type, 0, input_section);
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
break;
case R_RL78_DIR16UL:
case R_RL78_DIR8UL:
case R_RL78_ABS16UL:
case R_RL78_ABS8UL:
*scale = 4;
goto reloc_computes_value;
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
case R_RL78_DIR16UW:
case R_RL78_DIR8UW:
case R_RL78_ABS16UW:
case R_RL78_ABS8UW:
*scale = 2;
goto reloc_computes_value;
2015-08-12 13:32:43 +02:00
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
default:
reloc_computes_value:
symval = rl78_compute_complex_reloc (r_type, symval, input_section);
-Wimplicit-fallthrough warning fixes Comment changes. bfd/ * coff-h8300.c: Spell fall through comments consistently. * coffgen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-ppc.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf64-ppc.c: Likewise. * elfxx-aarch64.c: Likewise. * elfxx-mips.c: Likewise. * cpu-ns32k.c: Add missing fall through comments. * elf-m10300.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-frv.c: Likewise. * elf32-i386.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-nds32.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-sh.c: Likewise. * elf32-tic6x.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * ieee.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * srec.c: Likewise. * versados.c: Likewise. opcodes/ * aarch64-opc.c: Spell fall through comments consistently. * i386-dis.c: Likewise. * aarch64-dis.c: Add missing fall through comments. * aarch64-opc.c: Likewise. * arc-dis.c: Likewise. * arm-dis.c: Likewise. * i386-dis.c: Likewise. * m68k-dis.c: Likewise. * mep-asm.c: Likewise. * ns32k-dis.c: Likewise. * sh-dis.c: Likewise. * tic4x-dis.c: Likewise. * tic6x-dis.c: Likewise. * vax-dis.c: Likewise. binutils/ * dlltool.c: Spell fall through comments consistently. * objcopy.c: Likewise. * readelf.c: Likewise. * dwarf.c: Add missing fall through comments. * elfcomm.c: Likewise. * sysinfo.y: Likewise. * readelf.c: Likewise. Also remove extraneous comments. gas/ * app.c: Add missing fall through comments. * dw2gencfi.c: Likewise. * expr.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-crx.c: Likewise. * config/tc-dlx.c: Likewise. * config/tc-h8300.c: Likewise. * config/tc-hppa.c: Likewise. * config/tc-i370.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m68hc11.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-metag.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-rx.c: Likewise. * config/tc-score.c: Likewise. * config/tc-score7.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-vax.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/tc-z80.c: Likewise. * config/tc-z8k.c: Likewise. * config/obj-elf.c: Likewise. * config/tc-i386.c: Likewise. * depend.c: Spell fall through comments consistently. * config/tc-arm.c: Likewise. * config/tc-d10v.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-visium.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/tc-z8k.c: Likewise. gprof/ * gprof.c: Add missing fall through comments. ld/ * lexsup.c: Spell fall through comments consistently and add missing fall through comments.
2016-10-05 09:47:02 +02:00
/* Fall through. */
case R_RL78_DIR32:
case R_RL78_DIR24S:
case R_RL78_DIR16:
case R_RL78_DIR16U:
case R_RL78_DIR16S:
case R_RL78_DIR24S_PCREL:
case R_RL78_DIR16S_PCREL:
case R_RL78_DIR8S_PCREL:
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
if (lrel)
*lrel = rel;
return symval;
}
rel ++;
}
}
struct {
int prefix; /* or -1 for "no prefix" */
int insn; /* or -1 for "end of list" */
int insn_for_saddr; /* or -1 for "no alternative" */
int insn_for_sfr; /* or -1 for "no alternative" */
} relax_addr16[] = {
{ -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
{ -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
{ -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
{ -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
{ -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
{ -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
{ -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
{ -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
{ -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
{ -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
{ -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
{ -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
{ -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
{ -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
{ -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
{ -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
{ -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
{ -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
{ -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
{ -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
{ -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
{ -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
{ -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
{ -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
{ -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
{ -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
{ -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
{ -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
{ -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
{ -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
{ 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
{ 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
{ 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
{ 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
{ 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
{ 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
{ 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
{ 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
{ 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
{ 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
{ 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
{ 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
{ 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
{ 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
{ 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
{ 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
{ 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
Remove trailing white spaces in bfd * aout0.c: Remove trailing white spaces. * archive.c: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd-in2.h: Likewise. * coff-alpha.c: Likewise. * coff-i860.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-tic80.c: Likewise. * coff-x86_64.c: Likewise. * coff-z80.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * compress.c: Likewise. * corefile.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-crx.c: Likewise. * cpu-h8300.c: Likewise. * cpu-i386.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m68k.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-sh.c: Likewise. * cpu-xc16x.c: Likewise. * dwarf2.c: Likewise. * ecofflink.c: Likewise. * ecoffswap.h: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-vxworks.c: Likewise. * elf32-avr.c: Likewise. * elf32-avr.h: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.h: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-v850.c: Likewise. * elf32-xc16x.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * libcoff.h: Likewise. * libpei.h: Likewise. * libxcoff.h: Likewise. * linker.c: Likewise. * mach-o-i386.c: Likewise. * mach-o-target.c: Likewise. * mach-o.c: Likewise. * mach-o.h: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pdp11.c: Likewise. * pe-x86_64.c: Likewise. * peXXigen.c: Likewise. * pef-traceback.h: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. * riscix.c: Likewise. * section.c: Likewise. * som.c: Likewise. * syms.c: Likewise. * tekhex.c: Likewise. * ticoff.h: Likewise. * vaxbsd.c: Likewise. * xcofflink.c: Likewise. * xtensa-isa.c: Likewise.
2013-01-10 21:03:55 +01:00
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
{ -1, -1, -1, -1 }
};
/* Relax one section. */
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
static bfd_boolean
rl78_elf_relax_section
(bfd * abfd,
asection * sec,
struct bfd_link_info * link_info,
bfd_boolean * again)
{
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
Elf_Internal_Shdr * symtab_hdr;
Elf_Internal_Shdr * shndx_hdr;
Elf_Internal_Rela * internal_relocs;
Elf_Internal_Rela * free_relocs = NULL;
Elf_Internal_Rela * irel;
Elf_Internal_Rela * srel;
Elf_Internal_Rela * irelend;
Elf_Internal_Rela * next_alignment;
bfd_byte * contents = NULL;
bfd_byte * free_contents = NULL;
Elf_Internal_Sym * intsyms = NULL;
Elf_Internal_Sym * free_intsyms = NULL;
Elf_External_Sym_Shndx * shndx_buf = NULL;
bfd_vma pc;
bfd_vma symval ATTRIBUTE_UNUSED = 0;
int pcrel ATTRIBUTE_UNUSED = 0;
int code ATTRIBUTE_UNUSED = 0;
int section_alignment_glue;
int scale;
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
if (abfd == elf_hash_table (link_info)->dynobj
&& strcmp (sec->name, ".plt") == 0)
return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
/* Assume nothing changes. */
*again = FALSE;
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
/* We don't have to do anything for a relocatable link, if
this section does not have relocs, or if this is not a
code section. */
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
if (bfd_link_relocatable (link_info)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
|| (sec->flags & SEC_RELOC) == 0
|| sec->reloc_count == 0
|| (sec->flags & SEC_CODE) == 0)
return TRUE;
2015-09-23 18:23:58 +02:00
symtab_hdr = & elf_symtab_hdr (abfd);
if (elf_symtab_shndx_list (abfd))
shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
else
shndx_hdr = NULL;
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
/* Get the section contents. */
if (elf_section_data (sec)->this_hdr.contents != NULL)
contents = elf_section_data (sec)->this_hdr.contents;
/* Go get them off disk. */
else
{
if (! bfd_malloc_and_get_section (abfd, sec, &contents))
goto error_return;
elf_section_data (sec)->this_hdr.contents = contents;
}
/* Read this BFD's symbols. */
/* Get cached copy if it exists. */
if (symtab_hdr->contents != NULL)
intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
else
{
intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
symtab_hdr->contents = (bfd_byte *) intsyms;
}
2015-09-23 18:23:58 +02:00
if (shndx_hdr && shndx_hdr->sh_size != 0)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
{
bfd_size_type amt;
amt = symtab_hdr->sh_info;
amt *= sizeof (Elf_External_Sym_Shndx);
shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
if (shndx_buf == NULL)
goto error_return;
if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
* aix386-core.c: Remove use of PTR and PARAMS macros. * archive.c: Likewise. * cache.c: Likewise. * cisco-core.c: Likewise. * coff-alpha.c: Likewise. * coff-apollo.c: Likewise. * coff-aux.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i386.c: Likewise. * coff-i960.c: Likewise. * coff-ia64.c: Likewise. * coff-m68k.c: Likewise. * coff-m88k.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-or32.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-sparc.c: Likewise. * coff-stgo32.c: Likewise. * coff-tic30.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * cofflink.c: Likewise. * cpu-arc.c: Likewise. * cpu-cris.c: Likewise. * cpu-h8500.c: Likewise. * cpu-i960.c: Likewise. * cpu-msp430.c: Likewise. * cpu-ns32k.c: Likewise. * cpu-powerpc.c: Likewise. * cpu-rs6000.c: Likewise. * cpu-tic4x.c: Likewise. * cpu-w65.c: Likewise. * ecoff.c: Likewise. * ecofflink.c: Likewise. * elf-m10200.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-h8300.c: Likewise. * elf32-i960.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-vax.c: Likewise. * elf64-alpha.c: Likewise. * elf64-mmix.c: Likewise. * elf64-s390.c: Likewise. * elf64-sparc.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * hash.c: Likewise. * hp300hpux.c: Likewise. * hppabsd-core.c: Likewise. * hpux-core.c: Likewise. * i386dynix.c: Likewise. * i386linux.c: Likewise. * i386lynx.c: Likewise. * i386mach3.c: Likewise. * i386msdos.c: Likewise. * i386os9k.c: Likewise. * irix-core.c: Likewise. * lynx-core.c: Likewise. * m68klinux.c: Likewise. * mach-o.h: Likewise. * mipsbsd.c: Likewise. * netbsd-core.c: Likewise. * nlm32-i386.c: Likewise. * osf-core.c: Likewise. * pc532-mach.c: Likewise. * pef.c: Likewise. * ppcboot.c: Likewise. * ptrace-core.c: Likewise. * reloc16.c: Likewise. * sco5-core.c: Likewise. * som.h: Likewise. * sparclinux.c: Likewise. * sparclynx.c: Likewise. * ticoff.h: Likewise. * trad-core.c: Likewise. * vms-lib.c: Likewise. * xsym.h: Likewise.
2012-07-13 16:22:50 +02:00
|| bfd_bread (shndx_buf, amt, abfd) != amt)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
goto error_return;
shndx_hdr->contents = (bfd_byte *) shndx_buf;
}
/* Get a copy of the native relocations. */
internal_relocs = (_bfd_elf_link_read_relocs
* aix386-core.c: Remove use of PTR and PARAMS macros. * archive.c: Likewise. * cache.c: Likewise. * cisco-core.c: Likewise. * coff-alpha.c: Likewise. * coff-apollo.c: Likewise. * coff-aux.c: Likewise. * coff-h8300.c: Likewise. * coff-h8500.c: Likewise. * coff-i386.c: Likewise. * coff-i960.c: Likewise. * coff-ia64.c: Likewise. * coff-m68k.c: Likewise. * coff-m88k.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-or32.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-sparc.c: Likewise. * coff-stgo32.c: Likewise. * coff-tic30.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff-w65.c: Likewise. * cofflink.c: Likewise. * cpu-arc.c: Likewise. * cpu-cris.c: Likewise. * cpu-h8500.c: Likewise. * cpu-i960.c: Likewise. * cpu-msp430.c: Likewise. * cpu-ns32k.c: Likewise. * cpu-powerpc.c: Likewise. * cpu-rs6000.c: Likewise. * cpu-tic4x.c: Likewise. * cpu-w65.c: Likewise. * ecoff.c: Likewise. * ecofflink.c: Likewise. * elf-m10200.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-h8300.c: Likewise. * elf32-i960.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-vax.c: Likewise. * elf64-alpha.c: Likewise. * elf64-mmix.c: Likewise. * elf64-s390.c: Likewise. * elf64-sparc.c: Likewise. * elfnn-ia64.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * hash.c: Likewise. * hp300hpux.c: Likewise. * hppabsd-core.c: Likewise. * hpux-core.c: Likewise. * i386dynix.c: Likewise. * i386linux.c: Likewise. * i386lynx.c: Likewise. * i386mach3.c: Likewise. * i386msdos.c: Likewise. * i386os9k.c: Likewise. * irix-core.c: Likewise. * lynx-core.c: Likewise. * m68klinux.c: Likewise. * mach-o.h: Likewise. * mipsbsd.c: Likewise. * netbsd-core.c: Likewise. * nlm32-i386.c: Likewise. * osf-core.c: Likewise. * pc532-mach.c: Likewise. * pef.c: Likewise. * ppcboot.c: Likewise. * ptrace-core.c: Likewise. * reloc16.c: Likewise. * sco5-core.c: Likewise. * som.h: Likewise. * sparclinux.c: Likewise. * sparclynx.c: Likewise. * ticoff.h: Likewise. * trad-core.c: Likewise. * vms-lib.c: Likewise. * xsym.h: Likewise.
2012-07-13 16:22:50 +02:00
(abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
link_info->keep_memory));
if (internal_relocs == NULL)
goto error_return;
if (! link_info->keep_memory)
free_relocs = internal_relocs;
/* The RL_ relocs must be just before the operand relocs they go
with, so we must sort them to guarantee this. We use bubblesort
instead of qsort so we can guarantee that relocs with the same
address remain in the same relative order. */
reloc_bubblesort (internal_relocs, sec->reloc_count);
/* Walk through them looking for relaxing opportunities. */
irelend = internal_relocs + sec->reloc_count;
/* This will either be NULL or a pointer to the next alignment
relocation. */
next_alignment = internal_relocs;
/* We calculate worst case shrinkage caused by alignment directives.
No fool-proof, but better than either ignoring the problem or
doing heavy duty analysis of all the alignment markers in all
input sections. */
section_alignment_glue = 0;
for (irel = internal_relocs; irel < irelend; irel++)
if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
&& irel->r_addend & RL78_RELAXA_ALIGN)
{
int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
if (section_alignment_glue < this_glue)
section_alignment_glue = this_glue;
}
/* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
shrinkage. */
section_alignment_glue *= 2;
for (irel = internal_relocs; irel < irelend; irel++)
{
unsigned char *insn;
int nrelocs;
/* The insns we care about are all marked with one of these. */
if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
continue;
if (irel->r_addend & RL78_RELAXA_ALIGN
|| next_alignment == internal_relocs)
{
/* When we delete bytes, we need to maintain all the alignments
indicated. In addition, we need to be careful about relaxing
jumps across alignment boundaries - these displacements
*grow* when we delete bytes. For now, don't shrink
displacements across an alignment boundary, just in case.
Note that this only affects relocations to the same
section. */
next_alignment += 2;
while (next_alignment < irelend
&& (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
|| !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
next_alignment ++;
if (next_alignment >= irelend || next_alignment->r_offset == 0)
next_alignment = NULL;
}
/* When we hit alignment markers, see if we've shrunk enough
before them to reduce the gap without violating the alignment
requirements. */
if (irel->r_addend & RL78_RELAXA_ALIGN)
{
/* At this point, the next relocation *should* be the ELIGN
end marker. */
Elf_Internal_Rela *erel = irel + 1;
unsigned int alignment, nbytes;
if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
continue;
if (!(erel->r_addend & RL78_RELAXA_ELIGN))
continue;
alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
if (erel->r_offset - irel->r_offset < alignment)
continue;
nbytes = erel->r_offset - irel->r_offset;
nbytes /= alignment;
nbytes *= alignment;
elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes,
next_alignment, erel->r_offset == sec->size);
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
*again = TRUE;
continue;
}
if (irel->r_addend & RL78_RELAXA_ELIGN)
continue;
insn = contents + irel->r_offset;
nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
/* At this point, we have an insn that is a candidate for linker
relaxation. There are NRELOCS relocs following that may be
relaxed, although each reloc may be made of more than one
reloc entry (such as gp-rel symbols). */
/* Get the value of the symbol referred to by the reloc. Just
in case this is the last reloc in the list, use the RL's
addend to choose between this reloc (no addend) or the next
(yes addend, which means at least one following reloc). */
/* srel points to the "current" reloction for this insn -
actually the last reloc for a given operand, which is the one
we need to update. We check the relaxations in the same
order that the relocations happen, so we'll just push it
along as we go. */
srel = irel;
pc = sec->output_section->vma + sec->output_offset
+ srel->r_offset;
#define GET_RELOC \
BFD_ASSERT (nrelocs > 0); \
symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
pcrel = symval - pc + srel->r_addend; \
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
nrelocs --;
#define SNIPNR(offset, nbytes) \
elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
#define SNIP(offset, nbytes, newtype) \
SNIPNR (offset, nbytes); \
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
/* The order of these bit tests must match the order that the
relocs appear in. Since we sorted those by offset, we can
predict them. */
/*----------------------------------------------------------------------*/
/* EF ad BR $rel8 pcrel
ED al ah BR !abs16 abs
EE al ah BR $!rel16 pcrel
EC al ah as BR !!abs20 abs
FD al ah CALL !abs16 abs
FE al ah CALL $!rel16 pcrel
FC al ah as CALL !!abs20 abs
DC ad BC $rel8
DE ad BNC $rel8
DD ad BZ $rel8
DF ad BNZ $rel8
61 C3 ad BH $rel8
61 D3 ad BNH $rel8
61 C8 EF ad SKC ; BR $rel8
61 D8 EF ad SKNC ; BR $rel8
61 E8 EF ad SKZ ; BR $rel8
61 F8 EF ad SKNZ ; BR $rel8
61 E3 EF ad SKH ; BR $rel8
61 F3 EF ad SKNH ; BR $rel8
*/
if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
{
/* SKIP opcodes that skip non-branches will have a relax tag
but no corresponding symbol to relax against; we just
skip those. */
if (irel->r_addend & RL78_RELAXA_RNUM)
{
GET_RELOC;
}
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
switch (insn[0])
{
case 0xdc: /* BC */
case 0xdd: /* BZ */
case 0xde: /* BNC */
case 0xdf: /* BNZ */
if (insn[1] == 0x03 && insn[2] == 0xee /* BR */
&& (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */
{
/* This is a "long" conditional as generated by gas:
DC 03 EE ad.dr */
if (pcrel < 127
&& pcrel > -127)
{
insn[0] ^= 0x02; /* invert conditional */
SNIPNR (4, 1);
SNIP (1, 2, R_RL78_DIR8S_PCREL);
insn[1] = pcrel;
*again = TRUE;
}
}
break;
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
case 0xec: /* BR !!abs20 */
if (pcrel < 127
&& pcrel > -127)
{
insn[0] = 0xef;
insn[1] = pcrel;
SNIP (2, 2, R_RL78_DIR8S_PCREL);
*again = TRUE;
}
else if (symval < 65536)
{
insn[0] = 0xed;
insn[1] = symval & 0xff;
insn[2] = symval >> 8;
SNIP (2, 1, R_RL78_DIR16U);
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
*again = TRUE;
}
else if (pcrel < 32767
&& pcrel > -32767)
{
insn[0] = 0xee;
insn[1] = pcrel & 0xff;
insn[2] = pcrel >> 8;
SNIP (2, 1, R_RL78_DIR16S_PCREL);
*again = TRUE;
}
break;
case 0xee: /* BR $!pcrel16 */
case 0xed: /* BR $!abs16 */
if (pcrel < 127
&& pcrel > -127)
{
insn[0] = 0xef;
insn[1] = pcrel;
SNIP (2, 1, R_RL78_DIR8S_PCREL);
*again = TRUE;
}
break;
case 0xfc: /* CALL !!abs20 */
if (symval < 65536)
{
insn[0] = 0xfd;
insn[1] = symval & 0xff;
insn[2] = symval >> 8;
SNIP (2, 1, R_RL78_DIR16U);
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
*again = TRUE;
}
else if (pcrel < 32767
&& pcrel > -32767)
{
insn[0] = 0xfe;
insn[1] = pcrel & 0xff;
insn[2] = pcrel >> 8;
SNIP (2, 1, R_RL78_DIR16S_PCREL);
*again = TRUE;
}
break;
case 0x61: /* PREFIX */
/* For SKIP/BR, we change the BR opcode and delete the
SKIP. That way, we don't have to find and change the
relocation for the BR. */
/* Note that, for the case where we're skipping some
other insn, we have no "other" reloc but that's safe
here anyway. */
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
switch (insn[1])
{
case 0xd3: /* BNH */
case 0xc3: /* BH */
if (insn[2] == 0x03 && insn[3] == 0xee
&& (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */
{
/* Another long branch by gas:
61 D3 03 EE ad.dr */
if (pcrel < 127
&& pcrel > -127)
{
insn[1] ^= 0x10; /* invert conditional */
SNIPNR (5, 1);
SNIP (2, 2, R_RL78_DIR8S_PCREL);
insn[2] = pcrel;
*again = TRUE;
}
}
break;
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
case 0xc8: /* SKC */
if (insn[2] == 0xef)
{
insn[2] = 0xde; /* BNC */
SNIPNR (0, 2);
}
break;
case 0xd8: /* SKNC */
if (insn[2] == 0xef)
{
insn[2] = 0xdc; /* BC */
SNIPNR (0, 2);
}
break;
case 0xe8: /* SKZ */
if (insn[2] == 0xef)
{
insn[2] = 0xdf; /* BNZ */
SNIPNR (0, 2);
}
break;
case 0xf8: /* SKNZ */
if (insn[2] == 0xef)
{
insn[2] = 0xdd; /* BZ */
SNIPNR (0, 2);
}
break;
case 0xe3: /* SKH */
if (insn[2] == 0xef)
{
insn[2] = 0xd3; /* BNH */
SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
}
break;
case 0xf3: /* SKNH */
if (insn[2] == 0xef)
{
insn[2] = 0xc3; /* BH */
SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
}
break;
}
break;
}
}
if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16
&& nrelocs > 0)
[bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 02:49:37 +01:00
{
/*----------------------------------------------------------------------*/
/* Some insns have both a 16-bit address operand and an 8-bit
variant if the address is within a special range:
Address 16-bit operand SADDR range SFR range
FFF00-FFFFF 0xff00-0xffff 0x00-0xff
FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
The RELAX_ADDR16[] array has the insn encodings for the
16-bit operand version, as well as the SFR and SADDR
variants. We only need to replace the encodings and
adjust the operand.
Note: we intentionally do not attempt to decode and skip
any ES: prefix, as adding ES: means the addr16 (likely)
no longer points to saddr/sfr space.
*/
int is_sfr;
int is_saddr;
int idx;
int poff;
GET_RELOC;
if (0xffe20 <= symval && symval <= 0xfffff)
{
is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
{
if (relax_addr16[idx].prefix != -1
&& insn[0] == relax_addr16[idx].prefix
&& insn[1] == relax_addr16[idx].insn)
{
poff = 1;
}
else if (relax_addr16[idx].prefix == -1
&& insn[0] == relax_addr16[idx].insn)
{
poff = 0;
}
else
continue;
/* We have a matched insn, and poff is 0 or 1 depending
on the base pattern size. */
if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
{
insn[poff] = relax_addr16[idx].insn_for_sfr;
SNIP (poff+2, 1, R_RL78_RH_SFR);
}
else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
{
insn[poff] = relax_addr16[idx].insn_for_saddr;
SNIP (poff+2, 1, R_RL78_RH_SADDR);
}
}
}
}
/*----------------------------------------------------------------------*/
}
return TRUE;
error_return:
if (free_relocs != NULL)
free (free_relocs);
if (free_contents != NULL)
free (free_contents);
if (shndx_buf != NULL)
{
shndx_hdr->contents = NULL;
free (shndx_buf);
}
if (free_intsyms != NULL)
free (free_intsyms);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
return TRUE;
}
#define ELF_ARCH bfd_arch_rl78
#define ELF_MACHINE_CODE EM_RL78
#define ELF_MAXPAGESIZE 0x1000
bfd target vector rationalisation This renames the bfd targets to <cpu>_<format>_<other>_<endian>_vec. So for example, bfd_elf32_ntradlittlemips_vec becomes mips_elf32_ntrad_le_vec and hp300bsd_vec becomes m68k_aout_hp300bsd_vec. bfd/ * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-ns32k.c, * aout-sparcle.c, * aout0.c, * aoutx.h, * armnetbsd.c, * bout.c, * cf-i386lynx.c, * cf-sparclynx.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-aux.c, * coff-go32.c, * coff-h8300.c, * coff-h8500.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mips.c, * coff-rs6000.c, * coff-sh.c, * coff-sparc.c, * coff-stgo32.c, * coff-svm68k.c, * coff-tic80.c, * coff-u68k.c, * coff-w65.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * config.bfd, * configure.com, * configure.in, * demo64.c, * elf-m10200.c, * elf-m10300.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-gen.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-gen.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * epoc-pe-arm.c, * epoc-pei-arm.c, * hp300bsd.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386bsd.c, * i386dynix.c, * i386freebsd.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * i386os9k.c, * irix-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * m88kopenbsd.c, * mach-o-i386.c, * mach-o-x86-64.c, * makefile.vms, * mipsbsd.c, * mmo.c, * netbsd-core.c, * newsos3.c, * nlm32-alpha.c, * nlm32-i386.c, * nlm32-ppc.c, * nlm32-sparc.c, * ns32knetbsd.c, * osf-core.c, * pc532-mach.c, * pe-arm-wince.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-ppc.c, * pe-sh.c, * pe-x86_64.c, * pei-arm-wince.c, * pei-arm.c, * pei-i386.c, * pei-ia64.c, * pei-mcore.c, * pei-mips.c, * pei-ppc.c, * pei-sh.c, * pei-x86_64.c, * ppcboot.c, * ptrace-core.c, * riscix.c, * sco5-core.c, * som.c, * sparclinux.c, * sparclynx.c, * sparcnetbsd.c, * sunos.c, * targets.c, * trad-core.c, * vax1knetbsd.c, * vaxbsd.c, * vaxnetbsd.c, * versados.c, * vms-alpha.c, * vms-lib.c: Rename bfd targets to <cpu>_<format>_<other>_<endian>_vec. Adjust associated MY macros on aout targets. * configure: Regenerate. binutils/ * emul_aix.c: Update bfd target vector naming. * testsuite/binutils-all/objcopy.exp: Likewise. ld/ * emultempl/metagelf.em: Update bfd target vector naming. * emultempl/nios2elf.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/tic6xdsbt.em: Likewise.
2014-05-02 12:39:40 +02:00
#define TARGET_LITTLE_SYM rl78_elf32_vec
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
#define TARGET_LITTLE_NAME "elf32-rl78"
#define elf_info_to_howto_rel NULL
#define elf_info_to_howto rl78_info_to_howto_rela
#define elf_backend_object_p rl78_elf_object_p
#define elf_backend_relocate_section rl78_elf_relocate_section
#define elf_symbol_leading_char ('_')
#define elf_backend_can_gc_sections 1
#define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
#define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
#define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
#define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
#define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
#define bfd_elf32_bfd_relax_section rl78_elf_relax_section
#define elf_backend_check_relocs rl78_elf_check_relocs
#define elf_backend_always_size_sections \
rl78_elf_always_size_sections
#define elf_backend_finish_dynamic_sections \
rl78_elf_finish_dynamic_sections
#include "elf32-target.h"