1991-03-28 17:26:26 +01:00
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/* Machine-dependent code which would otherwise be in inflow.c and core.c,
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for GDB, the GNU debugger.
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Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
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This code is for the sparc cpu.
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This file is part of GDB.
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GDB is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 1, or (at your option)
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any later version.
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GDB is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GDB; see the file COPYING. If not, write to
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the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include <stdio.h>
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#include "defs.h"
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#include "param.h"
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#include "frame.h"
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#include "inferior.h"
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#include "obstack.h"
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#include "signame.h"
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#include "target.h"
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#include "ieee-float.h"
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#include <sys/param.h>
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#include <sys/dir.h>
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#include <sys/user.h>
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#include <signal.h>
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#include <sys/ioctl.h>
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#include <fcntl.h>
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#include <sys/ptrace.h>
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#include <sys/file.h>
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#include <sys/stat.h>
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#include <sys/core.h>
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#include "gdbcore.h"
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/* From infrun.c */
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extern int stop_after_trap;
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typedef enum
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{
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Error, not_branch, bicc, bicca, ba, baa, ticc, ta,
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} branch_type;
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/* Simulate single-step ptrace call for sun4. Code written by Gary
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Beihl (beihl@mcc.com). */
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/* npc4 and next_pc describe the situation at the time that the
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step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
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static CORE_ADDR next_pc, npc4, target;
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static int brknpc4, brktrg;
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typedef char binsn_quantum[BREAKPOINT_MAX];
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static binsn_quantum break_mem[3];
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/* Non-zero if we just simulated a single-step ptrace call. This is
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needed because we cannot remove the breakpoints in the inferior
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process until after the `wait' in `wait_for_inferior'. Used for
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sun4. */
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int one_stepped;
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void
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single_step (signal)
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int signal;
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{
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branch_type br, isannulled();
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CORE_ADDR pc;
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long pc_instruction;
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if (!one_stepped)
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{
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/* Always set breakpoint for NPC. */
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next_pc = read_register (NPC_REGNUM);
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npc4 = next_pc + 4; /* branch not taken */
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target_insert_breakpoint (next_pc, break_mem[0]);
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/* printf ("set break at %x\n",next_pc); */
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pc = read_register (PC_REGNUM);
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pc_instruction = read_memory_integer (pc, sizeof(pc_instruction));
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br = isannulled (pc_instruction, pc, &target);
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brknpc4 = brktrg = 0;
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if (br == bicca)
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{
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/* Conditional annulled branch will either end up at
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npc (if taken) or at npc+4 (if not taken).
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Trap npc+4. */
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brknpc4 = 1;
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target_insert_breakpoint (npc4, break_mem[1]);
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}
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else if (br == baa && target != next_pc)
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{
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/* Unconditional annulled branch will always end up at
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the target. */
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brktrg = 1;
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target_insert_breakpoint (target, break_mem[2]);
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}
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/* Let it go */
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ptrace (7, inferior_pid, 1, signal);
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one_stepped = 1;
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return;
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}
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else
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{
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/* Remove breakpoints */
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target_remove_breakpoint (next_pc, break_mem[0]);
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if (brknpc4)
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target_remove_breakpoint (npc4, break_mem[1]);
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if (brktrg)
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target_remove_breakpoint (target, break_mem[2]);
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one_stepped = 0;
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}
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}
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/*
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* Find the pc saved in frame FRAME.
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*/
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CORE_ADDR
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frame_saved_pc (frame)
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FRAME frame;
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{
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CORE_ADDR prev_pc;
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/* If it's at the bottom, the return value's stored in i7/rp */
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if (get_current_frame () == frame)
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prev_pc = GET_RWINDOW_REG (read_register (SP_REGNUM), rw_in[7]);
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else
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/* Wouldn't this always work? This would allow this routine to
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be completely a macro. */
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prev_pc = GET_RWINDOW_REG (frame->bottom, rw_in[7]);
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return PC_ADJUST (prev_pc);
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}
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/*
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* Since an individual frame in the frame cache is defined by two
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* arguments (a frame pointer and a stack pointer), we need two
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* arguments to get info for an arbitrary stack frame. This routine
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* takes two arguments and makes the cached frames look as if these
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* two arguments defined a frame on the cache. This allows the rest
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* of info frame to extract the important arguments without
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* difficulty.
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*/
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FRAME
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setup_arbitrary_frame (frame, stack)
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FRAME_ADDR frame, stack;
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{
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FRAME fid = create_new_frame (frame, 0);
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if (!fid)
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fatal ("internal: create_new_frame returned invalid frame id");
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fid->bottom = stack;
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return fid;
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}
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/* This code was written by Gary Beihl (beihl@mcc.com).
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It was modified by Michael Tiemann (tiemann@corto.inria.fr). */
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/*
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* This routine appears to be passed a size by which to increase the
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* stack. It then executes a save instruction in the inferior to
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* increase the stack by this amount. Only the register window system
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* should be affected by this; the program counter & etc. will not be.
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*
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* This instructions used for this purpose are:
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*
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* sethi %hi(0x0),g1 *
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* add g1,0x1ee0,g1 *
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* save sp,g1,sp
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* sethi %hi(0x0),g1 *
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* add g1,0x1ee0,g1 *
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* t g0,0x1,o0
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* sethi %hi(0x0),g0 (nop)
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*
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* I presume that these set g1 to be the negative of the size, do a
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* save (putting the stack pointer at sp - size) and restore the
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* original contents of g1. A * indicates that the actual value of
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* the instruction is modified below.
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*/
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static int save_insn_opcodes[] = {
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0x03000000, 0x82007ee0, 0x9de38001, 0x03000000,
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0x82007ee0, 0x91d02001, 0x01000000 };
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/* Neither do_save_insn or do_restore_insn save stack configuration
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(current_frame, etc),
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since the stack is in an indeterminate state through the call to
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each of them. That responsibility of the routine which calls them. */
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static void
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do_save_insn (size)
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int size;
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{
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int g1 = read_register (G1_REGNUM);
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CORE_ADDR sp = read_register (SP_REGNUM);
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CORE_ADDR pc = read_register (PC_REGNUM);
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CORE_ADDR npc = read_register (NPC_REGNUM);
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CORE_ADDR fake_pc = sp - sizeof (save_insn_opcodes);
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struct inferior_status inf_status;
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save_inferior_status (&inf_status, 0); /* Don't restore stack info */
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/*
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* See above.
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*/
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save_insn_opcodes[0] = 0x03000000 | ((-size >> 10) & 0x3fffff);
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save_insn_opcodes[1] = 0x82006000 | (-size & 0x3ff);
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save_insn_opcodes[3] = 0x03000000 | ((g1 >> 10) & 0x3fffff);
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save_insn_opcodes[4] = 0x82006000 | (g1 & 0x3ff);
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write_memory (fake_pc, (char *)save_insn_opcodes, sizeof (save_insn_opcodes));
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clear_proceed_status ();
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stop_after_trap = 1;
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proceed (fake_pc, 0, 0);
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write_register (PC_REGNUM, pc);
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write_register (NPC_REGNUM, npc);
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restore_inferior_status (&inf_status);
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}
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/*
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* This routine takes a program counter value. It restores the
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* register window system to the frame above the current one.
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* THIS ROUTINE CLOBBERS PC AND NPC IN THE TARGET!
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*/
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/* The following insns translate to:
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restore %g0,%g0,%g0
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t %g0,1
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sethi %hi(0),%g0 */
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static int restore_insn_opcodes[] = { 0x81e80000, 0x91d02001, 0x01000000 };
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static void
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do_restore_insn ()
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{
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CORE_ADDR sp = read_register (SP_REGNUM);
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CORE_ADDR fake_pc = sp - sizeof (restore_insn_opcodes);
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struct inferior_status inf_status;
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save_inferior_status (&inf_status, 0); /* Don't restore stack info */
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write_memory (fake_pc, (char *)restore_insn_opcodes,
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sizeof (restore_insn_opcodes));
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clear_proceed_status ();
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stop_after_trap = 1;
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proceed (fake_pc, 0, 0);
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restore_inferior_status (&inf_status);
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}
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/* This routine should be more specific in it's actions; making sure
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1991-04-22 23:40:42 +02:00
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that it uses the same register in the initial prologue section. */
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1991-03-28 17:26:26 +01:00
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CORE_ADDR
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1991-04-22 23:40:42 +02:00
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skip_prologue (start_pc)
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CORE_ADDR start_pc;
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1991-03-28 17:26:26 +01:00
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{
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union
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{
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unsigned long int code;
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struct
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{
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unsigned int op:2;
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unsigned int rd:5;
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unsigned int op2:3;
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unsigned int imm22:22;
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} sethi;
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struct
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{
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unsigned int op:2;
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unsigned int rd:5;
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unsigned int op3:6;
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unsigned int rs1:5;
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unsigned int i:1;
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unsigned int simm13:13;
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} add;
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int i;
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} x;
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int dest = -1;
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1991-04-22 23:40:42 +02:00
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CORE_ADDR pc = start_pc;
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/* Have we found a save instruction? */
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int found_save = 0;
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1991-03-28 17:26:26 +01:00
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x.i = read_memory_integer (pc, 4);
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/* Recognize the `sethi' insn and record its destination. */
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if (x.sethi.op == 0 && x.sethi.op2 == 4)
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{
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dest = x.sethi.rd;
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pc += 4;
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x.i = read_memory_integer (pc, 4);
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}
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/* Recognize an add immediate value to register to either %g1 or
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the destination register recorded above. Actually, this might
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1991-04-22 23:40:42 +02:00
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well recognize several different arithmetic operations.
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It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1"
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followed by "save %sp, %g1, %sp" is a valid prologue (Not that
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I imagine any compiler really does that, however). */
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1991-03-28 17:26:26 +01:00
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if (x.add.op == 2 && x.add.i && (x.add.rd == 1 || x.add.rd == dest))
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{
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pc += 4;
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x.i = read_memory_integer (pc, 4);
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}
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/* This recognizes any SAVE insn. But why do the XOR and then
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|
|
the compare? That's identical to comparing against 60 (as long
|
|
|
|
|
as there isn't any sign extension). */
|
|
|
|
|
if (x.add.op == 2 && (x.add.op3 ^ 32) == 28)
|
|
|
|
|
{
|
1991-04-22 23:40:42 +02:00
|
|
|
|
found_save = 1;
|
1991-03-28 17:26:26 +01:00
|
|
|
|
pc += 4;
|
|
|
|
|
x.i = read_memory_integer (pc, 4);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Now we need to recognize stores into the frame from the input
|
|
|
|
|
registers. This recognizes all non alternate stores of input
|
|
|
|
|
register, into a location offset from the frame pointer. */
|
|
|
|
|
while (x.add.op == 3
|
|
|
|
|
&& (x.add.op3 & 0x3c) == 4 /* Store, non-alternate. */
|
|
|
|
|
&& (x.add.rd & 0x18) == 0x18 /* Input register. */
|
|
|
|
|
&& x.add.i /* Immediate mode. */
|
|
|
|
|
&& x.add.rs1 == 30 /* Off of frame pointer. */
|
|
|
|
|
/* Into reserved stack space. */
|
|
|
|
|
&& x.add.simm13 >= 0x44
|
|
|
|
|
&& x.add.simm13 < 0x5b)
|
|
|
|
|
{
|
|
|
|
|
pc += 4;
|
|
|
|
|
x.i = read_memory_integer (pc, 4);
|
|
|
|
|
}
|
1991-04-22 23:40:42 +02:00
|
|
|
|
if (found_save)
|
|
|
|
|
return pc;
|
|
|
|
|
else
|
|
|
|
|
/* Without a save instruction, it's not a prologue. */
|
|
|
|
|
return start_pc;
|
1991-03-28 17:26:26 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Check instruction at ADDR to see if it is an annulled branch.
|
|
|
|
|
All other instructions will go to NPC or will trap.
|
|
|
|
|
Set *TARGET if we find a canidate branch; set to zero if not. */
|
|
|
|
|
|
|
|
|
|
branch_type
|
|
|
|
|
isannulled (instruction, addr, target)
|
|
|
|
|
long instruction;
|
|
|
|
|
CORE_ADDR addr, *target;
|
|
|
|
|
{
|
|
|
|
|
branch_type val = not_branch;
|
|
|
|
|
long int offset; /* Must be signed for sign-extend. */
|
|
|
|
|
union
|
|
|
|
|
{
|
|
|
|
|
unsigned long int code;
|
|
|
|
|
struct
|
|
|
|
|
{
|
|
|
|
|
unsigned int op:2;
|
|
|
|
|
unsigned int a:1;
|
|
|
|
|
unsigned int cond:4;
|
|
|
|
|
unsigned int op2:3;
|
|
|
|
|
unsigned int disp22:22;
|
|
|
|
|
} b;
|
|
|
|
|
} insn;
|
|
|
|
|
|
|
|
|
|
*target = 0;
|
|
|
|
|
insn.code = instruction;
|
|
|
|
|
|
|
|
|
|
if (insn.b.op == 0
|
|
|
|
|
&& (insn.b.op2 == 2 || insn.b.op2 == 6 || insn.b.op2 == 7))
|
|
|
|
|
{
|
|
|
|
|
if (insn.b.cond == 8)
|
|
|
|
|
val = insn.b.a ? baa : ba;
|
|
|
|
|
else
|
|
|
|
|
val = insn.b.a ? bicca : bicc;
|
|
|
|
|
offset = 4 * ((int) (insn.b.disp22 << 10) >> 10);
|
|
|
|
|
*target = addr + offset;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return val;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* sparc_frame_find_saved_regs ()
|
|
|
|
|
|
|
|
|
|
Stores, into a struct frame_saved_regs,
|
|
|
|
|
the addresses of the saved registers of frame described by FRAME_INFO.
|
|
|
|
|
This includes special registers such as pc and fp saved in special
|
|
|
|
|
ways in the stack frame. sp is even more special:
|
|
|
|
|
the address we return for it IS the sp for the next frame.
|
|
|
|
|
|
|
|
|
|
Note that on register window machines, we are currently making the
|
|
|
|
|
assumption that window registers are being saved somewhere in the
|
|
|
|
|
frame in which they are being used. If they are stored in an
|
|
|
|
|
inferior frame, find_saved_register will break.
|
|
|
|
|
|
|
|
|
|
On the Sun 4, the only time all registers are saved is when
|
|
|
|
|
a dummy frame is involved. Otherwise, the only saved registers
|
|
|
|
|
are the LOCAL and IN registers which are saved as a result
|
|
|
|
|
of the "save/restore" opcodes. This condition is determined
|
|
|
|
|
by address rather than by value.
|
|
|
|
|
|
|
|
|
|
The "pc" is not stored in a frame on the SPARC. (What is stored
|
|
|
|
|
is a return address minus 8.) sparc_pop_frame knows how to
|
|
|
|
|
deal with that. Other routines might or might not.
|
|
|
|
|
|
|
|
|
|
See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information
|
|
|
|
|
about how this works. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
sparc_frame_find_saved_regs (fi, saved_regs_addr)
|
|
|
|
|
struct frame_info *fi;
|
|
|
|
|
struct frame_saved_regs *saved_regs_addr;
|
|
|
|
|
{
|
|
|
|
|
register int regnum;
|
|
|
|
|
FRAME_ADDR frame = read_register (FP_REGNUM);
|
|
|
|
|
FRAME fid = FRAME_INFO_ID (fi);
|
|
|
|
|
|
|
|
|
|
if (!fid)
|
|
|
|
|
fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS");
|
|
|
|
|
|
|
|
|
|
bzero (saved_regs_addr, sizeof (*saved_regs_addr));
|
|
|
|
|
|
|
|
|
|
/* Old test.
|
|
|
|
|
if (fi->pc >= frame - CALL_DUMMY_LENGTH - 0x140
|
|
|
|
|
&& fi->pc <= frame) */
|
|
|
|
|
|
|
|
|
|
if (fi->pc >= (fi->bottom ? fi->bottom :
|
|
|
|
|
read_register (SP_REGNUM))
|
|
|
|
|
&& fi->pc <= FRAME_FP(fi))
|
|
|
|
|
{
|
|
|
|
|
/* Dummy frame. All but the window regs are in there somewhere. */
|
|
|
|
|
for (regnum = G1_REGNUM; regnum < G1_REGNUM+7; regnum++)
|
|
|
|
|
saved_regs_addr->regs[regnum] =
|
|
|
|
|
frame + (regnum - G0_REGNUM) * 4 - 0xa0;
|
|
|
|
|
for (regnum = I0_REGNUM; regnum < I0_REGNUM+8; regnum++)
|
|
|
|
|
saved_regs_addr->regs[regnum] =
|
|
|
|
|
frame + (regnum - I0_REGNUM) * 4 - 0xc0;
|
|
|
|
|
for (regnum = FP0_REGNUM; regnum < FP0_REGNUM + 32; regnum++)
|
|
|
|
|
saved_regs_addr->regs[regnum] =
|
|
|
|
|
frame + (regnum - FP0_REGNUM) * 4 - 0x80;
|
|
|
|
|
for (regnum = Y_REGNUM; regnum < NUM_REGS; regnum++)
|
|
|
|
|
saved_regs_addr->regs[regnum] =
|
|
|
|
|
frame + (regnum - Y_REGNUM) * 4 - 0xe0;
|
|
|
|
|
frame = fi->bottom ?
|
|
|
|
|
fi->bottom : read_register (SP_REGNUM);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Normal frame. Just Local and In registers */
|
|
|
|
|
frame = fi->bottom ?
|
|
|
|
|
fi->bottom : read_register (SP_REGNUM);
|
|
|
|
|
for (regnum = L0_REGNUM; regnum < L0_REGNUM+16; regnum++)
|
|
|
|
|
saved_regs_addr->regs[regnum] = frame + (regnum-L0_REGNUM) * 4;
|
|
|
|
|
}
|
|
|
|
|
if (fi->next)
|
|
|
|
|
{
|
|
|
|
|
/* Pull off either the next frame pointer or the stack pointer */
|
|
|
|
|
FRAME_ADDR next_next_frame =
|
|
|
|
|
(fi->next->bottom ?
|
|
|
|
|
fi->next->bottom :
|
|
|
|
|
read_register (SP_REGNUM));
|
|
|
|
|
for (regnum = O0_REGNUM; regnum < O0_REGNUM+8; regnum++)
|
|
|
|
|
saved_regs_addr->regs[regnum] = next_next_frame + regnum * 4;
|
|
|
|
|
}
|
|
|
|
|
/* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */
|
|
|
|
|
saved_regs_addr->regs[SP_REGNUM] = FRAME_FP (fi);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Push an empty stack frame, and record in it the current PC, regs, etc.
|
|
|
|
|
|
|
|
|
|
Note that the write's are of registers in the context of the newly
|
|
|
|
|
pushed frame. Thus the the fp*'s, the g*'s, the i*'s, and
|
|
|
|
|
the randoms, of the new frame, are being saved. The locals and outs
|
|
|
|
|
are new; they don't need to be saved. The i's and l's of
|
|
|
|
|
the last frame were saved by the do_save_insn in the register
|
|
|
|
|
file (now on the stack, since a context switch happended imm after).
|
|
|
|
|
|
|
|
|
|
The return pointer register %i7 does not have
|
|
|
|
|
the pc saved into it (return from this frame will be accomplished
|
|
|
|
|
by a POP_FRAME). In fact, we must leave it unclobbered, since we
|
|
|
|
|
must preserve it in the calling routine except across call instructions. */
|
|
|
|
|
|
|
|
|
|
/* Definitely see tm-sparc.h for more doc of the frame format here. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
sparc_push_dummy_frame ()
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR fp;
|
|
|
|
|
char register_temp[REGISTER_BYTES];
|
|
|
|
|
|
|
|
|
|
do_save_insn (0x140); /* FIXME where does this value come from? */
|
|
|
|
|
fp = read_register (FP_REGNUM);
|
|
|
|
|
|
|
|
|
|
read_register_bytes (REGISTER_BYTE (FP0_REGNUM), register_temp, 32 * 4);
|
|
|
|
|
write_memory (fp - 0x80, register_temp, 32 * 4);
|
|
|
|
|
|
|
|
|
|
read_register_bytes (REGISTER_BYTE (G0_REGNUM), register_temp, 8 * 4);
|
|
|
|
|
write_memory (fp - 0xa0, register_temp, 8 * 4);
|
|
|
|
|
|
|
|
|
|
read_register_bytes (REGISTER_BYTE (I0_REGNUM), register_temp, 8 * 4);
|
|
|
|
|
write_memory (fp - 0xc0, register_temp, 8 * 4);
|
|
|
|
|
|
|
|
|
|
/* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */
|
|
|
|
|
read_register_bytes (REGISTER_BYTE (Y_REGNUM), register_temp, 8 * 4);
|
|
|
|
|
write_memory (fp - 0xe0, register_temp, 8 * 4);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Discard from the stack the innermost frame, restoring all saved registers.
|
|
|
|
|
|
|
|
|
|
Note that the values stored in fsr by get_frame_saved_regs are *in
|
|
|
|
|
the context of the called frame*. What this means is that the i
|
|
|
|
|
regs of fsr must be restored into the o regs of the (calling) frame that
|
|
|
|
|
we pop into. We don't care about the output regs of the calling frame,
|
|
|
|
|
since unless it's a dummy frame, it won't have any output regs in it.
|
|
|
|
|
|
|
|
|
|
We never have to bother with %l (local) regs, since the called routine's
|
|
|
|
|
locals get tossed, and the calling routine's locals are already saved
|
|
|
|
|
on its stack. */
|
|
|
|
|
|
|
|
|
|
/* Definitely see tm-sparc.h for more doc of the frame format here. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
sparc_pop_frame ()
|
|
|
|
|
{
|
|
|
|
|
register FRAME frame = get_current_frame ();
|
|
|
|
|
register CORE_ADDR pc;
|
|
|
|
|
struct frame_saved_regs fsr;
|
|
|
|
|
struct frame_info *fi;
|
|
|
|
|
char raw_buffer[REGISTER_BYTES];
|
|
|
|
|
|
|
|
|
|
fi = get_frame_info (frame);
|
|
|
|
|
get_frame_saved_regs (fi, &fsr);
|
|
|
|
|
do_restore_insn ();
|
|
|
|
|
if (fsr.regs[FP0_REGNUM])
|
|
|
|
|
{
|
|
|
|
|
read_memory (fsr.regs[FP0_REGNUM], raw_buffer, 32 * 4);
|
|
|
|
|
write_register_bytes (REGISTER_BYTE (FP0_REGNUM), raw_buffer, 32 * 4);
|
|
|
|
|
}
|
|
|
|
|
if (fsr.regs[G1_REGNUM])
|
|
|
|
|
{
|
|
|
|
|
read_memory (fsr.regs[G1_REGNUM], raw_buffer, 7 * 4);
|
|
|
|
|
write_register_bytes (REGISTER_BYTE (G1_REGNUM), raw_buffer, 7 * 4);
|
|
|
|
|
}
|
|
|
|
|
if (fsr.regs[I0_REGNUM])
|
|
|
|
|
{
|
|
|
|
|
read_memory (fsr.regs[I0_REGNUM], raw_buffer, 8 * 4);
|
|
|
|
|
write_register_bytes (REGISTER_BYTE (O0_REGNUM), raw_buffer, 8 * 4);
|
|
|
|
|
}
|
|
|
|
|
if (fsr.regs[PS_REGNUM])
|
|
|
|
|
write_register (PS_REGNUM, read_memory_integer (fsr.regs[PS_REGNUM], 4));
|
|
|
|
|
if (fsr.regs[Y_REGNUM])
|
|
|
|
|
write_register (Y_REGNUM, read_memory_integer (fsr.regs[Y_REGNUM], 4));
|
|
|
|
|
if (fsr.regs[PC_REGNUM])
|
|
|
|
|
{
|
|
|
|
|
/* Explicitly specified PC (and maybe NPC) -- just restore them. */
|
|
|
|
|
write_register (PC_REGNUM, read_memory_integer (fsr.regs[PC_REGNUM], 4));
|
|
|
|
|
if (fsr.regs[NPC_REGNUM])
|
|
|
|
|
write_register (NPC_REGNUM,
|
|
|
|
|
read_memory_integer (fsr.regs[NPC_REGNUM], 4));
|
|
|
|
|
}
|
|
|
|
|
else if (fsr.regs[I7_REGNUM])
|
|
|
|
|
{
|
|
|
|
|
/* Return address in %i7 -- adjust it, then restore PC and NPC from it */
|
|
|
|
|
pc = PC_ADJUST (read_memory_integer (fsr.regs[I7_REGNUM], 4));
|
|
|
|
|
write_register (PC_REGNUM, pc);
|
|
|
|
|
write_register (NPC_REGNUM, pc + 4);
|
|
|
|
|
}
|
|
|
|
|
flush_cached_frames ();
|
|
|
|
|
set_current_frame ( create_new_frame (read_register (FP_REGNUM),
|
|
|
|
|
read_pc ()));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Structure of SPARC extended floating point numbers.
|
|
|
|
|
This information is not currently used by GDB, since no current SPARC
|
|
|
|
|
implementations support extended float. */
|
|
|
|
|
|
|
|
|
|
const struct ext_format ext_format_sparc[] = {
|
|
|
|
|
/* tot sbyte smask expbyte manbyte */
|
|
|
|
|
{ 16, 0, 0x80, 0,1, 4,8 }, /* sparc */
|
|
|
|
|
};
|