2001-02-10 01:58:38 +01:00
|
|
|
/* s390.h -- Header file for S390 opcode table
|
2017-01-02 04:36:43 +01:00
|
|
|
Copyright (C) 2000-2017 Free Software Foundation, Inc.
|
2001-02-10 01:58:38 +01:00
|
|
|
Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
|
|
|
|
|
|
|
|
This file is part of BFD, the Binary File Descriptor library.
|
|
|
|
|
|
|
|
This program is free software; you can redistribute it and/or modify
|
|
|
|
it under the terms of the GNU General Public License as published by
|
2010-04-15 12:26:09 +02:00
|
|
|
the Free Software Foundation; either version 3 of the License, or
|
2001-02-10 01:58:38 +01:00
|
|
|
(at your option) any later version.
|
|
|
|
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
GNU General Public License for more details.
|
|
|
|
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
|
|
along with this program; if not, write to the Free Software
|
2005-05-10 12:21:13 +02:00
|
|
|
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
|
|
|
|
02110-1301, USA. */
|
2001-02-10 01:58:38 +01:00
|
|
|
|
|
|
|
#ifndef S390_H
|
|
|
|
#define S390_H
|
|
|
|
|
|
|
|
/* List of instruction sets variations. */
|
|
|
|
|
2003-03-21 14:26:21 +01:00
|
|
|
enum s390_opcode_mode_val
|
2001-02-10 01:58:38 +01:00
|
|
|
{
|
|
|
|
S390_OPCODE_ESA = 0,
|
2003-03-21 14:26:21 +01:00
|
|
|
S390_OPCODE_ZARCH
|
|
|
|
};
|
|
|
|
|
|
|
|
enum s390_opcode_cpu_val
|
|
|
|
{
|
|
|
|
S390_OPCODE_G5 = 0,
|
|
|
|
S390_OPCODE_G6,
|
2003-07-01 16:46:57 +02:00
|
|
|
S390_OPCODE_Z900,
|
2005-08-12 20:02:38 +02:00
|
|
|
S390_OPCODE_Z990,
|
2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
instruction formats added.
(MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
masks added.
* opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
instructions added.
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
(main): z9-ec cpu type option added.
* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z9-ec option added.
2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z9-ec.d: New file.
* gas/s390/zarch-z9-ec.s: New file.
* gas/s390/s390.exp: Run the z9-ec testcases.
2007-03-06 14:19:08 +01:00
|
|
|
S390_OPCODE_Z9_109,
|
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
(s390_cond_extensions): Reduced extensions to the compare related.
(main): z10 cpu type option added.
(expandConditionalJump): Renamed to ...
(insertExpandedMnemonic): ... this.
* opcodes/s390-opc.c: Re-group the operand format makros.
(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
INSTR_SIL_RDU): New instruction formats added.
(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
masks added.
(s390_opformats): New formats added "ris", "rrs", "sil".
* opcodes/s390-opc.txt: Add the conditional jumps with the
extensions removed from automatic expansion in s390-mkopc.c manually.
(asi - trtre): Add new System z10 EC instructions.
* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z10 option added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: New file.
* gas/s390/zarch-z10.s: New file.
* gas/s390/s390.exp: Run the z10 testcases.
2008-03-19 11:29:18 +01:00
|
|
|
S390_OPCODE_Z9_EC,
|
2010-09-27 15:36:48 +02:00
|
|
|
S390_OPCODE_Z10,
|
2010-11-25 10:33:54 +01:00
|
|
|
S390_OPCODE_Z196,
|
2012-10-04 10:47:36 +02:00
|
|
|
S390_OPCODE_ZEC12,
|
2015-01-16 12:19:21 +01:00
|
|
|
S390_OPCODE_Z13,
|
2017-01-02 16:40:29 +01:00
|
|
|
S390_OPCODE_ARCH12,
|
2010-11-25 10:33:54 +01:00
|
|
|
S390_OPCODE_MAXCPU
|
2001-02-10 01:58:38 +01:00
|
|
|
};
|
|
|
|
|
2015-01-16 12:19:21 +01:00
|
|
|
/* Instruction specific flags. */
|
|
|
|
#define S390_INSTR_FLAG_OPTPARM 0x1
|
2017-01-02 16:40:29 +01:00
|
|
|
|
2015-09-29 14:22:07 +02:00
|
|
|
#define S390_INSTR_FLAG_HTM 0x2
|
|
|
|
#define S390_INSTR_FLAG_VX 0x4
|
2017-03-21 14:21:02 +01:00
|
|
|
#define S390_INSTR_FLAG_FACILITY_MASK 0x6
|
2015-01-16 12:19:21 +01:00
|
|
|
|
2001-02-10 01:58:38 +01:00
|
|
|
/* The opcode table is an array of struct s390_opcode. */
|
|
|
|
|
|
|
|
struct s390_opcode
|
|
|
|
{
|
|
|
|
/* The opcode name. */
|
|
|
|
const char * name;
|
|
|
|
|
|
|
|
/* The opcode itself. Those bits which will be filled in with
|
|
|
|
operands are zeroes. */
|
|
|
|
unsigned char opcode[6];
|
|
|
|
|
|
|
|
/* The opcode mask. This is used by the disassembler. This is a
|
|
|
|
mask containing ones indicating those bits which must match the
|
|
|
|
opcode field, and zeroes indicating those bits which need not
|
|
|
|
match (and are presumably filled in by operands). */
|
|
|
|
unsigned char mask[6];
|
|
|
|
|
|
|
|
/* The opcode length in bytes. */
|
|
|
|
int oplen;
|
|
|
|
|
|
|
|
/* An array of operand codes. Each code is an index into the
|
|
|
|
operand table. They appear in the order which the operands must
|
|
|
|
appear in assembly code, and are terminated by a zero. */
|
|
|
|
unsigned char operands[6];
|
|
|
|
|
2003-03-21 14:26:21 +01:00
|
|
|
/* Bitmask of execution modes this opcode is available for. */
|
|
|
|
unsigned int modes;
|
|
|
|
|
|
|
|
/* First cpu this opcode is available for. */
|
|
|
|
enum s390_opcode_cpu_val min_cpu;
|
2015-01-16 12:19:21 +01:00
|
|
|
|
|
|
|
/* Instruction specific flags. */
|
|
|
|
unsigned int flags;
|
2001-02-10 01:58:38 +01:00
|
|
|
};
|
|
|
|
|
|
|
|
/* The table itself is sorted by major opcode number, and is otherwise
|
|
|
|
in the order in which the disassembler should consider
|
|
|
|
instructions. */
|
|
|
|
extern const struct s390_opcode s390_opcodes[];
|
|
|
|
extern const int s390_num_opcodes;
|
|
|
|
|
|
|
|
/* A opcode format table for the .insn pseudo mnemonic. */
|
|
|
|
extern const struct s390_opcode s390_opformats[];
|
|
|
|
extern const int s390_num_opformats;
|
|
|
|
|
2015-01-16 12:19:21 +01:00
|
|
|
/* Values defined for the flags field of a struct s390_opcode. */
|
2001-02-10 01:58:38 +01:00
|
|
|
|
|
|
|
/* The operands table is an array of struct s390_operand. */
|
|
|
|
|
|
|
|
struct s390_operand
|
|
|
|
{
|
|
|
|
/* The number of bits in the operand. */
|
|
|
|
int bits;
|
|
|
|
|
|
|
|
/* How far the operand is left shifted in the instruction. */
|
|
|
|
int shift;
|
|
|
|
|
|
|
|
/* One bit syntax flags. */
|
|
|
|
unsigned long flags;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Elements in the table are retrieved by indexing with values from
|
2015-01-16 12:19:21 +01:00
|
|
|
the operands field of the s390_opcodes table. */
|
2001-02-10 01:58:38 +01:00
|
|
|
|
|
|
|
extern const struct s390_operand s390_operands[];
|
|
|
|
|
|
|
|
/* Values defined for the flags field of a struct s390_operand. */
|
|
|
|
|
|
|
|
/* This operand names a register. The disassembler uses this to print
|
|
|
|
register names with a leading 'r'. */
|
|
|
|
#define S390_OPERAND_GPR 0x1
|
|
|
|
|
|
|
|
/* This operand names a floating point register. The disassembler
|
|
|
|
prints these with a leading 'f'. */
|
|
|
|
#define S390_OPERAND_FPR 0x2
|
|
|
|
|
|
|
|
/* This operand names an access register. The disassembler
|
|
|
|
prints these with a leading 'a'. */
|
|
|
|
#define S390_OPERAND_AR 0x4
|
|
|
|
|
|
|
|
/* This operand names a control register. The disassembler
|
|
|
|
prints these with a leading 'c'. */
|
|
|
|
#define S390_OPERAND_CR 0x8
|
|
|
|
|
|
|
|
/* This operand is a displacement. */
|
|
|
|
#define S390_OPERAND_DISP 0x10
|
|
|
|
|
|
|
|
/* This operand names a base register. */
|
|
|
|
#define S390_OPERAND_BASE 0x20
|
|
|
|
|
|
|
|
/* This operand names an index register, it can be skipped. */
|
|
|
|
#define S390_OPERAND_INDEX 0x40
|
|
|
|
|
|
|
|
/* This operand is a relative branch displacement. The disassembler
|
|
|
|
prints these symbolically if possible. */
|
|
|
|
#define S390_OPERAND_PCREL 0x80
|
|
|
|
|
|
|
|
/* This operand takes signed values. */
|
|
|
|
#define S390_OPERAND_SIGNED 0x100
|
|
|
|
|
|
|
|
/* This operand is a length. */
|
|
|
|
#define S390_OPERAND_LENGTH 0x200
|
|
|
|
|
2005-08-12 20:02:38 +02:00
|
|
|
/* This operand is optional. Only a single operand at the end of
|
|
|
|
the instruction may be optional. */
|
|
|
|
#define S390_OPERAND_OPTIONAL 0x400
|
|
|
|
|
2011-05-24 18:13:31 +02:00
|
|
|
/* The operand needs to be a valid GP or FP register pair. */
|
|
|
|
#define S390_OPERAND_REG_PAIR 0x800
|
2011-05-24 15:33:57 +02:00
|
|
|
|
2015-01-16 12:19:21 +01:00
|
|
|
/* This operand names a vector register. The disassembler uses this
|
|
|
|
to print register names with a leading 'v'. */
|
|
|
|
#define S390_OPERAND_VR 0x1000
|
|
|
|
|
|
|
|
#define S390_OPERAND_CP16 0x2000
|
|
|
|
|
|
|
|
#define S390_OPERAND_OR1 0x4000
|
|
|
|
#define S390_OPERAND_OR2 0x8000
|
|
|
|
#define S390_OPERAND_OR8 0x10000
|
|
|
|
|
|
|
|
#endif /* S390_H */
|