binutils-gdb/bfd/ChangeLog

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PowerPC64 __tls_get_addr_desc This implements register saving and restoring in the __tls_get_addr call stub, so that when glibc supports the optimized tls call stub gcc can generate code that assumes only r0, r12 and of course r3 are changed on a __tls_get_addr call. When gcc expects __tls_get_addr calls to preserve registers the call will be to __tls_get_addr_desc, which will be translated by the linker to a call to __tls_get_addr_opt. bfd/ * elf64-ppc.h (struct ppc64_elf_params): Add no_tls_get_addr_regsave. * elf64-ppc.c (struct ppc_link_hash_table): Add tga_desc and tga_desc_fd. (is_tls_get_addr): Match tga_desc and tga_desc_df too. (STDU_R1_0R1, ADDI_R1_R1): Define. (tls_get_addr_prologue, tls_get_addr_epilogue): New functions. (ppc64_elf_tls_setup): Set up tga_desc and tga_desc_fd. Indirect tga_desc_fd to opt_fd, and tga_desc to opt. Set no_tls_get_addr_regsave. (branch_reloc_hash_match): Add hash3 and hash4. (ppc64_elf_tls_optimize): Handle tga_desc_fd and tga_desc too. (ppc64_elf_size_dynamic_sections): Likewise. (ppc64_elf_relocate_section): Likewise. (plt_stub_size, build_plt_stub): Likewise. Size regsave __tls_get_addr stub. (build_tls_get_addr_stub): Build regsave __tls_get_addr stub and eh_frame. (ppc_size_one_stub): Handle tga_desc_fd and tga_desc too. Size eh_frame for regsave __tls_get_addr. gas/ * config/tc-ppc.c (parse_tls_arg): Handle tls arg for __tls_get_addr_desc and __tls_get_addr_opt. ld/ * emultempl/ppc64elf.em (ppc64_opt, PARSE_AND_LIST_LONGOPTS), (PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Support --tls-get-addr-regsave and --no-tls-get-addr-regsave. (params): Init new field. * ld.texi (--tls-get-addr-regsave, --no-tls-get-addr-regsave): Document. * testsuite/ld-powerpc/tlsdesc.s, * testsuite/ld-powerpc/tlsdesc.d, * testsuite/ld-powerpc/tlsdesc.wf, * testsuite/ld-powerpc/tlsdesc2.d, * testsuite/ld-powerpc/tlsdesc2.wf, * testsuite/ld-powerpc/tlsexenors.d, * testsuite/ld-powerpc/tlsexenors.r, * testsuite/ld-powerpc/tlsexers.d, * testsuite/ld-powerpc/tlsexers.r, * testsuite/ld-powerpc/tlsexetocnors.d, * testsuite/ld-powerpc/tlsexetocrs.d, * testsuite/ld-powerpc/tlsexetocrs.r, * testsuite/ld-powerpc/tlsopt6.d, * testsuite/ld-powerpc/tlsopt6.wf: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests.
2020-01-20 03:08:00 +01:00
2020-01-22 Alan Modra <amodra@gmail.com>
* elf64-ppc.h (struct ppc64_elf_params): Add no_tls_get_addr_regsave.
* elf64-ppc.c (struct ppc_link_hash_table): Add tga_desc and
tga_desc_fd.
(is_tls_get_addr): Match tga_desc and tga_desc_df too.
(STDU_R1_0R1, ADDI_R1_R1): Define.
(tls_get_addr_prologue, tls_get_addr_epilogue): New functions.
(ppc64_elf_tls_setup): Set up tga_desc and tga_desc_fd. Indirect
tga_desc_fd to opt_fd, and tga_desc to opt. Set
no_tls_get_addr_regsave.
(branch_reloc_hash_match): Add hash3 and hash4.
(ppc64_elf_tls_optimize): Handle tga_desc_fd and tga_desc too.
(ppc64_elf_size_dynamic_sections): Likewise.
(ppc64_elf_relocate_section): Likewise.
(plt_stub_size, build_plt_stub): Likewise. Size regsave
__tls_get_addr stub.
(build_tls_get_addr_stub): Build regsave __tls_get_addr stub and
eh_frame.
(ppc_size_one_stub): Handle tga_desc_fd and tga_desc too. Size
eh_frame for regsave __tls_get_addr.
2020-01-22 Alan Modra <amodra@gmail.com>
* elf64-ppc.c (ppc64_elf_size_stubs): Correct condition under
which __tls_get_addr calls will be eliminated.
2020-01-20 Nick Clifton <nickc@redhat.com>
* po/pt.po: Updates Portuguese translation.
* po/ru.po: Updated Russian translation.
* po/uk.po: Updated Ukranian translation.
x86-64: Fix TLSDESC relaxation for x32 For x32, we must encode "lea x@TLSDESC(%rip), %reg" with a REX prefix even if it isn't required. Otherwise linker can’t safely perform GDesc -> IE/LE optimization. X32 TLSDESC sequences can be: 40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg ... 67 ff 10 call *x@TLSCALL(%eax) or the same sequence as LP64: 48 8d 05 00 00 00 00 lea foo@TLSDESC(%rip), %reg ... ff 10 call *foo@TLSCALL(%rax) We need to support both sequences for x32. For both GDesc -> IE/LE transitions, 67 ff 10 call *x@TLSCALL(%eax) should relaxed to 0f 1f 00 nopl (%rax) For GDesc -> LE transition, 40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg should relaxed to 40 c7 c0 fc ff ff ff rex movl $x@tpoff, %reg For GDesc -> IE transition, 40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg should relaxed to 40 8b 05 00 00 00 00 rex movl x@gottpoff(%rip), %eax bfd/ PR ld/25416 * elf64-x86-64.c (elf_x86_64_check_tls_transition): Support "rex leal x@tlsdesc(%rip), %reg" and "call *x@tlsdesc(%eax)" in X32 mode. (elf_x86_64_relocate_section): In x32 mode, for GDesc -> LE transition, relax "rex leal x@tlsdesc(%rip), %reg" to "rex movl $x@tpoff, %reg", for GDesc -> IE transition, relax "rex leal x@tlsdesc(%rip), %reg" to "rex movl x@gottpoff(%rip), %eax". For both transitions, relax "call *(%eax)" to "nopl (%rax)". gas/ PR ld/25416 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating x32 object. * testsuite/gas/i386/ilp32/x32-tls.d: Updated. * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with R_X86_64_GOTPC32_TLSDESC relocation. ld/ PR ld/25416 * testsuite/ld-x86-64/pr25416-1.s: New file * testsuite/ld-x86-64/pr25416-1a.d: Likewise. * testsuite/ld-x86-64/pr25416-1b.d: Likewise. * testsuite/ld-x86-64/pr25416-1.s: Likewise. * testsuite/ld-x86-64/pr25416-2.s: Likewise. * testsuite/ld-x86-64/pr25416-2a.d: Likewise. * testsuite/ld-x86-64/pr25416-2b.d: Likewise. * testsuite/ld-x86-64/pr25416-3.d: Likewise. * testsuite/ld-x86-64/pr25416-3.s: Likewise. * testsuite/ld-x86-64/pr25416-4.d: Likewise. * testsuite/ld-x86-64/pr25416-4.s: Likewise. * testsuite/ld-x86-64/pr25416-5a.c: Likewise. * testsuite/ld-x86-64/pr25416-5b.s: Likewise. * testsuite/ld-x86-64/pr25416-5c.s: Likewise. * testsuite/ld-x86-64/pr25416-5d.s: Likewise. * testsuite/ld-x86-64/pr25416-5e.s: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run PR ld/25416 tests.
2020-01-20 15:58:51 +01:00
2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
PR ld/25416
* elf64-x86-64.c (elf_x86_64_check_tls_transition): Support
"rex leal x@tlsdesc(%rip), %reg" and "call *x@tlsdesc(%eax)" in
X32 mode.
(elf_x86_64_relocate_section): In x32 mode, for GDesc -> LE
transition, relax "rex leal x@tlsdesc(%rip), %reg" to
"rex movl $x@tpoff, %reg", for GDesc -> IE transition, relax
"rex leal x@tlsdesc(%rip), %reg" to
"rex movl x@gottpoff(%rip), %eax". For both transitions, relax
"call *(%eax)" to "nopl (%rax)".
2020-01-20 Alan Modra <amodra@gmail.com>
* elf64-ppc.c (LD_R11_0R3, CMPDI_R11_0, STD_R11_0R1, LD_R11_0R1),
(MTLR_R11): Don't define.
(LD_R0_0R3, CMPDI_R0_0): Define.
(build_tls_get_addr_stub): Don't use r11 in stub.
2020-01-20 Alan Modra <amodra@gmail.com>
* elf64-ppc.c (ppc_elf_hash_entry): New function, use throughout file.
(defined_sym_val, is_tls_get_addr): Likewise.
2020-01-18 Nick Clifton <nickc@redhat.com>
* version.m4 (BFD_VERSION): Set to 2.34.50.
* configure: Regenerate.
* po/bfd.pot: Regenerate.
2020-01-18 Nick Clifton <nickc@redhat.com>
Binutils 2.34 branch created.
2020-01-17 Christian Biesinger <cbiesinger@google.com>
* coff-arm.c: Fix spelling error (seperate).
* elfxx-riscv.c (riscv_parse_sv_or_non_std_ext): Fix spelling
error (seperate).
* sysdep.h (strnlen): Fix spelling error (seperate).
2020-01-15 Lars Brinkhoff <lars@nocrew.org>
PR 20694
* pdp11.c (TARGET_PAGE_SIZE): Set to 8192.
2020-01-15 Alan Modra <amodra@gmail.com>
PR 25384
* elf64-ppc.c (ELIMINATE_COPY_RELOCS): Update comment.
(ppc64_elf_adjust_dynamic_symbol): Don't allow .dynbss copies
of function symbols unless dot symbols are present. Do warn
whenever one is created, regardles of whether a PLT entry is
also emitted for the function symbol.
2020-01-14 Alan Modra <amodra@gmail.com>
* som.c (som_bfd_count_ar_symbols): Error when file position
of symbols on chains is not strictly increasing.
2020-01-14 Alan Modra <amodra@gmail.com>
* vms.h (VMS_DEBUG): Define as 0.
* vms-alpha.c (image_write): Move debug output after bounds check.
Tidy bounds check.
(_bfd_vms_slurp_eihd): Warning fix.
(_bfd_vms_slurp_etir): Init variables to avoid bogus warnings.
2020-01-13 Alan Modra <amodra@gmail.com>
* vms-alpha.c (_bfd_vms_slurp_egsd): Ensure minimum size even
for "ignored" records.
2020-01-13 Alan Modra <amodra@gmail.com>
* wasm-module.c (wasm_scan_name_function_section): Formatting.
Delete asect name check. Move asect NULL check to wasm_object_p.
Correct bounds check of sizes against end. Replace uses of
bfd_zalloc with bfd_alloc, zeroing only necessary bytes. Use
just one bfd_release.
(wasm_scan): Don't use malloc/strdup for section names,
bfd_alloc instead. Simplify code prefixing section name.
Formatting. Don't attempt to free memory here..
(wasm_object_p): ..do so here.
2020-01-10 Szabolcs Nagy <szabolcs.nagy@arm.com>
PR ld/22269
* elf32-arm.c (elf32_arm_final_link_relocate): Use
UNDEFWEAK_NO_DYNAMIC_RELOC.
(allocate_dynrelocs_for_symbol): Likewise.
2020-01-10 Tamar Christina <tamar.christina@arm.com>
PR 25210
* elfnn-aarch64.c (_bfd_aarch64_create_stub_section): Remove elfclass.
2020-01-10 Alan Modra <amodra@gmail.com>
* coff-alpha.c (alpha_ecoff_object_p): Calculate size in bfd_size_type.
2020-01-09 Nick Clifton <nickc@redhat.com>
PR 25221
* bfd.c (bfd_convert_section_contents): Check for a compress
header size that is larger than the actual section size.
2020-01-08 Alan Modra <amodra@gmail.com>
PR 25351
* elflink.c (bfd_elf_final_link): Call _bfd_fix_excluded_sec_syms
after removing sections.
2020-01-06 Jim Wilson <jimw@sifive.com>
PR 25205
* elfnn-riscv.c (riscv_elf_relocate_section) <R_RISCV_CALL>: Add
check for !bfd_link_pic (info).
<R_RISCV_CALL_PLT>: Move next to R_RISCV_CALL.
<R_RISCV_JAL>: Add comment.
(_bfd_riscv_relax_section): For plt.offset check, add check for
bfd_link_pic (info). Add comment.
2020-01-06 Alan Modra <amodra@gmail.com>
* format.c (bfd_check_format_matches): Ignore bfd_error on target
match failures. Don't init to bfd_error_wrong_format before
calling _bfd_check_format.
2020-01-06 Alan Modra <amodra@gmail.com>
* vms-alpha.c (_bfd_vms_push, _bfd_vms_pop): Return pass/fail
status rather than exiting on stack overflow or underflow.
(_bfd_vms_slurp_etir): Adjust to suit.
2020-01-06 Alan Modra <amodra@gmail.com>
* som.c (som_bfd_fill_in_ar_symbols): Bounds check som_dict index.
2020-01-06 Alan Modra <amodra@gmail.com>
* mach-o.c (bfd_mach_o_read_dylinker): Don't read past end of
command. Check name offset is within command.
(bfd_mach_o_read_dylib, bfd_mach_o_read_prebound_dylib),
(bfd_mach_o_read_prebind_cksum, bfd_mach_o_read_twolevel_hints),
(bfd_mach_o_read_fvmlib, bfd_mach_o_read_dysymtab),
(bfd_mach_o_read_symtab, bfd_mach_o_read_uuid),
(bfd_mach_o_read_linkedit, bfd_mach_o_read_str),
(bfd_mach_o_read_dyld_info, bfd_mach_o_read_version_min),
(bfd_mach_o_read_encryption_info, bfd_mach_o_read_source_version),
(bfd_mach_o_read_encryption_info_64, bfd_mach_o_read_main),
(bfd_mach_o_read_note, bfd_mach_o_read_build_version),
(bfd_mach_o_read_segment): Similarly.
(bfd_mach_o_read_thread): Properly bound check thread struct.
Don't repeat checks on second loop.
(bfd_mach_o_read_command): Fail on invalid command length.
2020-01-04 Alan Modra <amodra@gmail.com>
* format.c (bfd_check_format_matches): Add preserve_match.
Save initial bfd state in "preserve", matched bfd state in
"preserve_match". Save just the first match. Release
bfd_alloc memory. Restore and finish preserved state as
appropriate on all function exit paths.
2020-01-04 Alan Modra <amodra@gmail.com>
* mmo.c (mmo_mkobject): Allocate tdata with bfd_zalloc.
2020-01-04 Alan Modra <amodra@gmail.com>
* coffgen.c (coff_real_object_p): Free malloc'd memory on target
match too.
2020-01-03 Nick Clifton <nickc@redhat.com>
PR 25307
(bfd_pef_parse_function_stubs): Correct the test that ensures that
there is enough data remaining in the code buffer before
attempting to read a function stub.
2020-01-03 Nick Clifton <nickc@redhat.com>
PR 25308
* elf-properties.c (_bfd_elf_convert_gnu_properties): Check the
return value from bfd_malloc.
* elf32-arm.c (bfd_elf32_arm_vfp11_fix_veneer_locations): Likewise.
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Likewise.
(elf32_arm_filter_cmse_symbols): Likewise.
(elf32_arm_write_section): Likewise.
* mach-o.c (bfd_mach_o_core_fetch_environment): Likewise.
(bfd_mach_o_follow_dsym): Likewise.
* pef.c (bfd_pef_print_loader_section): Likewise.
(bfd_pef_scan_start_address): Likewise.
(bfd_pef_parse_function_stubs): Likewise.
(bfd_pef_parse_symbols): Likewise.
2020-01-03 Sergei Trofimovich <siarheit@google.com>
* elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): don't fail
on binary inputs ld/PR25316.
(is_ia64_elf): new helper to filter on ia64 objects.
2020-01-03 Jan Beulich <jbeulich@suse.com>
* mach-o.c (cpusubtype, bfd_mach_o_header_p): Insert underscore
in parameter names.
(bfd_mach_o_scan): Insert underscore in two variable names.
Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. Add an ELF based target for these as well. PR 25224 bfd * Makefile.am: Add z80-elf target support. * configure.ac: Likewise. * targets.c: Likewise. * config.bfd: Add z80-elf target support and new arches: ez80 and z180. * elf32-z80.c: New file. * archures.c: Add new z80 architectures: eZ80 and Z180. * coffcode.h: Likewise. * cpu-z80.c: Likewise. * bfd-in2.h: Likewise plus additional Z80 relocations. * coff-z80.c: Add new relocations for Z80 target and local label check. gas * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add support for assembler code generated by SDCC. Add new relocation types. Add z80-elf target support. * config/tc-z80.h: Add z80-elf target support. Enable dollar local labels. Local labels starts from ".L". * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict. * testsuite/gas/all/fwdexp.s: Likewise. * testsuite/gas/z80/suffix.d: Fix failure on ELF target. * testsuite/gas/z80/z80.exp: Add new tests * testsuite/gas/z80/dollar.d: New file. * testsuite/gas/z80/dollar.s: New file. * testsuite/gas/z80/ez80_adl_all.d: New file. * testsuite/gas/z80/ez80_adl_all.s: New file. * testsuite/gas/z80/ez80_adl_suf.d: New file. * testsuite/gas/z80/ez80_isuf.s: New file. * testsuite/gas/z80/ez80_z80_all.d: New file. * testsuite/gas/z80/ez80_z80_all.s: New file. * testsuite/gas/z80/ez80_z80_suf.d: New file. * testsuite/gas/z80/r800_extra.d: New file. * testsuite/gas/z80/r800_extra.s: New file. * testsuite/gas/z80/r800_ii8.d: New file. * testsuite/gas/z80/r800_z80_doc.d: New file. * testsuite/gas/z80/z180.d: New file. * testsuite/gas/z80/z180.s: New file. * testsuite/gas/z80/z180_z80_doc.d: New file. * testsuite/gas/z80/z80_doc.d: New file. * testsuite/gas/z80/z80_doc.s: New file. * testsuite/gas/z80/z80_ii8.d: New file. * testsuite/gas/z80/z80_ii8.s: New file. * testsuite/gas/z80/z80_in_f_c.d: New file. * testsuite/gas/z80/z80_in_f_c.s: New file. * testsuite/gas/z80/z80_op_ii_ld.d: New file. * testsuite/gas/z80/z80_op_ii_ld.s: New file. * testsuite/gas/z80/z80_out_c_0.d: New file. * testsuite/gas/z80/z80_out_c_0.s: New file. * testsuite/gas/z80/z80_reloc.d: New file. * testsuite/gas/z80/z80_reloc.s: New file. * testsuite/gas/z80/z80_sli.d: New file. * testsuite/gas/z80/z80_sli.s: New file. ld * Makefile.am: Add new target z80-elf * configure.tgt: Likewise. * emultempl/z80.em: Add support for eZ80 and Z180 architectures. * emulparams/elf32z80.sh: New file. * emultempl/z80elf.em: Likewise. * testsuite/ld-z80/arch_ez80_adl.d: Likewise. * testsuite/ld-z80/arch_ez80_z80.d: Likewise. * testsuite/ld-z80/arch_r800.d: Likewise. * testsuite/ld-z80/arch_z180.d: Likewise. * testsuite/ld-z80/arch_z80.d: Likewise. * testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise. * testsuite/ld-z80/comb_arch_z180.d: Likewise. * testsuite/ld-z80/labels.s: Likewise. * testsuite/ld-z80/relocs.s: Likewise. * testsuite/ld-z80/relocs_b_ez80.d: Likewise. * testsuite/ld-z80/relocs_b_z80.d: Likewise. * testsuite/ld-z80/relocs_f_z80.d: Likewise. * testsuite/ld-z80/z80.exp: Likewise. opcodes * z80-dis.c: Add support for eZ80 and Z80 instructions.
2020-01-02 15:10:40 +01:00
2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
* Makefile.am: Add z80-elf target support.
* configure.ac: Likewise.
* targets.c: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* config.bfd: Add z80-elf target support and new arches: ez80 and
z180.
* elf32-z80.c: New file.
* archures.c: Add new z80 architectures: eZ80 and Z180.
* coffcode.h: Likewise.
* cpu-z80.c: Likewise.
* coff-z80.c: Add new relocations for Z80 target and local label
check.
* reloc.c: Add new relocs.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
2020-01-02 Tamar Christina <tamar.christina@arm.com>
PR 25210
PR 24753
* elfnn-aarch64.c (_bfd_aarch64_create_stub_section): Set ELF class.
2020-01-01 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
2020-01-01 08:37:11 +01:00
For older changes see ChangeLog-2019
2020-01-01 08:37:11 +01:00
Copyright (C) 2020 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
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