bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
|
|
|
/* Adapteva epiphany specific support for 32-bit ELF
|
2015-01-01 15:15:26 +01:00
|
|
|
Copyright (C) 2000-2015 Free Software Foundation, Inc.
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
|
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Contributed by Embecosm on behalf of Adapteva, Inc.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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#include "elf-bfd.h"
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#include "elf/epiphany.h"
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#include "libiberty.h"
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/* Struct used to pass miscellaneous paramaters which
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helps to avoid overly long parameter lists. */
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struct misc
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{
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Elf_Internal_Shdr * symtab_hdr;
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Elf_Internal_Rela * irelbase;
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bfd_byte * contents;
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Elf_Internal_Sym * isymbuf;
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};
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struct epiphany_opcode
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{
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unsigned short opcode;
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unsigned short mask;
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};
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static bfd_boolean epiphany_relaxed = FALSE;
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/* Relocation tables. */
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static reloc_howto_type epiphany_elf_howto_table [] =
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{
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#define AHOW(t,rs,s,bs,pr,bp,co,name,sm,dm) \
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HOWTO(t, /* type */ \
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rs, /* rightshift */ \
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s, /* size (0 = byte, 1 = short, 2 = long) */ \
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bs, /* bitsize */ \
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pr, /* pc_relative */ \
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bp, /* bitpos */ \
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co, /* complain_on_overflow */ \
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bfd_elf_generic_reloc,/* special_function */ \
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name, /* name */ \
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FALSE, /* partial_inplace */ \
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sm, /* src_mask */ \
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dm, /* dst_mask */ \
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pr) /* pcrel_offset */
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/* This reloc does nothing. */
|
2015-01-19 01:06:26 +01:00
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AHOW (R_EPIPHANY_NONE, 0, 3,0, FALSE, 0, complain_overflow_dont, "R_EPIPHANY_NONE", 0, 0),
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bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
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/* 8 bit absolute (not likely) */
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AHOW (R_EPIPHANY_8, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, "R_EPIPHANY_8", 0x000000ff, 0x000000ff),
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/* 16 bit absolute */
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AHOW (R_EPIPHANY_16, 0, 1,16, FALSE, 0, complain_overflow_bitfield, "R_EPIPHANY_16", 0x0000ffff, 0x00ff1fe0),
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/* A 32 bit absolute relocation. */
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AHOW (R_EPIPHANY_32, 0, 2,32, FALSE, 0, complain_overflow_dont, "R_EPIPHANY_32", 0xffffffff, 0xffffffff),
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/* 8 bit relative relocation */
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HOWTO ( R_EPIPHANY_8_PCREL, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_EPIPHANY_8_PCREL", FALSE, 0x000000ff, 0x000000ff, FALSE),
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/* 16 bit relative relocation */
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HOWTO ( R_EPIPHANY_16_PCREL, 0, 1, 16, TRUE, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_EPIPHANY_8_PCREL", FALSE, 0x000000ff, 0x000000ff, FALSE),
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/* 32 bit relative relocation */
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HOWTO ( R_EPIPHANY_32_PCREL, 0, 2, 32, TRUE, 0, complain_overflow_bitfield, bfd_elf_generic_reloc, "R_EPIPHANY_8_PCREL", FALSE, 0x000000ff, 0x000000ff, FALSE),
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/* 8 bit pc-relative relocation */
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AHOW (R_EPIPHANY_SIMM8, 1, 0, 8, TRUE, 8, complain_overflow_signed, "R_EPIPHANY_SIMM8", 0x000000ff, 0x0000ff00),
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/* 24 bit pc-relative relocation */
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AHOW (R_EPIPHANY_SIMM24, 1, 2,24, TRUE, 8, complain_overflow_signed, "R_EPIPHANY_SIMM24", 0x00ffffff, 0xffffff00),
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/* %HIGH(EA) */
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AHOW (R_EPIPHANY_HIGH, 0, 2,16, FALSE, 0, complain_overflow_dont, "R_EPIPHANY_HIGH", 0x0ff01fe0, 0x0ff01fe0),
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/* %LOW(EA) */
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AHOW (R_EPIPHANY_LOW, 0, 2,16, FALSE, 0, complain_overflow_dont, "R_EPIPHANY_LOW", 0x0ff01fe0, 0x0ff01fe0),
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/* simm11 */
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AHOW (R_EPIPHANY_SIMM11, 0, 2,11, FALSE, 0, complain_overflow_bitfield, "R_EPIPHANY_SIMM11", 0x00ff0380, 0x00ff0380),
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/* imm12 - sign-magnitude */
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AHOW (R_EPIPHANY_IMM11, 0, 2,11, FALSE, 0, complain_overflow_bitfield, "R_EPIPHANY_IMM12", 0x00ff0380, 0x00ff0380),
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/* imm8 */
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AHOW (R_EPIPHANY_IMM8, 0, 1, 8, FALSE, 8, complain_overflow_signed, "R_EPIPHANY_IMM8", 0x0000ff00, 0x0000ff00)
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};
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#undef AHOW
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/* Map BFD reloc types to EPIPHANY ELF reloc types. */
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static reloc_howto_type *
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epiphany_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
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bfd_reloc_code_real_type code)
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{
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/* Note that the epiphany_elf_howto_table is indxed by the R_
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constants. Thus, the order that the howto records appear in the
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table *must* match the order of the relocation types defined in
|
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include/elf/epiphany.h. */
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switch (code)
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{
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case BFD_RELOC_NONE:
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return &epiphany_elf_howto_table[ (int) R_EPIPHANY_NONE];
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case BFD_RELOC_EPIPHANY_SIMM8:
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return &epiphany_elf_howto_table[ (int) R_EPIPHANY_SIMM8];
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case BFD_RELOC_EPIPHANY_SIMM24:
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return &epiphany_elf_howto_table[ (int) R_EPIPHANY_SIMM24];
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case BFD_RELOC_8_PCREL:
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return &epiphany_elf_howto_table[ (int) R_EPIPHANY_8_PCREL];
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case BFD_RELOC_16_PCREL:
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return &epiphany_elf_howto_table[ (int) R_EPIPHANY_16_PCREL];
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case BFD_RELOC_32_PCREL:
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return &epiphany_elf_howto_table[ (int) R_EPIPHANY_32_PCREL];
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case BFD_RELOC_8:
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return &epiphany_elf_howto_table[ (int) R_EPIPHANY_8];
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case BFD_RELOC_16:
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return &epiphany_elf_howto_table[ (int) R_EPIPHANY_16];
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case BFD_RELOC_32:
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return &epiphany_elf_howto_table[ (int) R_EPIPHANY_32];
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case BFD_RELOC_EPIPHANY_HIGH:
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return & epiphany_elf_howto_table[ (int) R_EPIPHANY_HIGH];
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case BFD_RELOC_EPIPHANY_LOW:
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return & epiphany_elf_howto_table[ (int) R_EPIPHANY_LOW];
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|
|
case BFD_RELOC_EPIPHANY_SIMM11:
|
|
|
|
return & epiphany_elf_howto_table[ (int) R_EPIPHANY_SIMM11];
|
|
|
|
case BFD_RELOC_EPIPHANY_IMM11:
|
|
|
|
return & epiphany_elf_howto_table[ (int) R_EPIPHANY_IMM11];
|
|
|
|
|
|
|
|
case BFD_RELOC_EPIPHANY_IMM8:
|
|
|
|
return & epiphany_elf_howto_table[ (int) R_EPIPHANY_IMM8];
|
|
|
|
|
|
|
|
default:
|
|
|
|
/* Pacify gcc -Wall. */
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static reloc_howto_type *
|
|
|
|
epiphany_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE (epiphany_elf_howto_table); i++)
|
|
|
|
if (epiphany_elf_howto_table[i].name != NULL
|
|
|
|
&& strcasecmp (epiphany_elf_howto_table[i].name, r_name) == 0)
|
|
|
|
return &epiphany_elf_howto_table[i];
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define PAGENO(ABSADDR) ((ABSADDR) & 0xFFFFC000)
|
|
|
|
#define BASEADDR(SEC) ((SEC)->output_section->vma + (SEC)->output_offset)
|
|
|
|
|
|
|
|
/* This function handles relaxing for the epiphany.
|
|
|
|
Dummy placeholder for future optimizations. */
|
|
|
|
|
|
|
|
static bfd_boolean
|
|
|
|
epiphany_elf_relax_section (bfd *abfd, asection *sec,
|
|
|
|
struct bfd_link_info *link_info,
|
|
|
|
bfd_boolean *again)
|
|
|
|
{
|
|
|
|
Elf_Internal_Shdr *symtab_hdr;
|
|
|
|
Elf_Internal_Rela *internal_relocs;
|
|
|
|
bfd_byte *contents = NULL;
|
|
|
|
Elf_Internal_Sym *isymbuf = NULL;
|
|
|
|
static asection * first_section = NULL;
|
|
|
|
static unsigned long search_addr;
|
|
|
|
static unsigned long page_start = 0;
|
|
|
|
static unsigned long page_end = 0;
|
|
|
|
static unsigned int pass = 0;
|
|
|
|
static bfd_boolean new_pass = FALSE;
|
|
|
|
static bfd_boolean changed = FALSE;
|
|
|
|
struct misc misc ATTRIBUTE_UNUSED;
|
|
|
|
asection *stab;
|
|
|
|
|
|
|
|
/* Assume nothing changes. */
|
|
|
|
*again = FALSE;
|
|
|
|
|
|
|
|
if (first_section == NULL)
|
|
|
|
{
|
|
|
|
epiphany_relaxed = TRUE;
|
|
|
|
first_section = sec;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (first_section == sec)
|
|
|
|
{
|
|
|
|
pass++;
|
|
|
|
new_pass = TRUE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We don't have to do anything for a relocatable link,
|
|
|
|
if this section does not have relocs, or if this is
|
|
|
|
not a code section. */
|
Add output_type to bfd_link_info
The "shared" field in bfd_link_info is set for both DSO and and PIE.
There are separate fields for executable and relocatable outputs. This
patch adds an "output_type" field:
enum output_type
{
type_unknown = 0,
type_executable,
type_dll,
type_relocatable
};
and a "pic" field to bfd_link_info to replace shared, executable and
relocatable fields so that we can use the "output_type" field to check
for output type and the "pic" field check if output is PIC. Macros,
bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic
and bfd_link_pie, are provided to check for output features.
bfd/
* bfd/aoutx.h: Replace shared, executable, relocatable and pie
fields with bfd_link_executable, bfd_link_dll,
bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
* bfd/bout.c: Likewise.
* bfd/coff-alpha.c: Likewise.
* bfd/coff-arm.c: Likewise.
* bfd/coff-i386.c: Likewise.
* bfd/coff-i960.c: Likewise.
* bfd/coff-m68k.c: Likewise.
* bfd/coff-mcore.c: Likewise.
* bfd/coff-mips.c: Likewise.
* bfd/coff-ppc.c: Likewise.
* bfd/coff-rs6000.c: Likewise.
* bfd/coff-sh.c: Likewise.
* bfd/coff-tic80.c: Likewise.
* bfd/coff-x86_64.c: Likewise.
* bfd/coff64-rs6000.c: Likewise.
* bfd/coffgen.c: Likewise.
* bfd/cofflink.c: Likewise.
* bfd/ecoff.c: Likewise.
* bfd/ecofflink.c: Likewise.
* bfd/elf-bfd.h: Likewise.
* bfd/elf-eh-frame.c: Likewise.
* bfd/elf-ifunc.c: Likewise.
* bfd/elf-m10200.c: Likewise.
* bfd/elf-m10300.c: Likewise.
* bfd/elf-s390-common.c: Likewise.
* bfd/elf-vxworks.c: Likewise.
* bfd/elf.c: Likewise.
* bfd/elf32-arm.c: Likewise.
* bfd/elf32-avr.c: Likewise.
* bfd/elf32-bfin.c: Likewise.
* bfd/elf32-cr16.c: Likewise.
* bfd/elf32-cr16c.c: Likewise.
* bfd/elf32-cris.c: Likewise.
* bfd/elf32-crx.c: Likewise.
* bfd/elf32-d10v.c: Likewise.
* bfd/elf32-dlx.c: Likewise.
* bfd/elf32-epiphany.c: Likewise.
* bfd/elf32-fr30.c: Likewise.
* bfd/elf32-frv.c: Likewise.
* bfd/elf32-ft32.c: Likewise.
* bfd/elf32-h8300.c: Likewise.
* bfd/elf32-hppa.c: Likewise.
* bfd/elf32-i370.c: Likewise.
* bfd/elf32-i386.c: Likewise.
* bfd/elf32-i860.c: Likewise.
* bfd/elf32-ip2k.c: Likewise.
* bfd/elf32-iq2000.c: Likewise.
* bfd/elf32-lm32.c: Likewise.
* bfd/elf32-m32c.c: Likewise.
* bfd/elf32-m32r.c: Likewise.
* bfd/elf32-m68hc11.c: Likewise.
* bfd/elf32-m68hc1x.c: Likewise.
* bfd/elf32-m68k.c: Likewise.
* bfd/elf32-mcore.c: Likewise.
* bfd/elf32-mep.c: Likewise.
* bfd/elf32-metag.c: Likewise.
* bfd/elf32-microblaze.c: Likewise.
* bfd/elf32-moxie.c: Likewise.
* bfd/elf32-msp430.c: Likewise.
* bfd/elf32-mt.c: Likewise.
* bfd/elf32-nds32.c: Likewise.
* bfd/elf32-nios2.c: Likewise.
* bfd/elf32-or1k.c: Likewise.
* bfd/elf32-ppc.c: Likewise.
* bfd/elf32-rl78.c: Likewise.
* bfd/elf32-rx.c: Likewise.
* bfd/elf32-s390.c: Likewise.
* bfd/elf32-score.c: Likewise.
* bfd/elf32-score7.c: Likewise.
* bfd/elf32-sh-symbian.c: Likewise.
* bfd/elf32-sh.c: Likewise.
* bfd/elf32-sh64.c: Likewise.
* bfd/elf32-spu.c: Likewise.
* bfd/elf32-tic6x.c: Likewise.
* bfd/elf32-tilepro.c: Likewise.
* bfd/elf32-v850.c: Likewise.
* bfd/elf32-vax.c: Likewise.
* bfd/elf32-visium.c: Likewise.
* bfd/elf32-xc16x.c: Likewise.
* bfd/elf32-xstormy16.c: Likewise.
* bfd/elf32-xtensa.c: Likewise.
* bfd/elf64-alpha.c: Likewise.
* bfd/elf64-hppa.c: Likewise.
* bfd/elf64-ia64-vms.c: Likewise.
* bfd/elf64-mmix.c: Likewise.
* bfd/elf64-ppc.c: Likewise.
* bfd/elf64-s390.c: Likewise.
* bfd/elf64-sh64.c: Likewise.
* bfd/elf64-x86-64.c: Likewise.
* bfd/elflink.c: Likewise.
* bfd/elfnn-aarch64.c: Likewise.
* bfd/elfnn-ia64.c: Likewise.
* bfd/elfxx-mips.c: Likewise.
* bfd/elfxx-sparc.c: Likewise.
* bfd/elfxx-tilegx.c: Likewise.
* bfd/i386linux.c: Likewise.
* bfd/linker.c: Likewise.
* bfd/m68klinux.c: Likewise.
* bfd/pdp11.c: Likewise.
* bfd/pe-mips.c: Likewise.
* bfd/peXXigen.c: Likewise.
* bfd/reloc.c: Likewise.
* bfd/reloc16.c: Likewise.
* bfd/sparclinux.c: Likewise.
* bfd/sunos.c: Likewise.
* bfd/vms-alpha.c: Likewise.
* bfd/xcofflink.c: Likewise.
include/
* include/bfdlink.h (output_type): New enum.
(bfd_link_executable): New macro.
(bfd_link_dll): Likewise.
(bfd_link_relocatable): Likewise.
(bfd_link_pic): Likewise.
(bfd_link_pie): Likewise.
(bfd_link_info): Remove shared, executable, pie and relocatable.
Add output_type and pic.
ld/
* ld/ldctor.c: Replace shared, executable, relocatable and pie
fields with bfd_link_executable, bfd_link_dll,
bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
* ld/ldemul.c: Likewise.
* ld/ldfile.c: Likewise.
* ld/ldlang.c: Likewise.
* ld/ldmain.c: Likewise.
* ld/ldwrite.c: Likewise.
* ld/lexsup.c: Likewise.
* ld/pe-dll.c: Likewise.
* ld/plugin.c: Likewise.
* ld/emultempl/aarch64elf.em: Likewise.
* ld/emultempl/aix.em: Likewise.
* ld/emultempl/alphaelf.em: Likewise.
* ld/emultempl/armcoff.em: Likewise.
* ld/emultempl/armelf.em: Likewise.
* ld/emultempl/avrelf.em: Likewise.
* ld/emultempl/beos.em: Likewise.
* ld/emultempl/cr16elf.em: Likewise.
* ld/emultempl/elf-generic.em: Likewise.
* ld/emultempl/elf32.em: Likewise.
* ld/emultempl/genelf.em: Likewise.
* ld/emultempl/generic.em: Likewise.
* ld/emultempl/gld960.em: Likewise.
* ld/emultempl/gld960c.em: Likewise.
* ld/emultempl/hppaelf.em: Likewise.
* ld/emultempl/irix.em: Likewise.
* ld/emultempl/linux.em: Likewise.
* ld/emultempl/lnk960.em: Likewise.
* ld/emultempl/m68hc1xelf.em: Likewise.
* ld/emultempl/m68kcoff.em: Likewise.
* ld/emultempl/m68kelf.em: Likewise.
* ld/emultempl/metagelf.em: Likewise.
* ld/emultempl/mipself.em: Likewise.
* ld/emultempl/mmo.em: Likewise.
* ld/emultempl/msp430.em: Likewise.
* ld/emultempl/nds32elf.em: Likewise.
* ld/emultempl/needrelax.em: Likewise.
* ld/emultempl/nios2elf.em: Likewise.
* ld/emultempl/pe.em: Likewise.
* ld/emultempl/pep.em: Likewise.
* ld/emultempl/ppc32elf.em: Likewise.
* ld/emultempl/ppc64elf.em: Likewise.
* ld/emultempl/sh64elf.em: Likewise.
* ld/emultempl/solaris2.em: Likewise.
* ld/emultempl/spuelf.em: Likewise.
* ld/emultempl/sunos.em: Likewise.
* ld/emultempl/tic6xdsbt.em: Likewise.
* ld/emultempl/ticoff.em: Likewise.
* ld/emultempl/v850elf.em: Likewise.
* ld/emultempl/vms.em: Likewise.
* ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
|
|
|
if (bfd_link_relocatable (link_info)
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
|
|
|
|| (sec->flags & SEC_RELOC) == 0
|
|
|
|
|| sec->reloc_count == 0
|
|
|
|
|| (sec->flags & SEC_CODE) == 0)
|
|
|
|
return TRUE;
|
|
|
|
|
|
|
|
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
|
|
|
|
|
|
|
|
internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
|
|
|
|
link_info->keep_memory);
|
|
|
|
if (internal_relocs == NULL)
|
|
|
|
goto error_return;
|
|
|
|
|
|
|
|
/* Make sure the stac.rela stuff gets read in. */
|
|
|
|
stab = bfd_get_section_by_name (abfd, ".stab");
|
|
|
|
|
|
|
|
if (stab)
|
|
|
|
{
|
|
|
|
/* So stab does exits. */
|
|
|
|
Elf_Internal_Rela * irelbase ATTRIBUTE_UNUSED;
|
|
|
|
|
|
|
|
irelbase = _bfd_elf_link_read_relocs (abfd, stab, NULL, NULL,
|
|
|
|
link_info->keep_memory);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get section contents cached copy if it exists. */
|
|
|
|
if (contents == NULL)
|
|
|
|
{
|
|
|
|
/* Get cached copy if it exists. */
|
|
|
|
if (elf_section_data (sec)->this_hdr.contents != NULL)
|
|
|
|
contents = elf_section_data (sec)->this_hdr.contents;
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Go get them off disk. */
|
|
|
|
if (!bfd_malloc_and_get_section (abfd, sec, &contents))
|
|
|
|
goto error_return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Read this BFD's symbols cached copy if it exists. */
|
|
|
|
if (isymbuf == NULL && symtab_hdr->sh_info != 0)
|
|
|
|
{
|
|
|
|
isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
|
|
|
|
if (isymbuf == NULL)
|
|
|
|
isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
|
|
|
|
symtab_hdr->sh_info, 0,
|
|
|
|
NULL, NULL, NULL);
|
|
|
|
if (isymbuf == NULL)
|
|
|
|
goto error_return;
|
|
|
|
}
|
|
|
|
|
|
|
|
misc.symtab_hdr = symtab_hdr;
|
|
|
|
misc.isymbuf = isymbuf;
|
|
|
|
misc.irelbase = internal_relocs;
|
|
|
|
misc.contents = contents;
|
|
|
|
|
|
|
|
/* This is where all the relaxation actually get done. */
|
|
|
|
if ((pass == 1) || (new_pass && !changed))
|
|
|
|
{
|
|
|
|
/* On the first pass we simply search for the lowest page that
|
|
|
|
we havn't relaxed yet. Note that the pass count is reset
|
|
|
|
each time a page is complete in order to move on to the next page.
|
|
|
|
If we can't find any more pages then we are finished. */
|
|
|
|
if (new_pass)
|
|
|
|
{
|
|
|
|
pass = 1;
|
|
|
|
new_pass = FALSE;
|
|
|
|
changed = TRUE; /* Pre-initialize to break out of pass 1. */
|
|
|
|
search_addr = 0xFFFFFFFF;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((BASEADDR (sec) + sec->size < search_addr)
|
|
|
|
&& (BASEADDR (sec) + sec->size > page_end))
|
|
|
|
{
|
|
|
|
if (BASEADDR (sec) <= page_end)
|
|
|
|
search_addr = page_end + 1;
|
|
|
|
else
|
|
|
|
search_addr = BASEADDR (sec);
|
|
|
|
|
|
|
|
/* Found a page => more work to do. */
|
|
|
|
*again = TRUE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (new_pass)
|
|
|
|
{
|
|
|
|
new_pass = FALSE;
|
|
|
|
changed = FALSE;
|
|
|
|
page_start = PAGENO (search_addr);
|
|
|
|
page_end = page_start | 0x00003FFF;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Only process sections in range. */
|
|
|
|
if ((BASEADDR (sec) + sec->size >= page_start)
|
|
|
|
&& (BASEADDR (sec) <= page_end))
|
|
|
|
{
|
|
|
|
#if 0
|
|
|
|
if (!epiphany_elf_relax_section_page (abfd, sec, &changed, &misc,
|
|
|
|
page_start, page_end))
|
|
|
|
#endif
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
*again = TRUE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Perform some house keeping after relaxing the section. */
|
|
|
|
|
|
|
|
if (isymbuf != NULL
|
|
|
|
&& symtab_hdr->contents != (unsigned char *) isymbuf)
|
|
|
|
{
|
|
|
|
if (! link_info->keep_memory)
|
|
|
|
free (isymbuf);
|
|
|
|
else
|
|
|
|
symtab_hdr->contents = (unsigned char *) isymbuf;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (contents != NULL
|
|
|
|
&& elf_section_data (sec)->this_hdr.contents != contents)
|
|
|
|
{
|
|
|
|
if (! link_info->keep_memory)
|
|
|
|
free (contents);
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Cache the section contents for elf_link_input_bfd. */
|
|
|
|
elf_section_data (sec)->this_hdr.contents = contents;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (internal_relocs != NULL
|
|
|
|
&& elf_section_data (sec)->relocs != internal_relocs)
|
|
|
|
free (internal_relocs);
|
|
|
|
|
|
|
|
return TRUE;
|
|
|
|
|
|
|
|
error_return:
|
|
|
|
if (isymbuf != NULL
|
|
|
|
&& symtab_hdr->contents != (unsigned char *) isymbuf)
|
|
|
|
free (isymbuf);
|
|
|
|
if (contents != NULL
|
|
|
|
&& elf_section_data (sec)->this_hdr.contents != contents)
|
|
|
|
free (contents);
|
|
|
|
if (internal_relocs != NULL
|
|
|
|
&& elf_section_data (sec)->relocs != internal_relocs)
|
|
|
|
free (internal_relocs);
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set the howto pointer for a EPIPHANY ELF reloc. */
|
|
|
|
|
|
|
|
static void
|
|
|
|
epiphany_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
|
|
|
|
arelent * cache_ptr,
|
|
|
|
Elf_Internal_Rela * dst)
|
|
|
|
{
|
|
|
|
unsigned int r_type;
|
|
|
|
|
|
|
|
r_type = ELF32_R_TYPE (dst->r_info);
|
2014-12-22 21:59:00 +01:00
|
|
|
if (r_type >= (unsigned int) R_EPIPHANY_max)
|
|
|
|
{
|
2015-02-03 15:34:54 +01:00
|
|
|
_bfd_error_handler (_("%B: invalid Epiphany reloc number: %d"), abfd, r_type);
|
2014-12-22 21:59:00 +01:00
|
|
|
r_type = 0;
|
|
|
|
}
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
|
|
|
cache_ptr->howto = & epiphany_elf_howto_table [r_type];
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Perform a single relocation.
|
|
|
|
By default we use the standard BFD routines. */
|
|
|
|
|
|
|
|
static bfd_reloc_status_type
|
|
|
|
epiphany_final_link_relocate (reloc_howto_type * howto,
|
|
|
|
bfd * input_bfd,
|
|
|
|
asection * input_section,
|
|
|
|
bfd_byte * contents,
|
|
|
|
Elf_Internal_Rela * rel,
|
|
|
|
bfd_vma relocation)
|
|
|
|
{
|
|
|
|
switch (howto->type)
|
|
|
|
{
|
|
|
|
/* Handle 16 bit immediates. */
|
|
|
|
case R_EPIPHANY_HIGH:
|
|
|
|
relocation += rel->r_addend;
|
|
|
|
relocation >>= 16;
|
|
|
|
goto common;
|
|
|
|
|
|
|
|
case R_EPIPHANY_LOW:
|
|
|
|
relocation += rel->r_addend;
|
|
|
|
common:
|
|
|
|
relocation = ((relocation & 0xff00L) << 12)
|
|
|
|
| ((relocation & 0x00ffL) << 5);
|
|
|
|
/* Sanity check the address. */
|
|
|
|
if (rel->r_offset > bfd_get_section_limit (input_bfd, input_section))
|
|
|
|
return bfd_reloc_outofrange;
|
|
|
|
|
|
|
|
return _bfd_relocate_contents (howto, input_bfd, relocation,
|
|
|
|
contents + rel->r_offset);
|
|
|
|
|
|
|
|
case R_EPIPHANY_SIMM11:
|
|
|
|
relocation += rel->r_addend;
|
|
|
|
/* Check signed overflow. */
|
|
|
|
if ((int)relocation > 1023 || (int)relocation < -1024)
|
|
|
|
return bfd_reloc_outofrange;
|
|
|
|
goto disp11;
|
|
|
|
|
|
|
|
case R_EPIPHANY_IMM11:
|
|
|
|
relocation += rel->r_addend;
|
|
|
|
if ((unsigned int) relocation > 0x7ff)
|
|
|
|
return bfd_reloc_outofrange;
|
|
|
|
disp11:
|
|
|
|
relocation = ((relocation & 7) << 5)
|
|
|
|
|| ((relocation & 0x7f8 ) << 13);
|
|
|
|
return _bfd_relocate_contents (howto, input_bfd, relocation,
|
|
|
|
contents + rel->r_offset);
|
|
|
|
|
|
|
|
/* Pass others through. */
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Only install relocation if above tests did not disqualify it. */
|
|
|
|
return _bfd_final_link_relocate (howto, input_bfd, input_section,
|
|
|
|
contents, rel->r_offset,
|
|
|
|
relocation, rel->r_addend);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Relocate an EPIPHANY ELF section.
|
|
|
|
|
|
|
|
The RELOCATE_SECTION function is called by the new ELF backend linker
|
|
|
|
to handle the relocations for a section.
|
|
|
|
|
|
|
|
The relocs are always passed as Rela structures; if the section
|
|
|
|
actually uses Rel structures, the r_addend field will always be
|
|
|
|
zero.
|
|
|
|
|
|
|
|
This function is responsible for adjusting the section contents as
|
|
|
|
necessary, and (if using Rela relocs and generating a relocatable
|
|
|
|
output file) adjusting the reloc addend as necessary.
|
|
|
|
|
|
|
|
This function does not have to worry about setting the reloc
|
|
|
|
address or the reloc symbol index.
|
|
|
|
|
|
|
|
LOCAL_SYMS is a pointer to the swapped in local symbols.
|
|
|
|
|
|
|
|
LOCAL_SECTIONS is an array giving the section in the input file
|
|
|
|
corresponding to the st_shndx field of each local symbol.
|
|
|
|
|
|
|
|
The global hash table entry for the global symbols can be found
|
|
|
|
via elf_sym_hashes (input_bfd).
|
|
|
|
|
|
|
|
When generating relocatable output, this function must handle
|
|
|
|
STB_LOCAL/STT_SECTION symbols specially. The output symbol is
|
|
|
|
going to be the section symbol corresponding to the output
|
|
|
|
section, which means that the addend must be adjusted
|
|
|
|
accordingly. */
|
|
|
|
|
|
|
|
static bfd_boolean
|
|
|
|
epiphany_elf_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
|
|
|
|
struct bfd_link_info *info,
|
|
|
|
bfd *input_bfd,
|
|
|
|
asection *input_section,
|
|
|
|
bfd_byte *contents,
|
|
|
|
Elf_Internal_Rela *relocs,
|
|
|
|
Elf_Internal_Sym *local_syms,
|
|
|
|
asection **local_sections)
|
|
|
|
{
|
|
|
|
Elf_Internal_Shdr *symtab_hdr;
|
|
|
|
struct elf_link_hash_entry **sym_hashes;
|
|
|
|
Elf_Internal_Rela *rel;
|
|
|
|
Elf_Internal_Rela *relend;
|
|
|
|
|
|
|
|
symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
|
|
|
|
sym_hashes = elf_sym_hashes (input_bfd);
|
|
|
|
relend = relocs + input_section->reloc_count;
|
|
|
|
|
|
|
|
for (rel = relocs; rel < relend; rel ++)
|
|
|
|
{
|
|
|
|
reloc_howto_type * howto;
|
|
|
|
unsigned long r_symndx;
|
|
|
|
Elf_Internal_Sym * sym;
|
|
|
|
asection * sec;
|
|
|
|
struct elf_link_hash_entry * h;
|
|
|
|
bfd_vma relocation;
|
|
|
|
bfd_reloc_status_type r;
|
|
|
|
const char * name = NULL;
|
|
|
|
int r_type ATTRIBUTE_UNUSED;
|
|
|
|
|
|
|
|
r_type = ELF32_R_TYPE (rel->r_info);
|
|
|
|
r_symndx = ELF32_R_SYM (rel->r_info);
|
|
|
|
howto = epiphany_elf_howto_table + ELF32_R_TYPE (rel->r_info);
|
|
|
|
h = NULL;
|
|
|
|
sym = NULL;
|
|
|
|
sec = NULL;
|
|
|
|
|
|
|
|
if (r_symndx < symtab_hdr->sh_info)
|
|
|
|
{
|
|
|
|
sym = local_syms + r_symndx;
|
|
|
|
sec = local_sections [r_symndx];
|
|
|
|
relocation = BASEADDR (sec) + sym->st_value;
|
|
|
|
|
|
|
|
name = bfd_elf_string_from_elf_section
|
|
|
|
(input_bfd, symtab_hdr->sh_link, sym->st_name);
|
|
|
|
name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
bfd_boolean warned ATTRIBUTE_UNUSED;
|
|
|
|
bfd_boolean unresolved_reloc ATTRIBUTE_UNUSED;
|
2013-11-05 19:29:44 +01:00
|
|
|
bfd_boolean ignored ATTRIBUTE_UNUSED;
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
|
|
|
|
|
|
|
RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
|
|
|
|
r_symndx, symtab_hdr, sym_hashes,
|
|
|
|
h, sec, relocation,
|
2013-11-05 19:29:44 +01:00
|
|
|
unresolved_reloc, warned, ignored);
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
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name = h->root.root.string;
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}
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PR ld/13991
bfd/
* bfd/elf-bfd.h (_bfd_elf_link_just_syms): Define as
_bfd_generic_link_just_syms.
* bfd/elflink.c (_bfd_elf_link_just_syms): Delete.
* bfd/linker.c (_bfd_generic_link_just_syms): Set sec_info_type.
* bfd/bfd-in.h (discarded_section): Renamed from elf_discarded_section.
* bfd/section.c (SEC_INFO_TYPE_NONE, SEC_INFO_TYPE_STABS,
SEC_INFO_TYPE_MERGE, SEC_INFO_TYPE_EH_FRAME,
SEC_INFO_TYPE_JUST_SYMS): Renamed from corresponding ELF_INFO_TYPE.
* bfd/elf-eh-frame.c, * bfd/elf-m10200.c, * bfd/elf-m10300.c,
* bfd/elf.c, * bfd/elf32-arm.c, * bfd/elf32-avr.c, * bfd/elf32-bfin.c,
* bfd/elf32-cr16.c, * bfd/elf32-cr16c.c, * bfd/elf32-cris.c,
* bfd/elf32-crx.c, * bfd/elf32-d10v.c, * bfd/elf32-epiphany.c,
* bfd/elf32-fr30.c, * bfd/elf32-frv.c, * bfd/elf32-h8300.c,
* bfd/elf32-hppa.c, * bfd/elf32-i370.c, * bfd/elf32-i386.c,
* bfd/elf32-i860.c, * bfd/elf32-ip2k.c, * bfd/elf32-iq2000.c,
* bfd/elf32-lm32.c, * bfd/elf32-m32c.c, * bfd/elf32-m32r.c,
* bfd/elf32-m68hc1x.c, * bfd/elf32-m68k.c, * bfd/elf32-mcore.c,
* bfd/elf32-mep.c, * bfd/elf32-moxie.c, * bfd/elf32-msp430.c,
* bfd/elf32-mt.c, * bfd/elf32-openrisc.c, * bfd/elf32-ppc.c,
* bfd/elf32-rl78.c, * bfd/elf32-rx.c, * bfd/elf32-s390.c,
* bfd/elf32-score.c, * bfd/elf32-score7.c, * bfd/elf32-sh.c,
* bfd/elf32-spu.c, * bfd/elf32-tic6x.c, * bfd/elf32-tilepro.c,
* bfd/elf32-v850.c, * bfd/elf32-vax.c, * bfd/elf32-xc16x.c,
* bfd/elf32-xstormy16.c, * bfd/elf32-xtensa.c, * bfd/elf64-alpha.c,
* bfd/elf64-hppa.c, * bfd/elf64-ia64-vms.c, * bfd/elf64-mmix.c,
* bfd/elf64-ppc.c, * bfd/elf64-s390.c, * bfd/elf64-sh64.c,
* bfd/elf64-x86-64.c, * bfd/elflink.c, * bfd/elfnn-ia64.c,
* bfd/elfxx-mips.c, * bfd/elfxx-sparc.c, * bfd/elfxx-tilegx.c,
* bfd/reloc.c: Update all references.
* bfd/bfd-in2.h: Regenerate.
ld/
* ld/ldlang.c (size_input_section): Use sec_info_type rather than
usrdata->flags.just_syms.
* ld/ldwrite.c (build_link_order): Likewise.
* ld/emultempl/hppaelf.em (build_section_lists): Likewise.
* ld/emultempl/ppc64elf.em (build_toc_list): Likewise.
* ld/emultempl/armelf.em (build_section_lists): Likewise.
(after_allocation): Update for renamed sec_info_type value.
* ld/emultempl/tic6xdsbt.em: Likewise.
2012-04-24 07:12:40 +02:00
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if (sec != NULL && discarded_section (sec))
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bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
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RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
|
2012-05-07 05:27:52 +02:00
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rel, 1, relend, howto, 0, contents);
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
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Add output_type to bfd_link_info
The "shared" field in bfd_link_info is set for both DSO and and PIE.
There are separate fields for executable and relocatable outputs. This
patch adds an "output_type" field:
enum output_type
{
type_unknown = 0,
type_executable,
type_dll,
type_relocatable
};
and a "pic" field to bfd_link_info to replace shared, executable and
relocatable fields so that we can use the "output_type" field to check
for output type and the "pic" field check if output is PIC. Macros,
bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic
and bfd_link_pie, are provided to check for output features.
bfd/
* bfd/aoutx.h: Replace shared, executable, relocatable and pie
fields with bfd_link_executable, bfd_link_dll,
bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
* bfd/bout.c: Likewise.
* bfd/coff-alpha.c: Likewise.
* bfd/coff-arm.c: Likewise.
* bfd/coff-i386.c: Likewise.
* bfd/coff-i960.c: Likewise.
* bfd/coff-m68k.c: Likewise.
* bfd/coff-mcore.c: Likewise.
* bfd/coff-mips.c: Likewise.
* bfd/coff-ppc.c: Likewise.
* bfd/coff-rs6000.c: Likewise.
* bfd/coff-sh.c: Likewise.
* bfd/coff-tic80.c: Likewise.
* bfd/coff-x86_64.c: Likewise.
* bfd/coff64-rs6000.c: Likewise.
* bfd/coffgen.c: Likewise.
* bfd/cofflink.c: Likewise.
* bfd/ecoff.c: Likewise.
* bfd/ecofflink.c: Likewise.
* bfd/elf-bfd.h: Likewise.
* bfd/elf-eh-frame.c: Likewise.
* bfd/elf-ifunc.c: Likewise.
* bfd/elf-m10200.c: Likewise.
* bfd/elf-m10300.c: Likewise.
* bfd/elf-s390-common.c: Likewise.
* bfd/elf-vxworks.c: Likewise.
* bfd/elf.c: Likewise.
* bfd/elf32-arm.c: Likewise.
* bfd/elf32-avr.c: Likewise.
* bfd/elf32-bfin.c: Likewise.
* bfd/elf32-cr16.c: Likewise.
* bfd/elf32-cr16c.c: Likewise.
* bfd/elf32-cris.c: Likewise.
* bfd/elf32-crx.c: Likewise.
* bfd/elf32-d10v.c: Likewise.
* bfd/elf32-dlx.c: Likewise.
* bfd/elf32-epiphany.c: Likewise.
* bfd/elf32-fr30.c: Likewise.
* bfd/elf32-frv.c: Likewise.
* bfd/elf32-ft32.c: Likewise.
* bfd/elf32-h8300.c: Likewise.
* bfd/elf32-hppa.c: Likewise.
* bfd/elf32-i370.c: Likewise.
* bfd/elf32-i386.c: Likewise.
* bfd/elf32-i860.c: Likewise.
* bfd/elf32-ip2k.c: Likewise.
* bfd/elf32-iq2000.c: Likewise.
* bfd/elf32-lm32.c: Likewise.
* bfd/elf32-m32c.c: Likewise.
* bfd/elf32-m32r.c: Likewise.
* bfd/elf32-m68hc11.c: Likewise.
* bfd/elf32-m68hc1x.c: Likewise.
* bfd/elf32-m68k.c: Likewise.
* bfd/elf32-mcore.c: Likewise.
* bfd/elf32-mep.c: Likewise.
* bfd/elf32-metag.c: Likewise.
* bfd/elf32-microblaze.c: Likewise.
* bfd/elf32-moxie.c: Likewise.
* bfd/elf32-msp430.c: Likewise.
* bfd/elf32-mt.c: Likewise.
* bfd/elf32-nds32.c: Likewise.
* bfd/elf32-nios2.c: Likewise.
* bfd/elf32-or1k.c: Likewise.
* bfd/elf32-ppc.c: Likewise.
* bfd/elf32-rl78.c: Likewise.
* bfd/elf32-rx.c: Likewise.
* bfd/elf32-s390.c: Likewise.
* bfd/elf32-score.c: Likewise.
* bfd/elf32-score7.c: Likewise.
* bfd/elf32-sh-symbian.c: Likewise.
* bfd/elf32-sh.c: Likewise.
* bfd/elf32-sh64.c: Likewise.
* bfd/elf32-spu.c: Likewise.
* bfd/elf32-tic6x.c: Likewise.
* bfd/elf32-tilepro.c: Likewise.
* bfd/elf32-v850.c: Likewise.
* bfd/elf32-vax.c: Likewise.
* bfd/elf32-visium.c: Likewise.
* bfd/elf32-xc16x.c: Likewise.
* bfd/elf32-xstormy16.c: Likewise.
* bfd/elf32-xtensa.c: Likewise.
* bfd/elf64-alpha.c: Likewise.
* bfd/elf64-hppa.c: Likewise.
* bfd/elf64-ia64-vms.c: Likewise.
* bfd/elf64-mmix.c: Likewise.
* bfd/elf64-ppc.c: Likewise.
* bfd/elf64-s390.c: Likewise.
* bfd/elf64-sh64.c: Likewise.
* bfd/elf64-x86-64.c: Likewise.
* bfd/elflink.c: Likewise.
* bfd/elfnn-aarch64.c: Likewise.
* bfd/elfnn-ia64.c: Likewise.
* bfd/elfxx-mips.c: Likewise.
* bfd/elfxx-sparc.c: Likewise.
* bfd/elfxx-tilegx.c: Likewise.
* bfd/i386linux.c: Likewise.
* bfd/linker.c: Likewise.
* bfd/m68klinux.c: Likewise.
* bfd/pdp11.c: Likewise.
* bfd/pe-mips.c: Likewise.
* bfd/peXXigen.c: Likewise.
* bfd/reloc.c: Likewise.
* bfd/reloc16.c: Likewise.
* bfd/sparclinux.c: Likewise.
* bfd/sunos.c: Likewise.
* bfd/vms-alpha.c: Likewise.
* bfd/xcofflink.c: Likewise.
include/
* include/bfdlink.h (output_type): New enum.
(bfd_link_executable): New macro.
(bfd_link_dll): Likewise.
(bfd_link_relocatable): Likewise.
(bfd_link_pic): Likewise.
(bfd_link_pie): Likewise.
(bfd_link_info): Remove shared, executable, pie and relocatable.
Add output_type and pic.
ld/
* ld/ldctor.c: Replace shared, executable, relocatable and pie
fields with bfd_link_executable, bfd_link_dll,
bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
* ld/ldemul.c: Likewise.
* ld/ldfile.c: Likewise.
* ld/ldlang.c: Likewise.
* ld/ldmain.c: Likewise.
* ld/ldwrite.c: Likewise.
* ld/lexsup.c: Likewise.
* ld/pe-dll.c: Likewise.
* ld/plugin.c: Likewise.
* ld/emultempl/aarch64elf.em: Likewise.
* ld/emultempl/aix.em: Likewise.
* ld/emultempl/alphaelf.em: Likewise.
* ld/emultempl/armcoff.em: Likewise.
* ld/emultempl/armelf.em: Likewise.
* ld/emultempl/avrelf.em: Likewise.
* ld/emultempl/beos.em: Likewise.
* ld/emultempl/cr16elf.em: Likewise.
* ld/emultempl/elf-generic.em: Likewise.
* ld/emultempl/elf32.em: Likewise.
* ld/emultempl/genelf.em: Likewise.
* ld/emultempl/generic.em: Likewise.
* ld/emultempl/gld960.em: Likewise.
* ld/emultempl/gld960c.em: Likewise.
* ld/emultempl/hppaelf.em: Likewise.
* ld/emultempl/irix.em: Likewise.
* ld/emultempl/linux.em: Likewise.
* ld/emultempl/lnk960.em: Likewise.
* ld/emultempl/m68hc1xelf.em: Likewise.
* ld/emultempl/m68kcoff.em: Likewise.
* ld/emultempl/m68kelf.em: Likewise.
* ld/emultempl/metagelf.em: Likewise.
* ld/emultempl/mipself.em: Likewise.
* ld/emultempl/mmo.em: Likewise.
* ld/emultempl/msp430.em: Likewise.
* ld/emultempl/nds32elf.em: Likewise.
* ld/emultempl/needrelax.em: Likewise.
* ld/emultempl/nios2elf.em: Likewise.
* ld/emultempl/pe.em: Likewise.
* ld/emultempl/pep.em: Likewise.
* ld/emultempl/ppc32elf.em: Likewise.
* ld/emultempl/ppc64elf.em: Likewise.
* ld/emultempl/sh64elf.em: Likewise.
* ld/emultempl/solaris2.em: Likewise.
* ld/emultempl/spuelf.em: Likewise.
* ld/emultempl/sunos.em: Likewise.
* ld/emultempl/tic6xdsbt.em: Likewise.
* ld/emultempl/ticoff.em: Likewise.
* ld/emultempl/v850elf.em: Likewise.
* ld/emultempl/vms.em: Likewise.
* ld/emultempl/vxworks.em: Likewise.
2015-08-18 14:51:03 +02:00
|
|
|
if (bfd_link_relocatable (info))
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
|
|
|
continue;
|
|
|
|
|
|
|
|
/* Finally, the sole EPIPHANY-specific part. */
|
|
|
|
r = epiphany_final_link_relocate (howto, input_bfd, input_section,
|
|
|
|
contents, rel, relocation);
|
|
|
|
|
|
|
|
if (r != bfd_reloc_ok)
|
|
|
|
{
|
|
|
|
const char * msg = NULL;
|
|
|
|
|
|
|
|
switch (r)
|
|
|
|
{
|
|
|
|
case bfd_reloc_overflow:
|
|
|
|
r = info->callbacks->reloc_overflow
|
|
|
|
(info, (h ? &h->root : NULL), name, howto->name,
|
|
|
|
(bfd_vma) 0, input_bfd, input_section, rel->r_offset);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case bfd_reloc_undefined:
|
|
|
|
r = info->callbacks->undefined_symbol
|
|
|
|
(info, name, input_bfd, input_section, rel->r_offset, TRUE);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case bfd_reloc_outofrange:
|
|
|
|
msg = _("internal error: out of range error");
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* This is how epiphany_final_link_relocate tells us of a
|
|
|
|
non-kosher reference between insn & data address spaces. */
|
|
|
|
case bfd_reloc_notsupported:
|
|
|
|
if (sym != NULL) /* Only if it's not an unresolved symbol. */
|
|
|
|
msg = _("unsupported relocation between data/insn address spaces");
|
|
|
|
break;
|
|
|
|
|
|
|
|
case bfd_reloc_dangerous:
|
|
|
|
msg = _("internal error: dangerous relocation");
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
msg = _("internal error: unknown error");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (msg)
|
|
|
|
r = info->callbacks->warning
|
|
|
|
(info, msg, name, input_bfd, input_section, rel->r_offset);
|
|
|
|
|
|
|
|
if (! r)
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return TRUE;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We only have a little-endian target. */
|
bfd target vector rationalisation
This renames the bfd targets to <cpu>_<format>_<other>_<endian>_vec.
So for example, bfd_elf32_ntradlittlemips_vec becomes
mips_elf32_ntrad_le_vec and hp300bsd_vec becomes m68k_aout_hp300bsd_vec.
bfd/
* aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-ns32k.c,
* aout-sparcle.c, * aout0.c, * aoutx.h, * armnetbsd.c, * bout.c,
* cf-i386lynx.c, * cf-sparclynx.c, * cisco-core.c, * coff-alpha.c,
* coff-apollo.c, * coff-arm.c, * coff-aux.c, * coff-go32.c,
* coff-h8300.c, * coff-h8500.c, * coff-i386.c, * coff-i860.c,
* coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mips.c,
* coff-rs6000.c, * coff-sh.c, * coff-sparc.c, * coff-stgo32.c,
* coff-svm68k.c, * coff-tic80.c, * coff-u68k.c, * coff-w65.c,
* coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c,
* coff64-rs6000.c, * config.bfd, * configure.com, * configure.in,
* demo64.c, * elf-m10200.c, * elf-m10300.c, * elf32-am33lin.c,
* elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c,
* elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c,
* elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
* elf32-fr30.c, * elf32-frv.c, * elf32-gen.c, * elf32-h8300.c,
* elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-i860.c,
* elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c,
* elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c,
* elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c,
* elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c,
* elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c,
* elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c,
* elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-sh-symbian.c,
* elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c,
* elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilepro.c, * elf32-v850.c,
* elf32-vax.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c,
* elf32-xtensa.c, * elf64-alpha.c, * elf64-gen.c, * elf64-hppa.c,
* elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c,
* elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c,
* elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c,
* epoc-pe-arm.c, * epoc-pei-arm.c, * hp300bsd.c, * hp300hpux.c,
* hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386bsd.c,
* i386dynix.c, * i386freebsd.c, * i386linux.c, * i386lynx.c,
* i386mach3.c, * i386msdos.c, * i386netbsd.c, * i386os9k.c,
* irix-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c,
* m88kmach3.c, * m88kopenbsd.c, * mach-o-i386.c, * mach-o-x86-64.c,
* makefile.vms, * mipsbsd.c, * mmo.c, * netbsd-core.c, * newsos3.c,
* nlm32-alpha.c, * nlm32-i386.c, * nlm32-ppc.c, * nlm32-sparc.c,
* ns32knetbsd.c, * osf-core.c, * pc532-mach.c, * pe-arm-wince.c,
* pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-ppc.c,
* pe-sh.c, * pe-x86_64.c, * pei-arm-wince.c, * pei-arm.c,
* pei-i386.c, * pei-ia64.c, * pei-mcore.c, * pei-mips.c, * pei-ppc.c,
* pei-sh.c, * pei-x86_64.c, * ppcboot.c, * ptrace-core.c, * riscix.c,
* sco5-core.c, * som.c, * sparclinux.c, * sparclynx.c,
* sparcnetbsd.c, * sunos.c, * targets.c, * trad-core.c,
* vax1knetbsd.c, * vaxbsd.c, * vaxnetbsd.c, * versados.c,
* vms-alpha.c, * vms-lib.c: Rename bfd targets to
<cpu>_<format>_<other>_<endian>_vec. Adjust associated MY macros
on aout targets.
* configure: Regenerate.
binutils/
* emul_aix.c: Update bfd target vector naming.
* testsuite/binutils-all/objcopy.exp: Likewise.
ld/
* emultempl/metagelf.em: Update bfd target vector naming.
* emultempl/nios2elf.em: Likewise.
* emultempl/spuelf.em: Likewise.
* emultempl/tic6xdsbt.em: Likewise.
2014-05-02 12:39:40 +02:00
|
|
|
#define TARGET_LITTLE_SYM epiphany_elf32_vec
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
|
|
|
#define TARGET_LITTLE_NAME "elf32-epiphany"
|
|
|
|
|
|
|
|
#define ELF_ARCH bfd_arch_epiphany
|
|
|
|
#define ELF_MACHINE_CODE EM_ADAPTEVA_EPIPHANY
|
|
|
|
|
|
|
|
#define ELF_MAXPAGESIZE 0x8000 /* No pages on the EPIPHANY. */
|
|
|
|
|
|
|
|
#define elf_info_to_howto_rel NULL
|
|
|
|
#define elf_info_to_howto epiphany_info_to_howto_rela
|
|
|
|
|
|
|
|
#define elf_backend_can_gc_sections 1
|
|
|
|
#define elf_backend_rela_normal 1
|
|
|
|
#define elf_backend_relocate_section epiphany_elf_relocate_section
|
|
|
|
|
|
|
|
#define elf_symbol_leading_char '_'
|
|
|
|
#define bfd_elf32_bfd_reloc_type_lookup epiphany_reloc_type_lookup
|
|
|
|
#define bfd_elf32_bfd_reloc_name_lookup epiphany_reloc_name_lookup
|
|
|
|
#define bfd_elf32_bfd_relax_section epiphany_elf_relax_section
|
|
|
|
|
|
|
|
#include "elf32-target.h"
|