2020-01-19 15:24:06 +01:00
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2020-01-22 Yuri Chornoivan <yurchor@mageia.org>
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PR 25417
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* ldlang.c (ldlang_open_ctf): Fix error message typo.
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* emultempl/z80elf.em (z80_elf_after_open): Likewise.
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2020-01-22 01:20:38 +01:00
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2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
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* testsuite/ld-elf/pr23900-1.d: Adjusted.
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2020-01-21 14:43:59 +01:00
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2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
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* testsuite/ld-elf/pr23900-1.d: Also pass -l to readelf.
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2020-01-20 16:10:23 +01:00
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2020-01-20 Nick Clifton <nickc@redhat.com>
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* po/pt_BR.po: Updated Brazilian Portuguese translation.
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* po/uk.po: Updated Ukranian translation.
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x86-64: Fix TLSDESC relaxation for x32
For x32, we must encode "lea x@TLSDESC(%rip), %reg" with a REX prefix
even if it isn't required. Otherwise linker can’t safely perform
GDesc -> IE/LE optimization. X32 TLSDESC sequences can be:
40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg
...
67 ff 10 call *x@TLSCALL(%eax)
or the same sequence as LP64:
48 8d 05 00 00 00 00 lea foo@TLSDESC(%rip), %reg
...
ff 10 call *foo@TLSCALL(%rax)
We need to support both sequences for x32. For both GDesc -> IE/LE
transitions,
67 ff 10 call *x@TLSCALL(%eax)
should relaxed to
0f 1f 00 nopl (%rax)
For GDesc -> LE transition,
40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg
should relaxed to
40 c7 c0 fc ff ff ff rex movl $x@tpoff, %reg
For GDesc -> IE transition,
40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg
should relaxed to
40 8b 05 00 00 00 00 rex movl x@gottpoff(%rip), %eax
bfd/
PR ld/25416
* elf64-x86-64.c (elf_x86_64_check_tls_transition): Support
"rex leal x@tlsdesc(%rip), %reg" and "call *x@tlsdesc(%eax)" in
X32 mode.
(elf_x86_64_relocate_section): In x32 mode, for GDesc -> LE
transition, relax "rex leal x@tlsdesc(%rip), %reg" to
"rex movl $x@tpoff, %reg", for GDesc -> IE transition, relax
"rex leal x@tlsdesc(%rip), %reg" to
"rex movl x@gottpoff(%rip), %eax". For both transitions, relax
"call *(%eax)" to "nopl (%rax)".
gas/
PR ld/25416
* config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
x32 object.
* testsuite/gas/i386/ilp32/x32-tls.d: Updated.
* testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
R_X86_64_GOTPC32_TLSDESC relocation.
ld/
PR ld/25416
* testsuite/ld-x86-64/pr25416-1.s: New file
* testsuite/ld-x86-64/pr25416-1a.d: Likewise.
* testsuite/ld-x86-64/pr25416-1b.d: Likewise.
* testsuite/ld-x86-64/pr25416-1.s: Likewise.
* testsuite/ld-x86-64/pr25416-2.s: Likewise.
* testsuite/ld-x86-64/pr25416-2a.d: Likewise.
* testsuite/ld-x86-64/pr25416-2b.d: Likewise.
* testsuite/ld-x86-64/pr25416-3.d: Likewise.
* testsuite/ld-x86-64/pr25416-3.s: Likewise.
* testsuite/ld-x86-64/pr25416-4.d: Likewise.
* testsuite/ld-x86-64/pr25416-4.s: Likewise.
* testsuite/ld-x86-64/pr25416-5a.c: Likewise.
* testsuite/ld-x86-64/pr25416-5b.s: Likewise.
* testsuite/ld-x86-64/pr25416-5c.s: Likewise.
* testsuite/ld-x86-64/pr25416-5d.s: Likewise.
* testsuite/ld-x86-64/pr25416-5e.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/25416 tests.
2020-01-20 15:58:51 +01:00
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2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/25416
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* testsuite/ld-x86-64/pr25416-1.s: New file
|
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* testsuite/ld-x86-64/pr25416-1a.d: Likewise.
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* testsuite/ld-x86-64/pr25416-1b.d: Likewise.
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* testsuite/ld-x86-64/pr25416-1.s: Likewise.
|
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* testsuite/ld-x86-64/pr25416-2.s: Likewise.
|
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* testsuite/ld-x86-64/pr25416-2a.d: Likewise.
|
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* testsuite/ld-x86-64/pr25416-2b.d: Likewise.
|
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* testsuite/ld-x86-64/pr25416-3.d: Likewise.
|
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* testsuite/ld-x86-64/pr25416-3.s: Likewise.
|
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* testsuite/ld-x86-64/pr25416-4.d: Likewise.
|
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* testsuite/ld-x86-64/pr25416-4.s: Likewise.
|
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* testsuite/ld-x86-64/pr25416-5a.c: Likewise.
|
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* testsuite/ld-x86-64/pr25416-5b.s: Likewise.
|
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* testsuite/ld-x86-64/pr25416-5c.s: Likewise.
|
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* testsuite/ld-x86-64/pr25416-5d.s: Likewise.
|
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* testsuite/ld-x86-64/pr25416-5e.s: Likewise.
|
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* testsuite/ld-x86-64/x86-64.exp: Run PR ld/25416 tests.
|
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2020-01-20 03:03:29 +01:00
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2020-01-20 Alan Modra <amodra@gmail.com>
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* testsuite/ld-powerpc/tlsexe.d: Match new __tls_get_addr stub.
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* testsuite/ld-powerpc/tlsexeno.d: Likewise.
|
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* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
|
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|
* testsuite/ld-powerpc/tlsexetocno.d: Likewise.
|
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|
* testsuite/ld-powerpc/tlsopt5.d: Likewise.
|
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|
2020-01-18 23:42:24 +01:00
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|
2020-01-18 Roland McGrath <mcgrathr@google.com>
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* testsuite/ld-x86-64/align-branch-1.d: Loosen instruction regexps
|
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|
to admit whatever absolute address. The label-relative address is
|
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what the test needs to verify.
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2020-01-18 15:12:07 +01:00
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|
2020-01-18 Nick Clifton <nickc@redhat.com>
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|
* configure: Regenerate.
|
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|
* po/ld.pot: Regenerate.
|
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|
2020-01-18 14:50:25 +01:00
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|
2020-01-18 Nick Clifton <nickc@redhat.com>
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|
Binutils 2.34 branch created.
|
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|
2020-01-16 14:44:21 +01:00
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|
2020-01-16 Jozef Lawrynowicz <jozef.l@mittosystems.com>
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|
* scripttempl/elf32msp430_3.sc: Remove.
|
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|
2020-01-16 12:32:23 +01:00
|
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|
2020-01-16 Jozef Lawrynowicz <jozef.l@mittosystems.com>
|
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|
* scripttempl/elf32msp430.sc: Add input section rules for
|
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|
|
.upper.{text,data,rodata,bss}.
|
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|
|
|
|
* testsuite/ld-msp430-elf/msp430-elf.exp: Run new test.
|
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|
* testsuite/ld-msp430-elf/upper-input-sections.s: New test.
|
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|
2020-01-15 15:18:54 +01:00
|
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|
2020-01-15 Lars Brinkhoff <lars@nocrew.org>
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|
|
PR 20694
|
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|
|
|
* temulparams/pdp11.sh (TARGET_PAGE_SIZE): Set to 8192.
|
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|
|
2020-01-15 14:17:27 +01:00
|
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|
2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
|
|
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|
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|
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|
|
* testsuite/ld-msp430-elf/msp430-elf.exp: Run new test.
|
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|
|
|
* testsuite/ld-msp430-elf/reloc-lo-430x.s: New test.
|
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|
2020-01-14 11:15:53 +01:00
|
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|
2020-01-15 Alan Modra <amodra@gmail.com>
|
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|
|
* testsuite/ld-powerpc/ambiguousv1b.d: Adjust expected output.
|
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|
|
* testsuite/ld-powerpc/funref.s: Align func_tab.
|
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|
|
|
|
* testsuite/ld-powerpc/funref2.s: Likewise.
|
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|
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|
|
* testsuite/ld-powerpc/funv1.s: Add dot symbols.
|
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|
2020-01-14 17:59:37 +01:00
|
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|
2020-01-14 Lili Cui <lili.cui@intel.com>
|
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|
* testsuite/ld-i386/align-branch-1.d: Updated for i686-pc-elf.
|
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|
2020-01-13 13:14:04 +01:00
|
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|
2020-01-13 Alan Modra <amodra@gmail.com>
|
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|
|
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|
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|
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|
|
* po/BLD-POTFILES.in: Regenerate.
|
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|
2020-01-13 10:16:47 +01:00
|
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|
2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
|
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|
|
* testsuite/ld-arc/relax-local-pic.d: Improve matching patterns.
|
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|
2020-01-13 10:16:47 +01:00
|
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|
2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
|
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|
* Makefile.am: Remove earcelf_prof.c and earclinux_prof.c
|
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|
|
|
emulations.
|
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|
|
|
|
* configure.tgt: Likewise.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* emulparams/arcelf_prof.sh: Remove file.
|
|
|
|
|
|
* emulparams/arclinux_prof.sh: Likewise.
|
|
|
|
|
|
|
2020-01-13 10:16:47 +01:00
|
|
|
|
2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
|
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|
|
|
|
|
|
|
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|
|
* scripttempl/elfarcv2.sc : Allow interrupt vector table to be
|
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|
|
|
|
located at an arbitrary address. Use DWARF.sc file.
|
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|
|
|
|
* scripttempl/elfarc.sc: Use DWARF.sc file.
|
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|
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|
|
Re: Prefer object over notype symbols when disassembling
Reverts unnecessary mips testsuite changes made by commit 660df28acf.
* testsuite/ld-mips-elf/eh-frame5.s,
* testsuite/ld-mips-elf/ehdr_start-new.s,
* testsuite/ld-mips-elf/ehdr_start-o32.s,
* testsuite/ld-mips-elf/mips16-call-global-1.s,
* testsuite/ld-mips-elf/mips16-intermix-1.s,
* testsuite/ld-mips-elf/mips16-pic-1b.s,
* testsuite/ld-mips-elf/mips16-pic-4c.s,
* testsuite/ld-mips-elf/no-shared-1-n64.s,
* testsuite/ld-mips-elf/no-shared-1-o32.s,
* testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s,
* testsuite/ld-mips-elf/pic-and-nonpic-1b.s,
* testsuite/ld-mips-elf/pic-and-nonpic-2a.s,
* testsuite/ld-mips-elf/pic-and-nonpic-3b.s,
* testsuite/ld-mips-elf/pic-and-nonpic-4b.s,
* testsuite/ld-mips-elf/pic-and-nonpic-5a.s,
* testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s,
* testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s,
* testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s,
* testsuite/ld-mips-elf/pie.s,
* testsuite/ld-mips-elf/relax-jalr.s: Revert 2019-12-17 change.
2020-01-06 23:59:54 +01:00
|
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|
|
2020-01-07 Alan Modra <amodra@gmail.com>
|
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|
|
|
|
|
|
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|
|
* testsuite/ld-mips-elf/eh-frame5.s,
|
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|
* testsuite/ld-mips-elf/ehdr_start-new.s,
|
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|
|
|
* testsuite/ld-mips-elf/ehdr_start-o32.s,
|
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|
|
|
* testsuite/ld-mips-elf/mips16-call-global-1.s,
|
|
|
|
|
|
* testsuite/ld-mips-elf/mips16-intermix-1.s,
|
|
|
|
|
|
* testsuite/ld-mips-elf/mips16-pic-1b.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/mips16-pic-4c.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/no-shared-1-n64.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/no-shared-1-o32.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/pic-and-nonpic-1b.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/pic-and-nonpic-2a.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/pic-and-nonpic-3b.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/pic-and-nonpic-4b.s,
|
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|
|
|
* testsuite/ld-mips-elf/pic-and-nonpic-5a.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s,
|
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|
|
|
|
* testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s,
|
|
|
|
|
|
* testsuite/ld-mips-elf/pie.s,
|
|
|
|
|
|
* testsuite/ld-mips-elf/relax-jalr.s: Revert 2019-12-17 change.
|
|
|
|
|
|
|
2020-01-06 17:24:23 +01:00
|
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|
|
2020-01-06 Nick Clifton <nickc@redhat.com>
|
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|
|
|
|
|
|
|
|
|
PR 25327
|
|
|
|
|
|
* testsuite/ld-elf/shared.exp: Add -fcommon option to compiler
|
|
|
|
|
|
command line when building libcomm1.o and pr13250 tests.
|
|
|
|
|
|
* testsuite/ld-plugin/lto.exp: Likewise for pr20267 tests.
|
|
|
|
|
|
|
2020-01-06 15:00:34 +01:00
|
|
|
|
2020-01-06 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 25326
|
|
|
|
|
|
* testsuite/ld-elf/shared.exp: Add -fcommon option to compiler
|
|
|
|
|
|
command line when building pr19579 binaries.
|
|
|
|
|
|
|
2020-01-03 13:55:12 +01:00
|
|
|
|
2020-01-03 Hannes Domani <ssbssa@yahoo.de>
|
|
|
|
|
|
|
|
|
|
|
|
* emultempl/pe.em: Add new option --enable-reloc-section.
|
|
|
|
|
|
* emultempl/pep.em: Likewise.
|
|
|
|
|
|
* ld.texi: Document --enable-reloc-section.
|
|
|
|
|
|
* pe-dll.c (pe_dll_build_sections): Use pe_dll_enable_reloc_section.
|
|
|
|
|
|
(pe_dll_fill_sections): Simplify by calling pe_exe_fill_sections.
|
|
|
|
|
|
* pe-dll.h: Add extern declaration of option flag.
|
|
|
|
|
|
* pep-dll.c (pe_dll_enable_reloc_section):
|
|
|
|
|
|
Add alias define for pep_dll_enable_reloc_section.
|
|
|
|
|
|
* pep-dll.h: Add extern declaration of option flag.
|
|
|
|
|
|
|
2020-01-02 15:10:40 +01:00
|
|
|
|
2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Add new target z80-elf
|
|
|
|
|
|
* configure.tgt: Likewise.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* emultempl/z80.em: Add support for eZ80 and Z180 architectures.
|
|
|
|
|
|
* emulparams/elf32z80.sh: New file.
|
|
|
|
|
|
* emultempl/z80elf.em: Likewise.
|
|
|
|
|
|
* testsuite/ld-elf/comm-data4.s: Fix for Z80.
|
|
|
|
|
|
* testsuite/ld-elf/comm-data5.s: Fix for Z80.
|
|
|
|
|
|
* testsuite/ld-scripts/fill16.d: Fix for Z80.
|
|
|
|
|
|
* testsuite/ld-z80/arch_ez80_adl.d: Likewise.
|
|
|
|
|
|
* testsuite/ld-z80/arch_ez80_z80.d: Likewise.
|
|
|
|
|
|
* testsuite/ld-z80/arch_r800.d: Likewise.
|
|
|
|
|
|
* testsuite/ld-z80/arch_z180.d: Likewise.
|
|
|
|
|
|
* testsuite/ld-z80/arch_z80.d: Likewise.
|
|
|
|
|
|
* testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise.
|
|
|
|
|
|
* testsuite/ld-z80/comb_arch_z180.d: Likewise.
|
|
|
|
|
|
* testsuite/ld-z80/labels.s: Likewise.
|
|
|
|
|
|
* testsuite/ld-z80/relocs.s: Likewise.
|
|
|
|
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* testsuite/ld-z80/relocs_b_ez80.d: Likewise.
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* testsuite/ld-z80/relocs_b_z80.d: Likewise.
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* testsuite/ld-z80/relocs_f_z80.d: Likewise.
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* testsuite/ld-z80/z80.exp: Likewise.
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* NEWS: Mention the new support.
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2020-01-02 15:06:01 +01:00
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2020-01-02 Tamar Christina <tamar.christina@arm.com>
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PR 25210
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PR 24753
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* emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section):
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Remove SEC_LINKER_CREATED.
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* testsuite/ld-aarch64/aarch64-elf.exp: Add erratum835769-843419.
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* testsuite/ld-aarch64/erratum835769-843419.d: New test.
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2020-01-01 09:22:19 +01:00
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2020-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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2020-01-01 08:37:11 +01:00
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For older changes see ChangeLog-2019
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2016-01-01 11:44:31 +01:00
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2020-01-01 08:37:11 +01:00
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Copyright (C) 2020 Free Software Foundation, Inc.
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2016-01-01 11:44:31 +01:00
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
|
