Refactoring/cleanup of nios2 opcodes and assembler code.
2014-10-23 Sandra Loosemore <sandra@codesourcery.com>
include/opcode/
* nios2.h (enum iw_format_type): New.
(struct nios2_opcode): Update comments. Add size and format fields.
(NIOS2_INSN_OPTARG): New.
(REG_NORMAL, REG_CONTROL, REG_COPROCESSOR): New.
(struct nios2_reg): Add regtype field.
(GET_INSN_FIELD, SET_INSN_FIELD): Delete.
(IW_A_LSB, IW_A_MSB, IW_A_SZ, IW_A_MASK): Delete.
(IW_B_LSB, IW_B_MSB, IW_B_SZ, IW_B_MASK): Delete.
(IW_C_LSB, IW_C_MSB, IW_C_SZ, IW_C_MASK): Delete.
(IW_IMM16_LSB, IW_IMM16_MSB, IW_IMM16_SZ, IW_IMM16_MASK): Delete.
(IW_IMM26_LSB, IW_IMM26_MSB, IW_IMM26_SZ, IW_IMM26_MASK): Delete.
(IW_OP_LSB, IW_OP_MSB, IW_OP_SZ, IW_OP_MASK): Delete.
(IW_OPX_LSB, IW_OPX_MSB, IW_OPX_SZ, IW_OPX_MASK): Delete.
(IW_SHIFT_IMM5_LSB, IW_SHIFT_IMM5_MSB): Delete.
(IW_SHIFT_IMM5_SZ, IW_SHIFT_IMM5_MASK): Delete.
(IW_CONTROL_REGNUM_LSB, IW_CONTROL_REGNUM_MSB): Delete.
(IW_CONTROL_REGNUM_SZ, IW_CONTROL_REGNUM_MASK): Delete.
(OP_MASK_OP, OP_SH_OP): Delete.
(OP_MASK_IOP, OP_SH_IOP): Delete.
(OP_MASK_IRD, OP_SH_IRD): Delete.
(OP_MASK_IRT, OP_SH_IRT): Delete.
(OP_MASK_IRS, OP_SH_IRS): Delete.
(OP_MASK_ROP, OP_SH_ROP): Delete.
(OP_MASK_RRD, OP_SH_RRD): Delete.
(OP_MASK_RRT, OP_SH_RRT): Delete.
(OP_MASK_RRS, OP_SH_RRS): Delete.
(OP_MASK_JOP, OP_SH_JOP): Delete.
(OP_MASK_IMM26, OP_SH_IMM26): Delete.
(OP_MASK_RCTL, OP_SH_RCTL): Delete.
(OP_MASK_IMM5, OP_SH_IMM5): Delete.
(OP_MASK_CACHE_OPX, OP_SH_CACHE_OPX): Delete.
(OP_MASK_CACHE_RRS, OP_SH_CACHE_RRS): Delete.
(OP_MASK_CUSTOM_A, OP_SH_CUSTOM_A): Delete.
(OP_MASK_CUSTOM_B, OP_SH_CUSTOM_B): Delete.
(OP_MASK_CUSTOM_C, OP_SH_CUSTOM_C): Delete.
(OP_MASK_CUSTOM_N, OP_SH_CUSTOM_N): Delete.
(OP_<insn>, OPX_<insn>, OP_MATCH_<insn>, OPX_MATCH_<insn>): Delete.
(OP_MASK_<insn>, OP_MASK): Delete.
(GET_IW_A, GET_IW_B, GET_IW_C, GET_IW_CONTROL_REGNUM): Delete.
(GET_IW_IMM16, GET_IW_IMM26, GET_IW_OP, GET_IW_OPX): Delete.
Include nios2r1.h to define new instruction opcode constants
and accessors.
(nios2_builtin_opcodes): Rename to nios2_r1_opcodes.
(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
(NUMOPCODES, NUMREGISTERS): Delete.
* nios2r1.h: New file.
opcodes/
* nios2-opc.c (nios2_builtin_regs): Add regtype field initializers.
(nios2_builtin_opcodes): Rename to nios2_r1_opcodes. Use new
MATCH_R1_<insn> and MASK_R1_<insn> macros in initializers. Add
size and format initializers. Merge 'b' arguments into 'j'.
(NIOS2_NUM_OPCODES): Adjust definition.
(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
(nios2_opcodes): Adjust.
(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
* nios2-dis.c (INSNLEN): Update comment.
(nios2_hash_init, nios2_hash): Delete.
(OPCODE_HASH_SIZE): New.
(nios2_r1_extract_opcode): New.
(nios2_disassembler_state): New.
(nios2_r1_disassembler_state): New.
(nios2_init_opcode_hash): Add state parameter. Adjust to use it.
(nios2_find_opcode_hash): Use state object.
(bad_opcode): New.
(nios2_print_insn_arg): Add op parameter. Use it to access
format. Remove 'b' case.
(nios2_disassemble): Remove special case for nop. Remove
hard-coded instruction size.
gas/
* config/tc-nios2.c (nios2_insn_infoS): Add constant_bits field.
(nios2_arg_infoS, nios2_arg_hash, nios2_arg_lookup): Delete.
(nios2_control_register_arg_p): Delete.
(nios2_coproc_reg): Delete.
(nios2_relax_frag): Remove hard-coded instruction size.
(md_convert_frag): Use new insn accessor macros.
(nios2_diagnose_overflow): Remove hard-coded instruction size.
(md_apply_fix): Likewise.
(bad_opcode): New.
(nios2_parse_reg): New.
(nios2_assemble_expression): Remove prev_reloc parameter. Adjust
uses and callers.
(nios2_assemble_arg_c): New.
(nios2_assemble_arg_d): New.
(nios2_assemble_arg_s): New.
(nios2_assemble_arg_t): New.
(nios2_assemble_arg_i): New.
(nios2_assemble_arg_u): New.
(nios2_assemble_arg_o): New.
(nios2_assemble_arg_j): New.
(nios2_assemble_arg_l): New.
(nios2_assemble_arg_m): New.
(nios2_assemble_args): New.
(nios2_assemble_args_dst): Delete.
(nios2_assemble_args_tsi): Delete.
(nios2_assemble_args_tsu): Delete.
(nios2_assemble_args_sto): Delete.
(nios2_assemble_args_o): Delete.
(nios2_assemble_args_is): Delete.
(nios2_assemble_args_m): Delete.
(nios2_assemble_args_s): Delete.
(nios2_assemble_args_tis): Delete.
(nios2_assemble_args_dc): Delete.
(nios2_assemble_args_cs): Delete.
(nios2_assemble_args_ds): Delete.
(nios2_assemble_args_ldst): Delete.
(nios2_assemble_args_none): Delete.
(nios2_assemble_args_dsj): Delete.
(nios2_assemble_args_d): Delete.
(nios2_assemble_args_b): Delete.
(nios2_arg_info_structs): Delete.
(NIOS2_NUM_ARGS): Delete.
(nios2_consume_arg): Remove insn parameter. Use new macros.
Don't check register arguments here. Remove 'b' case.
(nios2_consume_separator): Move check for missing separators to...
(nios2_parse_args): ...here. Remove special case for optional
arguments.
(output_insn): Avoid using hard-coded insn size.
(output_ubranch): Likewise.
(output_cbranch): Likewise.
(output_call): Use new macros.
(output_addi): Likewise.
(output_ori): Likewise.
(output_xori): Likewise.
(output_movia): Likewise.
(md_begin): Remove nios2_arg_info_structs initialization.
(md_assemble): Initialize constant_bits field. Use
nios2_parse_args instead of looking up parse function in hash table.
gdb/
* nios2-tdep.c (nios2_analyze_prologue): Use new instruction field
accessors and constants from nios2 opcodes update.
(nios2_get_next_pc): Likewise.
2014-10-23 18:54:15 +02:00
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/* Nios II R1 opcode list for GAS, the GNU assembler.
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2015-01-01 15:15:26 +01:00
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Copyright (C) 2013-2015 Free Software Foundation, Inc.
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Refactoring/cleanup of nios2 opcodes and assembler code.
2014-10-23 Sandra Loosemore <sandra@codesourcery.com>
include/opcode/
* nios2.h (enum iw_format_type): New.
(struct nios2_opcode): Update comments. Add size and format fields.
(NIOS2_INSN_OPTARG): New.
(REG_NORMAL, REG_CONTROL, REG_COPROCESSOR): New.
(struct nios2_reg): Add regtype field.
(GET_INSN_FIELD, SET_INSN_FIELD): Delete.
(IW_A_LSB, IW_A_MSB, IW_A_SZ, IW_A_MASK): Delete.
(IW_B_LSB, IW_B_MSB, IW_B_SZ, IW_B_MASK): Delete.
(IW_C_LSB, IW_C_MSB, IW_C_SZ, IW_C_MASK): Delete.
(IW_IMM16_LSB, IW_IMM16_MSB, IW_IMM16_SZ, IW_IMM16_MASK): Delete.
(IW_IMM26_LSB, IW_IMM26_MSB, IW_IMM26_SZ, IW_IMM26_MASK): Delete.
(IW_OP_LSB, IW_OP_MSB, IW_OP_SZ, IW_OP_MASK): Delete.
(IW_OPX_LSB, IW_OPX_MSB, IW_OPX_SZ, IW_OPX_MASK): Delete.
(IW_SHIFT_IMM5_LSB, IW_SHIFT_IMM5_MSB): Delete.
(IW_SHIFT_IMM5_SZ, IW_SHIFT_IMM5_MASK): Delete.
(IW_CONTROL_REGNUM_LSB, IW_CONTROL_REGNUM_MSB): Delete.
(IW_CONTROL_REGNUM_SZ, IW_CONTROL_REGNUM_MASK): Delete.
(OP_MASK_OP, OP_SH_OP): Delete.
(OP_MASK_IOP, OP_SH_IOP): Delete.
(OP_MASK_IRD, OP_SH_IRD): Delete.
(OP_MASK_IRT, OP_SH_IRT): Delete.
(OP_MASK_IRS, OP_SH_IRS): Delete.
(OP_MASK_ROP, OP_SH_ROP): Delete.
(OP_MASK_RRD, OP_SH_RRD): Delete.
(OP_MASK_RRT, OP_SH_RRT): Delete.
(OP_MASK_RRS, OP_SH_RRS): Delete.
(OP_MASK_JOP, OP_SH_JOP): Delete.
(OP_MASK_IMM26, OP_SH_IMM26): Delete.
(OP_MASK_RCTL, OP_SH_RCTL): Delete.
(OP_MASK_IMM5, OP_SH_IMM5): Delete.
(OP_MASK_CACHE_OPX, OP_SH_CACHE_OPX): Delete.
(OP_MASK_CACHE_RRS, OP_SH_CACHE_RRS): Delete.
(OP_MASK_CUSTOM_A, OP_SH_CUSTOM_A): Delete.
(OP_MASK_CUSTOM_B, OP_SH_CUSTOM_B): Delete.
(OP_MASK_CUSTOM_C, OP_SH_CUSTOM_C): Delete.
(OP_MASK_CUSTOM_N, OP_SH_CUSTOM_N): Delete.
(OP_<insn>, OPX_<insn>, OP_MATCH_<insn>, OPX_MATCH_<insn>): Delete.
(OP_MASK_<insn>, OP_MASK): Delete.
(GET_IW_A, GET_IW_B, GET_IW_C, GET_IW_CONTROL_REGNUM): Delete.
(GET_IW_IMM16, GET_IW_IMM26, GET_IW_OP, GET_IW_OPX): Delete.
Include nios2r1.h to define new instruction opcode constants
and accessors.
(nios2_builtin_opcodes): Rename to nios2_r1_opcodes.
(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
(NUMOPCODES, NUMREGISTERS): Delete.
* nios2r1.h: New file.
opcodes/
* nios2-opc.c (nios2_builtin_regs): Add regtype field initializers.
(nios2_builtin_opcodes): Rename to nios2_r1_opcodes. Use new
MATCH_R1_<insn> and MASK_R1_<insn> macros in initializers. Add
size and format initializers. Merge 'b' arguments into 'j'.
(NIOS2_NUM_OPCODES): Adjust definition.
(bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes.
(nios2_opcodes): Adjust.
(bfd_nios2_num_opcodes): Rename to nios2_num_opcodes.
* nios2-dis.c (INSNLEN): Update comment.
(nios2_hash_init, nios2_hash): Delete.
(OPCODE_HASH_SIZE): New.
(nios2_r1_extract_opcode): New.
(nios2_disassembler_state): New.
(nios2_r1_disassembler_state): New.
(nios2_init_opcode_hash): Add state parameter. Adjust to use it.
(nios2_find_opcode_hash): Use state object.
(bad_opcode): New.
(nios2_print_insn_arg): Add op parameter. Use it to access
format. Remove 'b' case.
(nios2_disassemble): Remove special case for nop. Remove
hard-coded instruction size.
gas/
* config/tc-nios2.c (nios2_insn_infoS): Add constant_bits field.
(nios2_arg_infoS, nios2_arg_hash, nios2_arg_lookup): Delete.
(nios2_control_register_arg_p): Delete.
(nios2_coproc_reg): Delete.
(nios2_relax_frag): Remove hard-coded instruction size.
(md_convert_frag): Use new insn accessor macros.
(nios2_diagnose_overflow): Remove hard-coded instruction size.
(md_apply_fix): Likewise.
(bad_opcode): New.
(nios2_parse_reg): New.
(nios2_assemble_expression): Remove prev_reloc parameter. Adjust
uses and callers.
(nios2_assemble_arg_c): New.
(nios2_assemble_arg_d): New.
(nios2_assemble_arg_s): New.
(nios2_assemble_arg_t): New.
(nios2_assemble_arg_i): New.
(nios2_assemble_arg_u): New.
(nios2_assemble_arg_o): New.
(nios2_assemble_arg_j): New.
(nios2_assemble_arg_l): New.
(nios2_assemble_arg_m): New.
(nios2_assemble_args): New.
(nios2_assemble_args_dst): Delete.
(nios2_assemble_args_tsi): Delete.
(nios2_assemble_args_tsu): Delete.
(nios2_assemble_args_sto): Delete.
(nios2_assemble_args_o): Delete.
(nios2_assemble_args_is): Delete.
(nios2_assemble_args_m): Delete.
(nios2_assemble_args_s): Delete.
(nios2_assemble_args_tis): Delete.
(nios2_assemble_args_dc): Delete.
(nios2_assemble_args_cs): Delete.
(nios2_assemble_args_ds): Delete.
(nios2_assemble_args_ldst): Delete.
(nios2_assemble_args_none): Delete.
(nios2_assemble_args_dsj): Delete.
(nios2_assemble_args_d): Delete.
(nios2_assemble_args_b): Delete.
(nios2_arg_info_structs): Delete.
(NIOS2_NUM_ARGS): Delete.
(nios2_consume_arg): Remove insn parameter. Use new macros.
Don't check register arguments here. Remove 'b' case.
(nios2_consume_separator): Move check for missing separators to...
(nios2_parse_args): ...here. Remove special case for optional
arguments.
(output_insn): Avoid using hard-coded insn size.
(output_ubranch): Likewise.
(output_cbranch): Likewise.
(output_call): Use new macros.
(output_addi): Likewise.
(output_ori): Likewise.
(output_xori): Likewise.
(output_movia): Likewise.
(md_begin): Remove nios2_arg_info_structs initialization.
(md_assemble): Initialize constant_bits field. Use
nios2_parse_args instead of looking up parse function in hash table.
gdb/
* nios2-tdep.c (nios2_analyze_prologue): Use new instruction field
accessors and constants from nios2 opcodes update.
(nios2_get_next_pc): Likewise.
2014-10-23 18:54:15 +02:00
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Contributed by Mentor Graphics, Inc.
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This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
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GAS/GDB is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS/GDB is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS or GDB; see the file COPYING3. If not, write to
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the Free Software Foundation, 51 Franklin Street - Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#ifndef _NIOS2R1_H_
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#define _NIOS2R1_H_
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/* R1 fields. */
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#define IW_R1_OP_LSB 0
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#define IW_R1_OP_SIZE 6
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#define IW_R1_OP_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R1_OP_SIZE))
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#define IW_R1_OP_SHIFTED_MASK (IW_R1_OP_UNSHIFTED_MASK << IW_R1_OP_LSB)
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#define GET_IW_R1_OP(W) (((W) >> IW_R1_OP_LSB) & IW_R1_OP_UNSHIFTED_MASK)
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#define SET_IW_R1_OP(V) (((V) & IW_R1_OP_UNSHIFTED_MASK) << IW_R1_OP_LSB)
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#define IW_I_A_LSB 27
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#define IW_I_A_SIZE 5
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#define IW_I_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_I_A_SIZE))
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#define IW_I_A_SHIFTED_MASK (IW_I_A_UNSHIFTED_MASK << IW_I_A_LSB)
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#define GET_IW_I_A(W) (((W) >> IW_I_A_LSB) & IW_I_A_UNSHIFTED_MASK)
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#define SET_IW_I_A(V) (((V) & IW_I_A_UNSHIFTED_MASK) << IW_I_A_LSB)
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#define IW_I_B_LSB 22
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#define IW_I_B_SIZE 5
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#define IW_I_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_I_B_SIZE))
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#define IW_I_B_SHIFTED_MASK (IW_I_B_UNSHIFTED_MASK << IW_I_B_LSB)
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#define GET_IW_I_B(W) (((W) >> IW_I_B_LSB) & IW_I_B_UNSHIFTED_MASK)
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#define SET_IW_I_B(V) (((V) & IW_I_B_UNSHIFTED_MASK) << IW_I_B_LSB)
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#define IW_I_IMM16_LSB 6
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#define IW_I_IMM16_SIZE 16
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#define IW_I_IMM16_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_I_IMM16_SIZE))
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#define IW_I_IMM16_SHIFTED_MASK (IW_I_IMM16_UNSHIFTED_MASK << IW_I_IMM16_LSB)
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#define GET_IW_I_IMM16(W) (((W) >> IW_I_IMM16_LSB) & IW_I_IMM16_UNSHIFTED_MASK)
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#define SET_IW_I_IMM16(V) (((V) & IW_I_IMM16_UNSHIFTED_MASK) << IW_I_IMM16_LSB)
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#define IW_R_A_LSB 27
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#define IW_R_A_SIZE 5
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#define IW_R_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_A_SIZE))
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#define IW_R_A_SHIFTED_MASK (IW_R_A_UNSHIFTED_MASK << IW_R_A_LSB)
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#define GET_IW_R_A(W) (((W) >> IW_R_A_LSB) & IW_R_A_UNSHIFTED_MASK)
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#define SET_IW_R_A(V) (((V) & IW_R_A_UNSHIFTED_MASK) << IW_R_A_LSB)
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#define IW_R_B_LSB 22
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#define IW_R_B_SIZE 5
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#define IW_R_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_B_SIZE))
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#define IW_R_B_SHIFTED_MASK (IW_R_B_UNSHIFTED_MASK << IW_R_B_LSB)
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#define GET_IW_R_B(W) (((W) >> IW_R_B_LSB) & IW_R_B_UNSHIFTED_MASK)
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#define SET_IW_R_B(V) (((V) & IW_R_B_UNSHIFTED_MASK) << IW_R_B_LSB)
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#define IW_R_C_LSB 17
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#define IW_R_C_SIZE 5
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#define IW_R_C_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_C_SIZE))
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#define IW_R_C_SHIFTED_MASK (IW_R_C_UNSHIFTED_MASK << IW_R_C_LSB)
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#define GET_IW_R_C(W) (((W) >> IW_R_C_LSB) & IW_R_C_UNSHIFTED_MASK)
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#define SET_IW_R_C(V) (((V) & IW_R_C_UNSHIFTED_MASK) << IW_R_C_LSB)
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#define IW_R_OPX_LSB 11
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#define IW_R_OPX_SIZE 6
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#define IW_R_OPX_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_OPX_SIZE))
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#define IW_R_OPX_SHIFTED_MASK (IW_R_OPX_UNSHIFTED_MASK << IW_R_OPX_LSB)
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#define GET_IW_R_OPX(W) (((W) >> IW_R_OPX_LSB) & IW_R_OPX_UNSHIFTED_MASK)
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#define SET_IW_R_OPX(V) (((V) & IW_R_OPX_UNSHIFTED_MASK) << IW_R_OPX_LSB)
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#define IW_R_IMM5_LSB 6
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#define IW_R_IMM5_SIZE 5
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#define IW_R_IMM5_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_R_IMM5_SIZE))
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#define IW_R_IMM5_SHIFTED_MASK (IW_R_IMM5_UNSHIFTED_MASK << IW_R_IMM5_LSB)
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#define GET_IW_R_IMM5(W) (((W) >> IW_R_IMM5_LSB) & IW_R_IMM5_UNSHIFTED_MASK)
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#define SET_IW_R_IMM5(V) (((V) & IW_R_IMM5_UNSHIFTED_MASK) << IW_R_IMM5_LSB)
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#define IW_J_IMM26_LSB 6
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#define IW_J_IMM26_SIZE 26
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#define IW_J_IMM26_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_J_IMM26_SIZE))
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#define IW_J_IMM26_SHIFTED_MASK (IW_J_IMM26_UNSHIFTED_MASK << IW_J_IMM26_LSB)
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#define GET_IW_J_IMM26(W) (((W) >> IW_J_IMM26_LSB) & IW_J_IMM26_UNSHIFTED_MASK)
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#define SET_IW_J_IMM26(V) (((V) & IW_J_IMM26_UNSHIFTED_MASK) << IW_J_IMM26_LSB)
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#define IW_CUSTOM_A_LSB 27
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#define IW_CUSTOM_A_SIZE 5
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#define IW_CUSTOM_A_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_A_SIZE))
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#define IW_CUSTOM_A_SHIFTED_MASK (IW_CUSTOM_A_UNSHIFTED_MASK << IW_CUSTOM_A_LSB)
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#define GET_IW_CUSTOM_A(W) (((W) >> IW_CUSTOM_A_LSB) & IW_CUSTOM_A_UNSHIFTED_MASK)
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#define SET_IW_CUSTOM_A(V) (((V) & IW_CUSTOM_A_UNSHIFTED_MASK) << IW_CUSTOM_A_LSB)
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#define IW_CUSTOM_B_LSB 22
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#define IW_CUSTOM_B_SIZE 5
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#define IW_CUSTOM_B_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_B_SIZE))
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#define IW_CUSTOM_B_SHIFTED_MASK (IW_CUSTOM_B_UNSHIFTED_MASK << IW_CUSTOM_B_LSB)
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#define GET_IW_CUSTOM_B(W) (((W) >> IW_CUSTOM_B_LSB) & IW_CUSTOM_B_UNSHIFTED_MASK)
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#define SET_IW_CUSTOM_B(V) (((V) & IW_CUSTOM_B_UNSHIFTED_MASK) << IW_CUSTOM_B_LSB)
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#define IW_CUSTOM_C_LSB 17
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#define IW_CUSTOM_C_SIZE 5
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#define IW_CUSTOM_C_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_C_SIZE))
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#define IW_CUSTOM_C_SHIFTED_MASK (IW_CUSTOM_C_UNSHIFTED_MASK << IW_CUSTOM_C_LSB)
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#define GET_IW_CUSTOM_C(W) (((W) >> IW_CUSTOM_C_LSB) & IW_CUSTOM_C_UNSHIFTED_MASK)
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#define SET_IW_CUSTOM_C(V) (((V) & IW_CUSTOM_C_UNSHIFTED_MASK) << IW_CUSTOM_C_LSB)
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#define IW_CUSTOM_READA_LSB 16
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#define IW_CUSTOM_READA_SIZE 1
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#define IW_CUSTOM_READA_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_READA_SIZE))
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#define IW_CUSTOM_READA_SHIFTED_MASK (IW_CUSTOM_READA_UNSHIFTED_MASK << IW_CUSTOM_READA_LSB)
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#define GET_IW_CUSTOM_READA(W) (((W) >> IW_CUSTOM_READA_LSB) & IW_CUSTOM_READA_UNSHIFTED_MASK)
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#define SET_IW_CUSTOM_READA(V) (((V) & IW_CUSTOM_READA_UNSHIFTED_MASK) << IW_CUSTOM_READA_LSB)
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#define IW_CUSTOM_READB_LSB 15
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#define IW_CUSTOM_READB_SIZE 1
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#define IW_CUSTOM_READB_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_READB_SIZE))
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#define IW_CUSTOM_READB_SHIFTED_MASK (IW_CUSTOM_READB_UNSHIFTED_MASK << IW_CUSTOM_READB_LSB)
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#define GET_IW_CUSTOM_READB(W) (((W) >> IW_CUSTOM_READB_LSB) & IW_CUSTOM_READB_UNSHIFTED_MASK)
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#define SET_IW_CUSTOM_READB(V) (((V) & IW_CUSTOM_READB_UNSHIFTED_MASK) << IW_CUSTOM_READB_LSB)
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#define IW_CUSTOM_READC_LSB 14
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#define IW_CUSTOM_READC_SIZE 1
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#define IW_CUSTOM_READC_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_READC_SIZE))
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#define IW_CUSTOM_READC_SHIFTED_MASK (IW_CUSTOM_READC_UNSHIFTED_MASK << IW_CUSTOM_READC_LSB)
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#define GET_IW_CUSTOM_READC(W) (((W) >> IW_CUSTOM_READC_LSB) & IW_CUSTOM_READC_UNSHIFTED_MASK)
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#define SET_IW_CUSTOM_READC(V) (((V) & IW_CUSTOM_READC_UNSHIFTED_MASK) << IW_CUSTOM_READC_LSB)
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#define IW_CUSTOM_N_LSB 6
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#define IW_CUSTOM_N_SIZE 8
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#define IW_CUSTOM_N_UNSHIFTED_MASK (0xffffffffu >> (32 - IW_CUSTOM_N_SIZE))
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#define IW_CUSTOM_N_SHIFTED_MASK (IW_CUSTOM_N_UNSHIFTED_MASK << IW_CUSTOM_N_LSB)
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#define GET_IW_CUSTOM_N(W) (((W) >> IW_CUSTOM_N_LSB) & IW_CUSTOM_N_UNSHIFTED_MASK)
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#define SET_IW_CUSTOM_N(V) (((V) & IW_CUSTOM_N_UNSHIFTED_MASK) << IW_CUSTOM_N_LSB)
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/* R1 opcodes. */
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#define R1_OP_CALL 0
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#define R1_OP_JMPI 1
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#define R1_OP_LDBU 3
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#define R1_OP_ADDI 4
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#define R1_OP_STB 5
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#define R1_OP_BR 6
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#define R1_OP_LDB 7
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#define R1_OP_CMPGEI 8
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#define R1_OP_LDHU 11
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#define R1_OP_ANDI 12
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#define R1_OP_STH 13
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#define R1_OP_BGE 14
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#define R1_OP_LDH 15
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#define R1_OP_CMPLTI 16
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#define R1_OP_INITDA 19
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#define R1_OP_ORI 20
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#define R1_OP_STW 21
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#define R1_OP_BLT 22
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#define R1_OP_LDW 23
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#define R1_OP_CMPNEI 24
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#define R1_OP_FLUSHDA 27
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#define R1_OP_XORI 28
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#define R1_OP_BNE 30
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#define R1_OP_CMPEQI 32
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#define R1_OP_LDBUIO 35
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#define R1_OP_MULI 36
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#define R1_OP_STBIO 37
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#define R1_OP_BEQ 38
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#define R1_OP_LDBIO 39
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#define R1_OP_CMPGEUI 40
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#define R1_OP_LDHUIO 43
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#define R1_OP_ANDHI 44
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#define R1_OP_STHIO 45
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#define R1_OP_BGEU 46
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#define R1_OP_LDHIO 47
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#define R1_OP_CMPLTUI 48
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#define R1_OP_CUSTOM 50
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#define R1_OP_INITD 51
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#define R1_OP_ORHI 52
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#define R1_OP_STWIO 53
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#define R1_OP_BLTU 54
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#define R1_OP_LDWIO 55
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#define R1_OP_RDPRS 56
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#define R1_OP_OPX 58
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#define R1_OP_FLUSHD 59
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#define R1_OP_XORHI 60
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#define R1_OPX_ERET 1
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#define R1_OPX_ROLI 2
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#define R1_OPX_ROL 3
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#define R1_OPX_FLUSHP 4
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#define R1_OPX_RET 5
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#define R1_OPX_NOR 6
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#define R1_OPX_MULXUU 7
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#define R1_OPX_CMPGE 8
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#define R1_OPX_BRET 9
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#define R1_OPX_ROR 11
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#define R1_OPX_FLUSHI 12
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#define R1_OPX_JMP 13
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#define R1_OPX_AND 14
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#define R1_OPX_CMPLT 16
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#define R1_OPX_SLLI 18
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#define R1_OPX_SLL 19
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#define R1_OPX_WRPRS 20
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#define R1_OPX_OR 22
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#define R1_OPX_MULXSU 23
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#define R1_OPX_CMPNE 24
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#define R1_OPX_SRLI 26
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#define R1_OPX_SRL 27
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#define R1_OPX_NEXTPC 28
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#define R1_OPX_CALLR 29
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#define R1_OPX_XOR 30
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#define R1_OPX_MULXSS 31
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#define R1_OPX_CMPEQ 32
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#define R1_OPX_DIVU 36
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#define R1_OPX_DIV 37
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#define R1_OPX_RDCTL 38
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#define R1_OPX_MUL 39
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#define R1_OPX_CMPGEU 40
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#define R1_OPX_INITI 41
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#define R1_OPX_TRAP 45
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#define R1_OPX_WRCTL 46
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#define R1_OPX_CMPLTU 48
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#define R1_OPX_ADD 49
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#define R1_OPX_BREAK 52
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#define R1_OPX_SYNC 54
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#define R1_OPX_SUB 57
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#define R1_OPX_SRAI 58
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#define R1_OPX_SRA 59
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/* Some convenience macros for R1 encodings, for use in instruction tables.
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MATCH_R1_OPX0(NAME) and MASK_R1_OPX0 are used for R-type instructions
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with 3 register operands and constant 0 in the immediate field.
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The general forms are MATCH_R1_OPX(NAME, A, B, C) where the arguments specify
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constant values and MASK_R1_OPX(A, B, C, N) where the arguments are booleans
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that are true if the field should be included in the mask.
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*/
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#define MATCH_R1_OP(NAME) \
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(SET_IW_R1_OP (R1_OP_##NAME))
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#define MASK_R1_OP \
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IW_R1_OP_SHIFTED_MASK
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#define MATCH_R1_OPX0(NAME) \
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(SET_IW_R1_OP (R1_OP_OPX) | SET_IW_R_OPX (R1_OPX_##NAME))
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#define MASK_R1_OPX0 \
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(IW_R1_OP_SHIFTED_MASK | IW_R_OPX_SHIFTED_MASK | IW_R_IMM5_SHIFTED_MASK)
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#define MATCH_R1_OPX(NAME, A, B, C) \
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(MATCH_R1_OPX0 (NAME) | SET_IW_R_A (A) | SET_IW_R_B (B) | SET_IW_R_C (C))
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#define MASK_R1_OPX(A, B, C, N) \
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(IW_R1_OP_SHIFTED_MASK | IW_R_OPX_SHIFTED_MASK \
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| (A ? IW_R_A_SHIFTED_MASK : 0) \
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| (B ? IW_R_B_SHIFTED_MASK : 0) \
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| (C ? IW_R_C_SHIFTED_MASK : 0) \
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| (N ? IW_R_IMM5_SHIFTED_MASK : 0))
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/* And here's the match/mask macros for the R1 instruction set. */
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#define MATCH_R1_ADD MATCH_R1_OPX0 (ADD)
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#define MASK_R1_ADD MASK_R1_OPX0
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#define MATCH_R1_ADDI MATCH_R1_OP (ADDI)
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#define MASK_R1_ADDI MASK_R1_OP
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#define MATCH_R1_AND MATCH_R1_OPX0 (AND)
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#define MASK_R1_AND MASK_R1_OPX0
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#define MATCH_R1_ANDHI MATCH_R1_OP (ANDHI)
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#define MASK_R1_ANDHI MASK_R1_OP
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#define MATCH_R1_ANDI MATCH_R1_OP (ANDI)
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#define MASK_R1_ANDI MASK_R1_OP
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#define MATCH_R1_BEQ MATCH_R1_OP (BEQ)
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#define MASK_R1_BEQ MASK_R1_OP
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#define MATCH_R1_BGE MATCH_R1_OP (BGE)
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#define MASK_R1_BGE MASK_R1_OP
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#define MATCH_R1_BGEU MATCH_R1_OP (BGEU)
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#define MASK_R1_BGEU MASK_R1_OP
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#define MATCH_R1_BGT MATCH_R1_OP (BLT)
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#define MASK_R1_BGT MASK_R1_OP
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#define MATCH_R1_BGTU MATCH_R1_OP (BLTU)
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#define MASK_R1_BGTU MASK_R1_OP
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#define MATCH_R1_BLE MATCH_R1_OP (BGE)
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#define MASK_R1_BLE MASK_R1_OP
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#define MATCH_R1_BLEU MATCH_R1_OP (BGEU)
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#define MASK_R1_BLEU MASK_R1_OP
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#define MATCH_R1_BLT MATCH_R1_OP (BLT)
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#define MASK_R1_BLT MASK_R1_OP
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#define MATCH_R1_BLTU MATCH_R1_OP (BLTU)
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#define MASK_R1_BLTU MASK_R1_OP
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#define MATCH_R1_BNE MATCH_R1_OP (BNE)
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#define MASK_R1_BNE MASK_R1_OP
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#define MATCH_R1_BR MATCH_R1_OP (BR)
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#define MASK_R1_BR MASK_R1_OP | IW_I_A_SHIFTED_MASK | IW_I_B_SHIFTED_MASK
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#define MATCH_R1_BREAK MATCH_R1_OPX (BREAK, 0, 0, 0x1e)
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#define MASK_R1_BREAK MASK_R1_OPX (1, 1, 1, 0)
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#define MATCH_R1_BRET MATCH_R1_OPX (BRET, 0x1e, 0, 0)
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#define MASK_R1_BRET MASK_R1_OPX (1, 1, 1, 1)
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#define MATCH_R1_CALL MATCH_R1_OP (CALL)
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#define MASK_R1_CALL MASK_R1_OP
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#define MATCH_R1_CALLR MATCH_R1_OPX (CALLR, 0, 0, 0x1f)
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#define MASK_R1_CALLR MASK_R1_OPX (0, 1, 1, 1)
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#define MATCH_R1_CMPEQ MATCH_R1_OPX0 (CMPEQ)
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#define MASK_R1_CMPEQ MASK_R1_OPX0
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#define MATCH_R1_CMPEQI MATCH_R1_OP (CMPEQI)
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#define MASK_R1_CMPEQI MASK_R1_OP
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#define MATCH_R1_CMPGE MATCH_R1_OPX0 (CMPGE)
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#define MASK_R1_CMPGE MASK_R1_OPX0
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#define MATCH_R1_CMPGEI MATCH_R1_OP (CMPGEI)
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#define MASK_R1_CMPGEI MASK_R1_OP
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#define MATCH_R1_CMPGEU MATCH_R1_OPX0 (CMPGEU)
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#define MASK_R1_CMPGEU MASK_R1_OPX0
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#define MATCH_R1_CMPGEUI MATCH_R1_OP (CMPGEUI)
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#define MASK_R1_CMPGEUI MASK_R1_OP
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#define MATCH_R1_CMPGT MATCH_R1_OPX0 (CMPLT)
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#define MASK_R1_CMPGT MASK_R1_OPX0
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#define MATCH_R1_CMPGTI MATCH_R1_OP (CMPGEI)
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#define MASK_R1_CMPGTI MASK_R1_OP
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#define MATCH_R1_CMPGTU MATCH_R1_OPX0 (CMPLTU)
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#define MASK_R1_CMPGTU MASK_R1_OPX0
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#define MATCH_R1_CMPGTUI MATCH_R1_OP (CMPGEUI)
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#define MASK_R1_CMPGTUI MASK_R1_OP
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#define MATCH_R1_CMPLE MATCH_R1_OPX0 (CMPGE)
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#define MASK_R1_CMPLE MASK_R1_OPX0
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#define MATCH_R1_CMPLEI MATCH_R1_OP (CMPLTI)
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#define MASK_R1_CMPLEI MASK_R1_OP
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#define MATCH_R1_CMPLEU MATCH_R1_OPX0 (CMPGEU)
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#define MASK_R1_CMPLEU MASK_R1_OPX0
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#define MATCH_R1_CMPLEUI MATCH_R1_OP (CMPLTUI)
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#define MASK_R1_CMPLEUI MASK_R1_OP
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#define MATCH_R1_CMPLT MATCH_R1_OPX0 (CMPLT)
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#define MASK_R1_CMPLT MASK_R1_OPX0
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#define MATCH_R1_CMPLTI MATCH_R1_OP (CMPLTI)
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#define MASK_R1_CMPLTI MASK_R1_OP
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#define MATCH_R1_CMPLTU MATCH_R1_OPX0 (CMPLTU)
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#define MASK_R1_CMPLTU MASK_R1_OPX0
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#define MATCH_R1_CMPLTUI MATCH_R1_OP (CMPLTUI)
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#define MASK_R1_CMPLTUI MASK_R1_OP
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#define MATCH_R1_CMPNE MATCH_R1_OPX0 (CMPNE)
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#define MASK_R1_CMPNE MASK_R1_OPX0
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#define MATCH_R1_CMPNEI MATCH_R1_OP (CMPNEI)
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#define MASK_R1_CMPNEI MASK_R1_OP
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#define MATCH_R1_CUSTOM MATCH_R1_OP (CUSTOM)
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#define MASK_R1_CUSTOM MASK_R1_OP
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#define MATCH_R1_DIV MATCH_R1_OPX0 (DIV)
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#define MASK_R1_DIV MASK_R1_OPX0
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#define MATCH_R1_DIVU MATCH_R1_OPX0 (DIVU)
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#define MASK_R1_DIVU MASK_R1_OPX0
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#define MATCH_R1_ERET MATCH_R1_OPX (ERET, 0x1d, 0x1e, 0)
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#define MASK_R1_ERET MASK_R1_OPX (1, 1, 1, 1)
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#define MATCH_R1_FLUSHD MATCH_R1_OP (FLUSHD) | SET_IW_I_B (0)
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#define MASK_R1_FLUSHD MASK_R1_OP | IW_I_B_SHIFTED_MASK
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#define MATCH_R1_FLUSHDA MATCH_R1_OP (FLUSHDA) | SET_IW_I_B (0)
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#define MASK_R1_FLUSHDA MASK_R1_OP | IW_I_B_SHIFTED_MASK
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#define MATCH_R1_FLUSHI MATCH_R1_OPX (FLUSHI, 0, 0, 0)
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#define MASK_R1_FLUSHI MASK_R1_OPX (0, 1, 1, 1)
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#define MATCH_R1_FLUSHP MATCH_R1_OPX (FLUSHP, 0, 0, 0)
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#define MASK_R1_FLUSHP MASK_R1_OPX (1, 1, 1, 1)
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#define MATCH_R1_INITD MATCH_R1_OP (INITD) | SET_IW_I_B (0)
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#define MASK_R1_INITD MASK_R1_OP | IW_I_B_SHIFTED_MASK
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#define MATCH_R1_INITDA MATCH_R1_OP (INITDA) | SET_IW_I_B (0)
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#define MASK_R1_INITDA MASK_R1_OP | IW_I_B_SHIFTED_MASK
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#define MATCH_R1_INITI MATCH_R1_OPX (INITI, 0, 0, 0)
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#define MASK_R1_INITI MASK_R1_OPX (0, 1, 1, 1)
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#define MATCH_R1_JMP MATCH_R1_OPX (JMP, 0, 0, 0)
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#define MASK_R1_JMP MASK_R1_OPX (0, 1, 1, 1)
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#define MATCH_R1_JMPI MATCH_R1_OP (JMPI)
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#define MASK_R1_JMPI MASK_R1_OP
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#define MATCH_R1_LDB MATCH_R1_OP (LDB)
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#define MASK_R1_LDB MASK_R1_OP
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#define MATCH_R1_LDBIO MATCH_R1_OP (LDBIO)
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#define MASK_R1_LDBIO MASK_R1_OP
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#define MATCH_R1_LDBU MATCH_R1_OP (LDBU)
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#define MASK_R1_LDBU MASK_R1_OP
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#define MATCH_R1_LDBUIO MATCH_R1_OP (LDBUIO)
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#define MASK_R1_LDBUIO MASK_R1_OP
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#define MATCH_R1_LDH MATCH_R1_OP (LDH)
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#define MASK_R1_LDH MASK_R1_OP
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#define MATCH_R1_LDHIO MATCH_R1_OP (LDHIO)
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#define MASK_R1_LDHIO MASK_R1_OP
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#define MATCH_R1_LDHU MATCH_R1_OP (LDHU)
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#define MASK_R1_LDHU MASK_R1_OP
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#define MATCH_R1_LDHUIO MATCH_R1_OP (LDHUIO)
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#define MASK_R1_LDHUIO MASK_R1_OP
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#define MATCH_R1_LDW MATCH_R1_OP (LDW)
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#define MASK_R1_LDW MASK_R1_OP
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#define MATCH_R1_LDWIO MATCH_R1_OP (LDWIO)
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#define MASK_R1_LDWIO MASK_R1_OP
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#define MATCH_R1_MOV MATCH_R1_OPX (ADD, 0, 0, 0)
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#define MASK_R1_MOV MASK_R1_OPX (0, 1, 0, 1)
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#define MATCH_R1_MOVHI MATCH_R1_OP (ORHI) | SET_IW_I_A (0)
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#define MASK_R1_MOVHI MASK_R1_OP | IW_I_A_SHIFTED_MASK
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#define MATCH_R1_MOVI MATCH_R1_OP (ADDI) | SET_IW_I_A (0)
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#define MASK_R1_MOVI MASK_R1_OP | IW_I_A_SHIFTED_MASK
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#define MATCH_R1_MOVUI MATCH_R1_OP (ORI) | SET_IW_I_A (0)
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#define MASK_R1_MOVUI MASK_R1_OP | IW_I_A_SHIFTED_MASK
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#define MATCH_R1_MUL MATCH_R1_OPX0 (MUL)
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#define MASK_R1_MUL MASK_R1_OPX0
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#define MATCH_R1_MULI MATCH_R1_OP (MULI)
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#define MASK_R1_MULI MASK_R1_OP
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#define MATCH_R1_MULXSS MATCH_R1_OPX0 (MULXSS)
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#define MASK_R1_MULXSS MASK_R1_OPX0
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#define MATCH_R1_MULXSU MATCH_R1_OPX0 (MULXSU)
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#define MASK_R1_MULXSU MASK_R1_OPX0
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#define MATCH_R1_MULXUU MATCH_R1_OPX0 (MULXUU)
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#define MASK_R1_MULXUU MASK_R1_OPX0
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#define MATCH_R1_NEXTPC MATCH_R1_OPX (NEXTPC, 0, 0, 0)
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#define MASK_R1_NEXTPC MASK_R1_OPX (1, 1, 0, 1)
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#define MATCH_R1_NOP MATCH_R1_OPX (ADD, 0, 0, 0)
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#define MASK_R1_NOP MASK_R1_OPX (1, 1, 1, 1)
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#define MATCH_R1_NOR MATCH_R1_OPX0 (NOR)
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#define MASK_R1_NOR MASK_R1_OPX0
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#define MATCH_R1_OR MATCH_R1_OPX0 (OR)
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#define MASK_R1_OR MASK_R1_OPX0
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#define MATCH_R1_ORHI MATCH_R1_OP (ORHI)
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#define MASK_R1_ORHI MASK_R1_OP
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#define MATCH_R1_ORI MATCH_R1_OP (ORI)
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#define MASK_R1_ORI MASK_R1_OP
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#define MATCH_R1_RDCTL MATCH_R1_OPX (RDCTL, 0, 0, 0)
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#define MASK_R1_RDCTL MASK_R1_OPX (1, 1, 0, 0)
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#define MATCH_R1_RDPRS MATCH_R1_OP (RDPRS)
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#define MASK_R1_RDPRS MASK_R1_OP
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#define MATCH_R1_RET MATCH_R1_OPX (RET, 0x1f, 0, 0)
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#define MASK_R1_RET MASK_R1_OPX (1, 1, 1, 1)
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#define MATCH_R1_ROL MATCH_R1_OPX0 (ROL)
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#define MASK_R1_ROL MASK_R1_OPX0
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#define MATCH_R1_ROLI MATCH_R1_OPX (ROLI, 0, 0, 0)
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#define MASK_R1_ROLI MASK_R1_OPX (0, 1, 0, 0)
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#define MATCH_R1_ROR MATCH_R1_OPX0 (ROR)
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#define MASK_R1_ROR MASK_R1_OPX0
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#define MATCH_R1_SLL MATCH_R1_OPX0 (SLL)
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#define MASK_R1_SLL MASK_R1_OPX0
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#define MATCH_R1_SLLI MATCH_R1_OPX (SLLI, 0, 0, 0)
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#define MASK_R1_SLLI MASK_R1_OPX (0, 1, 0, 0)
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#define MATCH_R1_SRA MATCH_R1_OPX0 (SRA)
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#define MASK_R1_SRA MASK_R1_OPX0
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#define MATCH_R1_SRAI MATCH_R1_OPX (SRAI, 0, 0, 0)
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#define MASK_R1_SRAI MASK_R1_OPX (0, 1, 0, 0)
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#define MATCH_R1_SRL MATCH_R1_OPX0 (SRL)
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#define MASK_R1_SRL MASK_R1_OPX0
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#define MATCH_R1_SRLI MATCH_R1_OPX (SRLI, 0, 0, 0)
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#define MASK_R1_SRLI MASK_R1_OPX (0, 1, 0, 0)
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#define MATCH_R1_STB MATCH_R1_OP (STB)
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#define MASK_R1_STB MASK_R1_OP
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#define MATCH_R1_STBIO MATCH_R1_OP (STBIO)
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#define MASK_R1_STBIO MASK_R1_OP
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#define MATCH_R1_STH MATCH_R1_OP (STH)
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#define MASK_R1_STH MASK_R1_OP
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#define MATCH_R1_STHIO MATCH_R1_OP (STHIO)
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#define MASK_R1_STHIO MASK_R1_OP
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#define MATCH_R1_STW MATCH_R1_OP (STW)
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#define MASK_R1_STW MASK_R1_OP
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#define MATCH_R1_STWIO MATCH_R1_OP (STWIO)
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#define MASK_R1_STWIO MASK_R1_OP
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#define MATCH_R1_SUB MATCH_R1_OPX0 (SUB)
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#define MASK_R1_SUB MASK_R1_OPX0
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#define MATCH_R1_SUBI MATCH_R1_OP (ADDI)
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#define MASK_R1_SUBI MASK_R1_OP
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#define MATCH_R1_SYNC MATCH_R1_OPX (SYNC, 0, 0, 0)
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#define MASK_R1_SYNC MASK_R1_OPX (1, 1, 1, 1)
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#define MATCH_R1_TRAP MATCH_R1_OPX (TRAP, 0, 0, 0x1d)
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#define MASK_R1_TRAP MASK_R1_OPX (1, 1, 1, 0)
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#define MATCH_R1_WRCTL MATCH_R1_OPX (WRCTL, 0, 0, 0)
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#define MASK_R1_WRCTL MASK_R1_OPX (0, 1, 1, 0)
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#define MATCH_R1_WRPRS MATCH_R1_OPX (WRPRS, 0, 0, 0)
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#define MASK_R1_WRPRS MASK_R1_OPX (0, 1, 0, 1)
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#define MATCH_R1_XOR MATCH_R1_OPX0 (XOR)
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#define MASK_R1_XOR MASK_R1_OPX0
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#define MATCH_R1_XORHI MATCH_R1_OP (XORHI)
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#define MASK_R1_XORHI MASK_R1_OP
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#define MATCH_R1_XORI MATCH_R1_OP (XORI)
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#define MASK_R1_XORI MASK_R1_OP
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#endif /* _NIOS2R1_H */
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