2009-09-02 09:25:43 +02:00
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@c Copyright 2006, 2007, 2008, 2009
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2006-06-01 16:54:25 +02:00
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@c Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node AVR-Dependent
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@chapter AVR Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter AVR Dependent Features
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@end ifclear
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@cindex AVR support
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@menu
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* AVR Options:: Options
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* AVR Syntax:: Syntax
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* AVR Opcodes:: Opcodes
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@end menu
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@node AVR Options
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@section Options
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@cindex AVR options (none)
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@cindex options for AVR (none)
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@table @code
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@cindex @code{-mmcu=} command line option, AVR
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@item -mmcu=@var{mcu}
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Specify ATMEL AVR instruction set or MCU type.
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Instruction set avr1 is for the minimal AVR core, not supported by the C
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2007-10-31 19:11:28 +01:00
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compiler, only for assembler programs (MCU types: at90s1200,
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2006-06-01 16:54:25 +02:00
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attiny11, attiny12, attiny15, attiny28).
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Instruction set avr2 (default) is for the classic AVR core with up to
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Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 07:35:13 +02:00
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8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
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attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
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at90s8535).
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Instruction set avr25 is for the classic AVR core with up to 8K program memory
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space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
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2009-08-05 14:47:33 +02:00
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attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
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attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461, attiny861,
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attiny861a, attiny87, attiny43u, attiny48, attiny88, at86rf401, ata6289).
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2006-06-01 16:54:25 +02:00
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Instruction set avr3 is for the classic AVR core with up to 128K program
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Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 07:35:13 +02:00
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memory space (MCU types: at43usb355, at76c711).
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Instruction set avr31 is for the classic AVR core with exactly 128K program
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memory space (MCU types: atmega103, at43usb320).
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Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
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2009-08-01 18:17:23 +02:00
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instructions (MCU types: attiny167, attiny327, at90usb82, at90usb162, atmega8u2,
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atmega16u2, atmega32u2).
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2006-06-01 16:54:25 +02:00
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Instruction set avr4 is for the enhanced AVR core with up to 8K program
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2007-11-07 18:24:59 +01:00
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memory space (MCU types: atmega48, atmega48p,atmega8, atmega88, atmega88p,
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* config/tc-avr.c (mcu_types): Add attiny87, attiny327, atmega4hvd,
atmega8hvd, atmega16hvb, atmega32hvb, atmega64c1, atmega16m1,
atmega64m1, atmega32u6, atmega128rfa1, at90pwm81, at90scr100,
m3000f, m3000s and m3001b devices.
* doc/c-avr.texi: Likewise.
2008-12-23 10:51:38 +01:00
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atmega8515, atmega8535, atmega8hva, atmega4hvd, atmega8hvd, at90pwm1,
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2009-08-02 16:34:55 +02:00
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at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81, atmega8m1, atmega8c1).
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2006-06-01 16:54:25 +02:00
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Instruction set avr5 is for the enhanced AVR core with up to 128K program
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Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 07:35:13 +02:00
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memory space (MCU types: atmega16, atmega161, atmega162, atmega163, atmega164p,
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2009-08-02 16:34:55 +02:00
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atmega165, atmega165p, atmega168, atmega168p, atmega169, atmega169p, atmega16c1,
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atmega32, atmega323, atmega324p, atmega325, atmega325p, atmega3250, atmega3250p,
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Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 07:35:13 +02:00
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atmega328p, atmega329, atmega329p, atmega3290, atmega3290p, atmega406, atmega64,
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2009-08-05 14:47:33 +02:00
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atmega640, atmega644, atmega644p, atmega644pa, atmega645, atmega6450, atmega649,
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atmega6490, atmega16hva, atmega16hvb, atmega32hvb, at90can32, at90can64,
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at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1,
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atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at94k,
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at90scr100).
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Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 07:35:13 +02:00
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Instruction set avr51 is for the enhanced AVR core with exactly 128K program
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memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
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2009-01-26 14:38:52 +01:00
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atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000f, m3000s, m3001b).
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Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 07:35:13 +02:00
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Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
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atmega2560, atmega2561).
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2006-06-01 16:54:25 +02:00
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@cindex @code{-mall-opcodes} command line option, AVR
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@item -mall-opcodes
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Accept all AVR opcodes, even if not supported by @code{-mmcu}.
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@cindex @code{-mno-skip-bug} command line option, AVR
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@item -mno-skip-bug
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This option disable warnings for skipping two-word instructions.
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@cindex @code{-mno-wrap} command line option, AVR
|
|
|
|
@item -mno-wrap
|
|
|
|
This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
|
|
|
|
|
|
|
|
@end table
|
|
|
|
|
|
|
|
|
|
|
|
@node AVR Syntax
|
|
|
|
@section Syntax
|
|
|
|
@menu
|
|
|
|
* AVR-Chars:: Special Characters
|
|
|
|
* AVR-Regs:: Register Names
|
|
|
|
* AVR-Modifiers:: Relocatable Expression Modifiers
|
|
|
|
@end menu
|
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|
|
|
|
|
|
@node AVR-Chars
|
|
|
|
@subsection Special Characters
|
|
|
|
|
|
|
|
@cindex line comment character, AVR
|
|
|
|
@cindex AVR line comment character
|
|
|
|
|
|
|
|
The presence of a @samp{;} on a line indicates the start of a comment
|
|
|
|
that extends to the end of the current line. If a @samp{#} appears as
|
|
|
|
the first character of a line, the whole line is treated as a comment.
|
|
|
|
|
|
|
|
@cindex line separator, AVR
|
|
|
|
@cindex statement separator, AVR
|
|
|
|
@cindex AVR line separator
|
|
|
|
|
|
|
|
The @samp{$} character can be used instead of a newline to separate
|
|
|
|
statements.
|
|
|
|
|
|
|
|
@node AVR-Regs
|
|
|
|
@subsection Register Names
|
|
|
|
|
|
|
|
@cindex AVR register names
|
|
|
|
@cindex register names, AVR
|
|
|
|
|
2006-07-24 15:49:50 +02:00
|
|
|
The AVR has 32 x 8-bit general purpose working registers @samp{r0},
|
2006-06-01 16:54:25 +02:00
|
|
|
@samp{r1}, ... @samp{r31}.
|
|
|
|
Six of the 32 registers can be used as three 16-bit indirect address
|
|
|
|
register pointers for Data Space addressing. One of the these address
|
|
|
|
pointers can also be used as an address pointer for look up tables in
|
|
|
|
Flash program memory. These added function registers are the 16-bit
|
|
|
|
@samp{X}, @samp{Y} and @samp{Z} - registers.
|
|
|
|
|
|
|
|
@smallexample
|
|
|
|
X = @r{r26:r27}
|
|
|
|
Y = @r{r28:r29}
|
|
|
|
Z = @r{r30:r31}
|
|
|
|
@end smallexample
|
|
|
|
|
|
|
|
@node AVR-Modifiers
|
|
|
|
@subsection Relocatable Expression Modifiers
|
|
|
|
|
|
|
|
@cindex AVR modifiers
|
|
|
|
@cindex syntax, AVR
|
|
|
|
|
|
|
|
The assembler supports several modifiers when using relocatable addresses
|
|
|
|
in AVR instruction operands. The general syntax is the following:
|
|
|
|
|
|
|
|
@smallexample
|
|
|
|
modifier(relocatable-expression)
|
|
|
|
@end smallexample
|
|
|
|
|
|
|
|
@table @code
|
|
|
|
@cindex symbol modifiers
|
|
|
|
|
|
|
|
@item lo8
|
|
|
|
|
|
|
|
This modifier allows you to use bits 0 through 7 of
|
|
|
|
an address expression as 8 bit relocatable expression.
|
|
|
|
|
|
|
|
@item hi8
|
|
|
|
|
|
|
|
This modifier allows you to use bits 7 through 15 of an address expression
|
|
|
|
as 8 bit relocatable expression. This is useful with, for example, the
|
|
|
|
AVR @samp{ldi} instruction and @samp{lo8} modifier.
|
|
|
|
|
|
|
|
For example
|
|
|
|
|
|
|
|
@smallexample
|
|
|
|
ldi r26, lo8(sym+10)
|
|
|
|
ldi r27, hi8(sym+10)
|
|
|
|
@end smallexample
|
|
|
|
|
|
|
|
@item hh8
|
|
|
|
|
|
|
|
This modifier allows you to use bits 16 through 23 of
|
|
|
|
an address expression as 8 bit relocatable expression.
|
|
|
|
Also, can be useful for loading 32 bit constants.
|
|
|
|
|
|
|
|
@item hlo8
|
|
|
|
|
|
|
|
Synonym of @samp{hh8}.
|
|
|
|
|
|
|
|
@item hhi8
|
|
|
|
|
|
|
|
This modifier allows you to use bits 24 through 31 of
|
|
|
|
an expression as 8 bit expression. This is useful with, for example, the
|
|
|
|
AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
|
|
|
|
@samp{hhi8}, modifier.
|
|
|
|
|
|
|
|
For example
|
|
|
|
|
|
|
|
@smallexample
|
|
|
|
ldi r26, lo8(285774925)
|
|
|
|
ldi r27, hi8(285774925)
|
|
|
|
ldi r28, hlo8(285774925)
|
|
|
|
ldi r29, hhi8(285774925)
|
|
|
|
; r29,r28,r27,r26 = 285774925
|
|
|
|
@end smallexample
|
|
|
|
|
|
|
|
@item pm_lo8
|
|
|
|
|
|
|
|
This modifier allows you to use bits 0 through 7 of
|
|
|
|
an address expression as 8 bit relocatable expression.
|
|
|
|
This modifier useful for addressing data or code from
|
|
|
|
Flash/Program memory. The using of @samp{pm_lo8} similar
|
|
|
|
to @samp{lo8}.
|
|
|
|
|
|
|
|
@item pm_hi8
|
|
|
|
|
|
|
|
This modifier allows you to use bits 8 through 15 of
|
|
|
|
an address expression as 8 bit relocatable expression.
|
|
|
|
This modifier useful for addressing data or code from
|
|
|
|
Flash/Program memory.
|
|
|
|
|
|
|
|
@item pm_hh8
|
|
|
|
|
|
|
|
This modifier allows you to use bits 15 through 23 of
|
|
|
|
an address expression as 8 bit relocatable expression.
|
|
|
|
This modifier useful for addressing data or code from
|
|
|
|
Flash/Program memory.
|
|
|
|
|
|
|
|
@end table
|
|
|
|
|
|
|
|
@node AVR Opcodes
|
|
|
|
@section Opcodes
|
|
|
|
|
|
|
|
@cindex AVR opcode summary
|
|
|
|
@cindex opcode summary, AVR
|
|
|
|
@cindex mnemonics, AVR
|
|
|
|
@cindex instruction summary, AVR
|
|
|
|
For detailed information on the AVR machine instruction set, see
|
|
|
|
@url{www.atmel.com/products/AVR}.
|
|
|
|
|
|
|
|
@code{@value{AS}} implements all the standard AVR opcodes.
|
|
|
|
The following table summarizes the AVR opcodes, and their arguments.
|
|
|
|
|
|
|
|
@smallexample
|
|
|
|
@i{Legend:}
|
|
|
|
r @r{any register}
|
|
|
|
d @r{`ldi' register (r16-r31)}
|
|
|
|
v @r{`movw' even register (r0, r2, ..., r28, r30)}
|
|
|
|
a @r{`fmul' register (r16-r23)}
|
|
|
|
w @r{`adiw' register (r24,r26,r28,r30)}
|
|
|
|
e @r{pointer registers (X,Y,Z)}
|
|
|
|
b @r{base pointer register and displacement ([YZ]+disp)}
|
|
|
|
z @r{Z pointer register (for [e]lpm Rd,Z[+])}
|
|
|
|
M @r{immediate value from 0 to 255}
|
|
|
|
n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
|
|
|
|
s @r{immediate value from 0 to 7}
|
|
|
|
P @r{Port address value from 0 to 63. (in, out)}
|
|
|
|
p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
|
|
|
|
K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
|
|
|
|
i @r{immediate value}
|
|
|
|
l @r{signed pc relative offset from -64 to 63}
|
|
|
|
L @r{signed pc relative offset from -2048 to 2047}
|
|
|
|
h @r{absolute code address (call, jmp)}
|
|
|
|
S @r{immediate value from 0 to 7 (S = s << 4)}
|
|
|
|
? @r{use this opcode entry if no parameters, else use next opcode entry}
|
|
|
|
|
|
|
|
1001010010001000 clc
|
|
|
|
1001010011011000 clh
|
|
|
|
1001010011111000 cli
|
|
|
|
1001010010101000 cln
|
|
|
|
1001010011001000 cls
|
|
|
|
1001010011101000 clt
|
|
|
|
1001010010111000 clv
|
|
|
|
1001010010011000 clz
|
|
|
|
1001010000001000 sec
|
|
|
|
1001010001011000 seh
|
|
|
|
1001010001111000 sei
|
|
|
|
1001010000101000 sen
|
|
|
|
1001010001001000 ses
|
|
|
|
1001010001101000 set
|
|
|
|
1001010000111000 sev
|
|
|
|
1001010000011000 sez
|
|
|
|
100101001SSS1000 bclr S
|
|
|
|
100101000SSS1000 bset S
|
|
|
|
1001010100001001 icall
|
|
|
|
1001010000001001 ijmp
|
|
|
|
1001010111001000 lpm ?
|
|
|
|
1001000ddddd010+ lpm r,z
|
|
|
|
1001010111011000 elpm ?
|
|
|
|
1001000ddddd011+ elpm r,z
|
|
|
|
0000000000000000 nop
|
|
|
|
1001010100001000 ret
|
|
|
|
1001010100011000 reti
|
|
|
|
1001010110001000 sleep
|
|
|
|
1001010110011000 break
|
|
|
|
1001010110101000 wdr
|
|
|
|
1001010111101000 spm
|
|
|
|
000111rdddddrrrr adc r,r
|
|
|
|
000011rdddddrrrr add r,r
|
|
|
|
001000rdddddrrrr and r,r
|
|
|
|
000101rdddddrrrr cp r,r
|
|
|
|
000001rdddddrrrr cpc r,r
|
|
|
|
000100rdddddrrrr cpse r,r
|
|
|
|
001001rdddddrrrr eor r,r
|
|
|
|
001011rdddddrrrr mov r,r
|
|
|
|
100111rdddddrrrr mul r,r
|
|
|
|
001010rdddddrrrr or r,r
|
|
|
|
000010rdddddrrrr sbc r,r
|
|
|
|
000110rdddddrrrr sub r,r
|
|
|
|
001001rdddddrrrr clr r
|
|
|
|
000011rdddddrrrr lsl r
|
|
|
|
000111rdddddrrrr rol r
|
|
|
|
001000rdddddrrrr tst r
|
|
|
|
0111KKKKddddKKKK andi d,M
|
|
|
|
0111KKKKddddKKKK cbr d,n
|
|
|
|
1110KKKKddddKKKK ldi d,M
|
|
|
|
11101111dddd1111 ser d
|
|
|
|
0110KKKKddddKKKK ori d,M
|
|
|
|
0110KKKKddddKKKK sbr d,M
|
|
|
|
0011KKKKddddKKKK cpi d,M
|
|
|
|
0100KKKKddddKKKK sbci d,M
|
|
|
|
0101KKKKddddKKKK subi d,M
|
|
|
|
1111110rrrrr0sss sbrc r,s
|
|
|
|
1111111rrrrr0sss sbrs r,s
|
|
|
|
1111100ddddd0sss bld r,s
|
|
|
|
1111101ddddd0sss bst r,s
|
|
|
|
10110PPdddddPPPP in r,P
|
|
|
|
10111PPrrrrrPPPP out P,r
|
|
|
|
10010110KKddKKKK adiw w,K
|
|
|
|
10010111KKddKKKK sbiw w,K
|
|
|
|
10011000pppppsss cbi p,s
|
|
|
|
10011010pppppsss sbi p,s
|
|
|
|
10011001pppppsss sbic p,s
|
|
|
|
10011011pppppsss sbis p,s
|
|
|
|
111101lllllll000 brcc l
|
|
|
|
111100lllllll000 brcs l
|
|
|
|
111100lllllll001 breq l
|
|
|
|
111101lllllll100 brge l
|
|
|
|
111101lllllll101 brhc l
|
|
|
|
111100lllllll101 brhs l
|
|
|
|
111101lllllll111 brid l
|
|
|
|
111100lllllll111 brie l
|
|
|
|
111100lllllll000 brlo l
|
|
|
|
111100lllllll100 brlt l
|
|
|
|
111100lllllll010 brmi l
|
|
|
|
111101lllllll001 brne l
|
|
|
|
111101lllllll010 brpl l
|
|
|
|
111101lllllll000 brsh l
|
|
|
|
111101lllllll110 brtc l
|
|
|
|
111100lllllll110 brts l
|
|
|
|
111101lllllll011 brvc l
|
|
|
|
111100lllllll011 brvs l
|
|
|
|
111101lllllllsss brbc s,l
|
|
|
|
111100lllllllsss brbs s,l
|
|
|
|
1101LLLLLLLLLLLL rcall L
|
|
|
|
1100LLLLLLLLLLLL rjmp L
|
|
|
|
1001010hhhhh111h call h
|
|
|
|
1001010hhhhh110h jmp h
|
|
|
|
1001010rrrrr0101 asr r
|
|
|
|
1001010rrrrr0000 com r
|
|
|
|
1001010rrrrr1010 dec r
|
|
|
|
1001010rrrrr0011 inc r
|
|
|
|
1001010rrrrr0110 lsr r
|
|
|
|
1001010rrrrr0001 neg r
|
|
|
|
1001000rrrrr1111 pop r
|
|
|
|
1001001rrrrr1111 push r
|
|
|
|
1001010rrrrr0111 ror r
|
|
|
|
1001010rrrrr0010 swap r
|
|
|
|
00000001ddddrrrr movw v,v
|
|
|
|
00000010ddddrrrr muls d,d
|
|
|
|
000000110ddd0rrr mulsu a,a
|
|
|
|
000000110ddd1rrr fmul a,a
|
|
|
|
000000111ddd0rrr fmuls a,a
|
|
|
|
000000111ddd1rrr fmulsu a,a
|
|
|
|
1001001ddddd0000 sts i,r
|
|
|
|
1001000ddddd0000 lds r,i
|
|
|
|
10o0oo0dddddbooo ldd r,b
|
|
|
|
100!000dddddee-+ ld r,e
|
|
|
|
10o0oo1rrrrrbooo std b,r
|
|
|
|
100!001rrrrree-+ st e,r
|
|
|
|
1001010100011001 eicall
|
|
|
|
1001010000011001 eijmp
|
|
|
|
@end smallexample
|