binutils-gdb/gdb/ppc-tdep.h

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2000-07-31 22:56:44 +02:00
/* Target-dependent code for GDB, the GNU debugger.
2004-03-15 Andrew Cagney <cagney@redhat.com> * ppc-tdep.h: Update copyright. (ppc_linux_supply_gregset, ppc_linux_supply_fpregset): Change function signatures to match "regsets.h". * ppc-linux-tdep.c: Include "regset.h". (ELF_GREGSET_SIZE): Delete. (right_supply_register): New function. (ppc_linux_supply_fpregset, ppc_linux_supply_gregset): Rewrite using right_supply_register. (ppc32_linux_supply_gregset, ppc64_linux_supply_gregset): New functions. (ppc64_linux_gregset, ppc32_linux_gregset): Define. (ppc_linux_init_abi): Register ppc_linux_regset_from_core_section. (_initialize_ppc_linux_tdep): Do not register ppc_linux_regset_core_fns. (ppc_linux_regset_from_core_section): Replace fetch_core_registers. (ppc_linux_regset_core_fns): Delete. * ppc-linux-nat.c: (right_fill_reg): New function. (supply_gregset): Update call to ppc_linux_supply_gregset. (fill_gregset): Clear the register set, use right_fill_reg. (supply_fpregset): Update call to ppc_linux_supply_fpregset. (fill_fpregset): Use right_fill_reg, correctly compute FP offsets. Index: ppc-linux-nat.c =================================================================== RCS file: /cvs/src/src/gdb/ppc-linux-nat.c,v retrieving revision 1.28 diff -u -r1.28 ppc-linux-nat.c --- ppc-linux-nat.c 8 Mar 2004 01:45:02 -0000 1.28 +++ ppc-linux-nat.c 15 Mar 2004 21:28:31 -0000 @@ -507,7 +507,24 @@ void supply_gregset (gdb_gregset_t *gregsetp) { - ppc_linux_supply_gregset ((char *) gregsetp); + /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace + interface, and not the wordsize of the program's ABI. */ + int wordsize = sizeof (PTRACE_XFER_TYPE); + ppc_linux_supply_gregset (current_regcache, -1, gregsetp, + sizeof (gdb_gregset_t), wordsize); +} + +static void +right_fill_reg (int regnum, void *reg) +{ + /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace + interface, and not the wordsize of the program's ABI. */ + int wordsize = sizeof (PTRACE_XFER_TYPE); + /* Right fill the register. */ + regcache_raw_collect (current_regcache, regnum, + ((bfd_byte *) reg + + wordsize + - register_size (current_gdbarch, regnum))); } void @@ -516,36 +533,42 @@ int regi; elf_greg_t *regp = (elf_greg_t *) gregsetp; struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); + const int elf_ngreg = 48; + + + /* Start with zeros. */ + memset (regp, 0, elf_ngreg * sizeof (*regp)); for (regi = 0; regi < 32; regi++) { if ((regno == -1) || regno == regi) - regcache_collect (regi, regp + PT_R0 + regi); + right_fill_reg (regi, (regp + PT_R0 + regi)); } if ((regno == -1) || regno == PC_REGNUM) - regcache_collect (PC_REGNUM, regp + PT_NIP); + right_fill_reg (PC_REGNUM, regp + PT_NIP); if ((regno == -1) || regno == tdep->ppc_lr_regnum) - regcache_collect (tdep->ppc_lr_regnum, regp + PT_LNK); + right_fill_reg (tdep->ppc_lr_regnum, regp + PT_LNK); if ((regno == -1) || regno == tdep->ppc_cr_regnum) regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR); if ((regno == -1) || regno == tdep->ppc_xer_regnum) regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER); if ((regno == -1) || regno == tdep->ppc_ctr_regnum) - regcache_collect (tdep->ppc_ctr_regnum, regp + PT_CTR); + right_fill_reg (tdep->ppc_ctr_regnum, regp + PT_CTR); #ifdef PT_MQ if (((regno == -1) || regno == tdep->ppc_mq_regnum) && (tdep->ppc_mq_regnum != -1)) - regcache_collect (tdep->ppc_mq_regnum, regp + PT_MQ); + right_fill_reg (tdep->ppc_mq_regnum, regp + PT_MQ); #endif if ((regno == -1) || regno == tdep->ppc_ps_regnum) - regcache_collect (tdep->ppc_ps_regnum, regp + PT_MSR); + right_fill_reg (tdep->ppc_ps_regnum, regp + PT_MSR); } void supply_fpregset (gdb_fpregset_t * fpregsetp) { - ppc_linux_supply_fpregset ((char *) fpregsetp); + ppc_linux_supply_fpregset (NULL, current_regcache, -1, fpregsetp, + sizeof (gdb_fpregset_t)); } /* Given a pointer to a floating point register set in /proc format @@ -557,12 +580,13 @@ { int regi; struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); + bfd_byte *fpp = (void *) fpregsetp; for (regi = 0; regi < 32; regi++) { if ((regno == -1) || (regno == FP0_REGNUM + regi)) - regcache_collect (FP0_REGNUM + regi, (char *) (*fpregsetp + regi)); + regcache_collect (FP0_REGNUM + regi, fpp + 8 * regi); } if ((regno == -1) || regno == tdep->ppc_fpscr_regnum) - regcache_collect (tdep->ppc_fpscr_regnum, (char *) (*fpregsetp + regi)); + right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32)); } Index: ppc-linux-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/ppc-linux-tdep.c,v retrieving revision 1.50 diff -u -r1.50 ppc-linux-tdep.c --- ppc-linux-tdep.c 16 Feb 2004 21:49:22 -0000 1.50 +++ ppc-linux-tdep.c 15 Mar 2004 21:28:31 -0000 @@ -32,7 +32,7 @@ #include "regcache.h" #include "value.h" #include "osabi.h" - +#include "regset.h" #include "solib-svr4.h" #include "ppc-tdep.h" @@ -959,81 +959,114 @@ }; enum { - ELF_GREGSET_SIZE = (ELF_NGREG * 4), ELF_FPREGSET_SIZE = (ELF_NFPREG * 8) }; +static void +right_supply_register (struct regcache *regcache, int wordsize, int regnum, + const bfd_byte *buf) +{ + regcache_raw_supply (regcache, regnum, + (buf + wordsize + - register_size (current_gdbarch, regnum))); +} + +/* Extract the register values found in the WORDSIZED ABI GREGSET, + storing their values in REGCACHE. Note that some are left-aligned, + while others are right aligned. */ + void -ppc_linux_supply_gregset (char *buf) +ppc_linux_supply_gregset (struct regcache *regcache, + int regnum, const void *gregs, size_t size, + int wordsize) { int regi; - struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); + struct gdbarch *regcache_arch = get_regcache_arch (regcache); + struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch); + const bfd_byte *buf = gregs; for (regi = 0; regi < 32; regi++) - supply_register (regi, buf + 4 * regi); + right_supply_register (regcache, wordsize, regi, buf + wordsize * regi); + + right_supply_register (regcache, wordsize, gdbarch_pc_regnum (regcache_arch), + buf + wordsize * PPC_LINUX_PT_NIP); + right_supply_register (regcache, wordsize, regcache_tdep->ppc_lr_regnum, + buf + wordsize * PPC_LINUX_PT_LNK); + regcache_raw_supply (regcache, regcache_tdep->ppc_cr_regnum, + buf + wordsize * PPC_LINUX_PT_CCR); + regcache_raw_supply (regcache, regcache_tdep->ppc_xer_regnum, + buf + wordsize * PPC_LINUX_PT_XER); + regcache_raw_supply (regcache, regcache_tdep->ppc_ctr_regnum, + buf + wordsize * PPC_LINUX_PT_CTR); + if (regcache_tdep->ppc_mq_regnum != -1) + right_supply_register (regcache, wordsize, regcache_tdep->ppc_mq_regnum, + buf + wordsize * PPC_LINUX_PT_MQ); + right_supply_register (regcache, wordsize, regcache_tdep->ppc_ps_regnum, + buf + wordsize * PPC_LINUX_PT_MSR); +} - supply_register (PC_REGNUM, buf + 4 * PPC_LINUX_PT_NIP); - supply_register (tdep->ppc_lr_regnum, buf + 4 * PPC_LINUX_PT_LNK); - supply_register (tdep->ppc_cr_regnum, buf + 4 * PPC_LINUX_PT_CCR); - supply_register (tdep->ppc_xer_regnum, buf + 4 * PPC_LINUX_PT_XER); - supply_register (tdep->ppc_ctr_regnum, buf + 4 * PPC_LINUX_PT_CTR); - if (tdep->ppc_mq_regnum != -1) - supply_register (tdep->ppc_mq_regnum, buf + 4 * PPC_LINUX_PT_MQ); - supply_register (tdep->ppc_ps_regnum, buf + 4 * PPC_LINUX_PT_MSR); +static void +ppc32_linux_supply_gregset (const struct regset *regset, + struct regcache *regcache, + int regnum, const void *gregs, size_t size) +{ + ppc_linux_supply_gregset (regcache, regnum, gregs, size, 4); } +static struct regset ppc32_linux_gregset = { + NULL, ppc32_linux_supply_gregset +}; + +static void +ppc64_linux_supply_gregset (const struct regset *regset, + struct regcache * regcache, + int regnum, const void *gregs, size_t size) +{ + ppc_linux_supply_gregset (regcache, regnum, gregs, size, 8); +} + +static struct regset ppc64_linux_gregset = { + NULL, ppc64_linux_supply_gregset +}; + void -ppc_linux_supply_fpregset (char *buf) +ppc_linux_supply_fpregset (const struct regset *regset, + struct regcache * regcache, + int regnum, const void *fpset, size_t size) { int regi; - struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); + struct gdbarch *regcache_arch = get_regcache_arch (regcache); + struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch); + const bfd_byte *buf = fpset; for (regi = 0; regi < 32; regi++) - supply_register (FP0_REGNUM + regi, buf + 8 * regi); + regcache_raw_supply (regcache, FP0_REGNUM + regi, buf + 8 * regi); /* The FPSCR is stored in the low order word of the last doubleword in the fpregset. */ - supply_register (tdep->ppc_fpscr_regnum, buf + 8 * 32 + 4); + regcache_raw_supply (regcache, regcache_tdep->ppc_fpscr_regnum, + buf + 8 * 32 + 4); } -/* - Use a local version of this function to get the correct types for regsets. -*/ +static struct regset ppc_linux_fpregset = { NULL, ppc_linux_supply_fpregset }; -static void -fetch_core_registers (char *core_reg_sect, - unsigned core_reg_size, - int which, - CORE_ADDR reg_addr) +static const struct regset * +ppc_linux_regset_from_core_section (struct gdbarch *core_arch, + const char *sect_name, size_t sect_size) { - if (which == 0) + struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch); + if (strcmp (sect_name, ".reg") == 0) { - if (core_reg_size == ELF_GREGSET_SIZE) - ppc_linux_supply_gregset (core_reg_sect); + if (tdep->wordsize == 4) + return &ppc32_linux_gregset; else - warning ("wrong size gregset struct in core file"); - } - else if (which == 2) - { - if (core_reg_size == ELF_FPREGSET_SIZE) - ppc_linux_supply_fpregset (core_reg_sect); - else - warning ("wrong size fpregset struct in core file"); + return &ppc64_linux_gregset; } + if (strcmp (sect_name, ".reg2") == 0) + return &ppc_linux_fpregset; + return NULL; } -/* Register that we are able to handle ELF file formats using standard - procfs "regset" structures. */ - -static struct core_fns ppc_linux_regset_core_fns = -{ - bfd_target_elf_flavour, /* core_flavour */ - default_check_format, /* check_format */ - default_core_sniffer, /* core_sniffer */ - fetch_core_registers, /* core_read_registers */ - NULL /* next */ -}; - static void ppc_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) @@ -1086,6 +1119,7 @@ /* PPC64 malloc's entry-point is called ".malloc". */ set_gdbarch_name_of_malloc (gdbarch, ".malloc"); } + set_gdbarch_regset_from_core_section (gdbarch, ppc_linux_regset_from_core_section); } void @@ -1099,5 +1133,4 @@ ppc_linux_init_abi); gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX, ppc_linux_init_abi); - add_core_fns (&ppc_linux_regset_core_fns); } Index: ppc-tdep.h =================================================================== RCS file: /cvs/src/src/gdb/ppc-tdep.h,v retrieving revision 1.25 diff -u -r1.25 ppc-tdep.h --- ppc-tdep.h 10 Nov 2003 22:47:28 -0000 1.25 +++ ppc-tdep.h 15 Mar 2004 21:28:31 -0000 @@ -1,6 +1,7 @@ /* Target-dependent code for GDB, the GNU debugger. - Copyright 2000, 2001, 2002, 2003 - Free Software Foundation, Inc. + + Copyright 2000, 2001, 2002, 2003, 2004 Free Software Foundation, + Inc. This file is part of GDB. @@ -62,8 +63,12 @@ CORE_ADDR bpaddr); int ppc_linux_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache); struct link_map_offsets *ppc_linux_svr4_fetch_link_map_offsets (void); -void ppc_linux_supply_gregset (char *buf); -void ppc_linux_supply_fpregset (char *buf); +void ppc_linux_supply_gregset (struct regcache *regcache, + int regnum, const void *gregs, size_t size, + int wordsize); +void ppc_linux_supply_fpregset (const struct regset *regset, + struct regcache *regcache, + int regnum, const void *gregs, size_t size); enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
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Copyright 2000, 2001, 2002, 2003, 2004 Free Software Foundation,
Inc.
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This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
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#ifndef PPC_TDEP_H
#define PPC_TDEP_H
struct gdbarch;
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struct frame_info;
struct value;
struct regcache;
struct type;
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/* From ppc-linux-tdep.c... */
2003-11-07 Andrew Cagney <cagney@redhat.com> * ppc-linux-tdep.c (ppc_linux_init_abi): When 32-bit GNU/Linux, set "return_value" instead of "use_struct_convention". (ppc_linux_use_struct_convention): Delete function. (ppc_linux_return_value): New function. * ppc-sysv-tdep.c (ppc_sysv_abi_return_value): New function. (ppc_sysv_abi_broken_return_value): New function. (do_ppc_sysv_return_value): Add "gdbarch" parameter. (ppc64_sysv_abi_push_dummy_call): Add "gdbarch" parameter, drop static. (ppc_sysv_abi_extract_return_value): Delete function. (ppc_sysv_abi_broken_extract_return_value): Delete function. (ppc_sysv_abi_store_return_value): Delete function. (ppc_sysv_abi_broken_store_return_value): Delete function. (ppc_sysv_abi_use_struct_convention): Delete function. (ppc64_sysv_abi_use_struct_convention): Delete function. (ppc64_sysv_abi_extract_return_value): Delete function. (ppc64_sysv_abi_store_return_value): Delete function. * ppcnbsd-tdep.c (ppcnbsd_return_value): New function. (ppcnbsd_init_abi): Set "return_value", instead of "use_struct_convention", "extract_return_value", and "store_return_value". (ppcnbsd_use_struct_convention): Delete function. * ppc-tdep.h (ppc64_sysv_abi_return_value): Declare. (ppc_sysv_abi_return_value): Declare. (ppc_sysv_abi_broken_return_value): Declare. (ppc_sysv_abi_use_struct_convention): Delete. (ppc_sysv_abi_store_return_value): Delete. (ppc_sysv_abi_extract_return_value): Delete. (ppc_sysv_abi_broken_store_return_value): Delete. (ppc_sysv_abi_broken_extract_return_value): Delete. (ppc64_sysv_abi_use_struct_convention): Delete. (ppc64_sysv_abi_extract_return_value): Delete. (ppc64_sysv_abi_store_return_value): Delete. * rs6000-tdep.c (rs6000_gdbarch_init): For 32-bit and 64-bit SYSV, set "return_value" instead of "extract_return_value", "store_return_value", and "use_struct_convention".
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enum return_value_convention ppc_sysv_abi_return_value (struct gdbarch *gdbarch,
struct type *valtype,
struct regcache *regcache,
gdb_byte *readbuf,
const gdb_byte *writebuf);
2003-11-07 Andrew Cagney <cagney@redhat.com> * ppc-linux-tdep.c (ppc_linux_init_abi): When 32-bit GNU/Linux, set "return_value" instead of "use_struct_convention". (ppc_linux_use_struct_convention): Delete function. (ppc_linux_return_value): New function. * ppc-sysv-tdep.c (ppc_sysv_abi_return_value): New function. (ppc_sysv_abi_broken_return_value): New function. (do_ppc_sysv_return_value): Add "gdbarch" parameter. (ppc64_sysv_abi_push_dummy_call): Add "gdbarch" parameter, drop static. (ppc_sysv_abi_extract_return_value): Delete function. (ppc_sysv_abi_broken_extract_return_value): Delete function. (ppc_sysv_abi_store_return_value): Delete function. (ppc_sysv_abi_broken_store_return_value): Delete function. (ppc_sysv_abi_use_struct_convention): Delete function. (ppc64_sysv_abi_use_struct_convention): Delete function. (ppc64_sysv_abi_extract_return_value): Delete function. (ppc64_sysv_abi_store_return_value): Delete function. * ppcnbsd-tdep.c (ppcnbsd_return_value): New function. (ppcnbsd_init_abi): Set "return_value", instead of "use_struct_convention", "extract_return_value", and "store_return_value". (ppcnbsd_use_struct_convention): Delete function. * ppc-tdep.h (ppc64_sysv_abi_return_value): Declare. (ppc_sysv_abi_return_value): Declare. (ppc_sysv_abi_broken_return_value): Declare. (ppc_sysv_abi_use_struct_convention): Delete. (ppc_sysv_abi_store_return_value): Delete. (ppc_sysv_abi_extract_return_value): Delete. (ppc_sysv_abi_broken_store_return_value): Delete. (ppc_sysv_abi_broken_extract_return_value): Delete. (ppc64_sysv_abi_use_struct_convention): Delete. (ppc64_sysv_abi_extract_return_value): Delete. (ppc64_sysv_abi_store_return_value): Delete. * rs6000-tdep.c (rs6000_gdbarch_init): For 32-bit and 64-bit SYSV, set "return_value" instead of "extract_return_value", "store_return_value", and "use_struct_convention".
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enum return_value_convention ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
struct type *valtype,
struct regcache *regcache,
gdb_byte *readbuf,
const gdb_byte *writebuf);
CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
2004-06-06 Randolph Chung <tausq@debian.org> * gdbarch.sh (PUSH_DUMMY_CALL): Change CORE_ADDR func_addr argument to struct value *function. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * infcall.c (call_function_by_hand): Pass entire function value to push_dummy_call. * Makefile.in (alpha-tdep.o, frv-tdep.o, ia64-tdep.o, mips-tdep.o) (ppc-sysv-tdep.o, rs6000-tdep.o): Update dependencies. * alpha-tdep.c (alpha_push_dummy_call): Update call signature. * amd64-tdep.c (amd64_push_dummy_call): Likewise. * arm-tdep.c (arm_push_dummy_call): Likewise. * avr-tdep.c (avr_push_dummy_call): Likewise. * cris-tdep.c (cris_push_dummy_call): Likewise. * d10v-tdep.c (d10v_push_dummy_call): Likewise. * frv-tdep.c (frv_push_dummy_call): Likewise. * h8300-tdep.c (h8300_push_dummy_call): Likewise. * hppa-tdep.c (hppa32_push_dummy_call) (hppa64_push_dummy_call): Likewise. * i386-tdep.c (i386_push_dummy_call): Likewise. * ia64-tdep.c (ia64_push_dummy_call): Likewise. * m32r-tdep.c (m32r_push_dummy_call): Likewise. * m68hc11-tdep.c (m68hc11_push_dummy_call): Likewise. * m68k-tdep.c (m68k_push_dummy_call): Likewise. * m88k-tdep.c (m88k_push_dummy_call): Likewise. * mips-tdep.c (mips_eabi_push_dummy_call, mips_n32n64_push_dummy_call) (mips_o32_push_dummy_call, mips_o64_push_dummy_call): Likewise. * ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call) (ppc64_sysv_abi_push_dummy_call): Likewise. * ppc-tdep.h (ppc_sysv_abi_push_dummy_call) (ppc64_sysv_abi_push_dummy_call): Likewise. * rs6000-tdep.c (rs6000_push_dummy_call): Likewise. * s390-tdep.c (s390_push_dummy_call): Likewise. * sh-tdep.c (sh_push_dummy_call_fpu) (sh_push_dummy_call_nofpu): Likewise. * sparc-tdep.c (sparc32_push_dummy_call): Likewise. * sparc64-tdep.c (sparc64_push_dummy_call): Likewise. * vax-tdep.c (vax_push_dummy_call): Likewise.
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struct value *function,
struct regcache *regcache,
CORE_ADDR bp_addr, int nargs,
struct value **args, CORE_ADDR sp,
int struct_return,
CORE_ADDR struct_addr);
CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
2004-06-06 Randolph Chung <tausq@debian.org> * gdbarch.sh (PUSH_DUMMY_CALL): Change CORE_ADDR func_addr argument to struct value *function. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * infcall.c (call_function_by_hand): Pass entire function value to push_dummy_call. * Makefile.in (alpha-tdep.o, frv-tdep.o, ia64-tdep.o, mips-tdep.o) (ppc-sysv-tdep.o, rs6000-tdep.o): Update dependencies. * alpha-tdep.c (alpha_push_dummy_call): Update call signature. * amd64-tdep.c (amd64_push_dummy_call): Likewise. * arm-tdep.c (arm_push_dummy_call): Likewise. * avr-tdep.c (avr_push_dummy_call): Likewise. * cris-tdep.c (cris_push_dummy_call): Likewise. * d10v-tdep.c (d10v_push_dummy_call): Likewise. * frv-tdep.c (frv_push_dummy_call): Likewise. * h8300-tdep.c (h8300_push_dummy_call): Likewise. * hppa-tdep.c (hppa32_push_dummy_call) (hppa64_push_dummy_call): Likewise. * i386-tdep.c (i386_push_dummy_call): Likewise. * ia64-tdep.c (ia64_push_dummy_call): Likewise. * m32r-tdep.c (m32r_push_dummy_call): Likewise. * m68hc11-tdep.c (m68hc11_push_dummy_call): Likewise. * m68k-tdep.c (m68k_push_dummy_call): Likewise. * m88k-tdep.c (m88k_push_dummy_call): Likewise. * mips-tdep.c (mips_eabi_push_dummy_call, mips_n32n64_push_dummy_call) (mips_o32_push_dummy_call, mips_o64_push_dummy_call): Likewise. * ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call) (ppc64_sysv_abi_push_dummy_call): Likewise. * ppc-tdep.h (ppc_sysv_abi_push_dummy_call) (ppc64_sysv_abi_push_dummy_call): Likewise. * rs6000-tdep.c (rs6000_push_dummy_call): Likewise. * s390-tdep.c (s390_push_dummy_call): Likewise. * sh-tdep.c (sh_push_dummy_call_fpu) (sh_push_dummy_call_nofpu): Likewise. * sparc-tdep.c (sparc32_push_dummy_call): Likewise. * sparc64-tdep.c (sparc64_push_dummy_call): Likewise. * vax-tdep.c (vax_push_dummy_call): Likewise.
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struct value *function,
struct regcache *regcache,
CORE_ADDR bp_addr, int nargs,
struct value **args, CORE_ADDR sp,
int struct_return,
CORE_ADDR struct_addr);
CORE_ADDR ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
CORE_ADDR bpaddr);
int ppc_linux_memory_remove_breakpoint (CORE_ADDR addr,
gdb_byte *contents_cache);
struct link_map_offsets *ppc_linux_svr4_fetch_link_map_offsets (void);
2004-03-15 Andrew Cagney <cagney@redhat.com> * ppc-tdep.h: Update copyright. (ppc_linux_supply_gregset, ppc_linux_supply_fpregset): Change function signatures to match "regsets.h". * ppc-linux-tdep.c: Include "regset.h". (ELF_GREGSET_SIZE): Delete. (right_supply_register): New function. (ppc_linux_supply_fpregset, ppc_linux_supply_gregset): Rewrite using right_supply_register. (ppc32_linux_supply_gregset, ppc64_linux_supply_gregset): New functions. (ppc64_linux_gregset, ppc32_linux_gregset): Define. (ppc_linux_init_abi): Register ppc_linux_regset_from_core_section. (_initialize_ppc_linux_tdep): Do not register ppc_linux_regset_core_fns. (ppc_linux_regset_from_core_section): Replace fetch_core_registers. (ppc_linux_regset_core_fns): Delete. * ppc-linux-nat.c: (right_fill_reg): New function. (supply_gregset): Update call to ppc_linux_supply_gregset. (fill_gregset): Clear the register set, use right_fill_reg. (supply_fpregset): Update call to ppc_linux_supply_fpregset. (fill_fpregset): Use right_fill_reg, correctly compute FP offsets. Index: ppc-linux-nat.c =================================================================== RCS file: /cvs/src/src/gdb/ppc-linux-nat.c,v retrieving revision 1.28 diff -u -r1.28 ppc-linux-nat.c --- ppc-linux-nat.c 8 Mar 2004 01:45:02 -0000 1.28 +++ ppc-linux-nat.c 15 Mar 2004 21:28:31 -0000 @@ -507,7 +507,24 @@ void supply_gregset (gdb_gregset_t *gregsetp) { - ppc_linux_supply_gregset ((char *) gregsetp); + /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace + interface, and not the wordsize of the program's ABI. */ + int wordsize = sizeof (PTRACE_XFER_TYPE); + ppc_linux_supply_gregset (current_regcache, -1, gregsetp, + sizeof (gdb_gregset_t), wordsize); +} + +static void +right_fill_reg (int regnum, void *reg) +{ + /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace + interface, and not the wordsize of the program's ABI. */ + int wordsize = sizeof (PTRACE_XFER_TYPE); + /* Right fill the register. */ + regcache_raw_collect (current_regcache, regnum, + ((bfd_byte *) reg + + wordsize + - register_size (current_gdbarch, regnum))); } void @@ -516,36 +533,42 @@ int regi; elf_greg_t *regp = (elf_greg_t *) gregsetp; struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); + const int elf_ngreg = 48; + + + /* Start with zeros. */ + memset (regp, 0, elf_ngreg * sizeof (*regp)); for (regi = 0; regi < 32; regi++) { if ((regno == -1) || regno == regi) - regcache_collect (regi, regp + PT_R0 + regi); + right_fill_reg (regi, (regp + PT_R0 + regi)); } if ((regno == -1) || regno == PC_REGNUM) - regcache_collect (PC_REGNUM, regp + PT_NIP); + right_fill_reg (PC_REGNUM, regp + PT_NIP); if ((regno == -1) || regno == tdep->ppc_lr_regnum) - regcache_collect (tdep->ppc_lr_regnum, regp + PT_LNK); + right_fill_reg (tdep->ppc_lr_regnum, regp + PT_LNK); if ((regno == -1) || regno == tdep->ppc_cr_regnum) regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR); if ((regno == -1) || regno == tdep->ppc_xer_regnum) regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER); if ((regno == -1) || regno == tdep->ppc_ctr_regnum) - regcache_collect (tdep->ppc_ctr_regnum, regp + PT_CTR); + right_fill_reg (tdep->ppc_ctr_regnum, regp + PT_CTR); #ifdef PT_MQ if (((regno == -1) || regno == tdep->ppc_mq_regnum) && (tdep->ppc_mq_regnum != -1)) - regcache_collect (tdep->ppc_mq_regnum, regp + PT_MQ); + right_fill_reg (tdep->ppc_mq_regnum, regp + PT_MQ); #endif if ((regno == -1) || regno == tdep->ppc_ps_regnum) - regcache_collect (tdep->ppc_ps_regnum, regp + PT_MSR); + right_fill_reg (tdep->ppc_ps_regnum, regp + PT_MSR); } void supply_fpregset (gdb_fpregset_t * fpregsetp) { - ppc_linux_supply_fpregset ((char *) fpregsetp); + ppc_linux_supply_fpregset (NULL, current_regcache, -1, fpregsetp, + sizeof (gdb_fpregset_t)); } /* Given a pointer to a floating point register set in /proc format @@ -557,12 +580,13 @@ { int regi; struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); + bfd_byte *fpp = (void *) fpregsetp; for (regi = 0; regi < 32; regi++) { if ((regno == -1) || (regno == FP0_REGNUM + regi)) - regcache_collect (FP0_REGNUM + regi, (char *) (*fpregsetp + regi)); + regcache_collect (FP0_REGNUM + regi, fpp + 8 * regi); } if ((regno == -1) || regno == tdep->ppc_fpscr_regnum) - regcache_collect (tdep->ppc_fpscr_regnum, (char *) (*fpregsetp + regi)); + right_fill_reg (tdep->ppc_fpscr_regnum, (fpp + 8 * 32)); } Index: ppc-linux-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/ppc-linux-tdep.c,v retrieving revision 1.50 diff -u -r1.50 ppc-linux-tdep.c --- ppc-linux-tdep.c 16 Feb 2004 21:49:22 -0000 1.50 +++ ppc-linux-tdep.c 15 Mar 2004 21:28:31 -0000 @@ -32,7 +32,7 @@ #include "regcache.h" #include "value.h" #include "osabi.h" - +#include "regset.h" #include "solib-svr4.h" #include "ppc-tdep.h" @@ -959,81 +959,114 @@ }; enum { - ELF_GREGSET_SIZE = (ELF_NGREG * 4), ELF_FPREGSET_SIZE = (ELF_NFPREG * 8) }; +static void +right_supply_register (struct regcache *regcache, int wordsize, int regnum, + const bfd_byte *buf) +{ + regcache_raw_supply (regcache, regnum, + (buf + wordsize + - register_size (current_gdbarch, regnum))); +} + +/* Extract the register values found in the WORDSIZED ABI GREGSET, + storing their values in REGCACHE. Note that some are left-aligned, + while others are right aligned. */ + void -ppc_linux_supply_gregset (char *buf) +ppc_linux_supply_gregset (struct regcache *regcache, + int regnum, const void *gregs, size_t size, + int wordsize) { int regi; - struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); + struct gdbarch *regcache_arch = get_regcache_arch (regcache); + struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch); + const bfd_byte *buf = gregs; for (regi = 0; regi < 32; regi++) - supply_register (regi, buf + 4 * regi); + right_supply_register (regcache, wordsize, regi, buf + wordsize * regi); + + right_supply_register (regcache, wordsize, gdbarch_pc_regnum (regcache_arch), + buf + wordsize * PPC_LINUX_PT_NIP); + right_supply_register (regcache, wordsize, regcache_tdep->ppc_lr_regnum, + buf + wordsize * PPC_LINUX_PT_LNK); + regcache_raw_supply (regcache, regcache_tdep->ppc_cr_regnum, + buf + wordsize * PPC_LINUX_PT_CCR); + regcache_raw_supply (regcache, regcache_tdep->ppc_xer_regnum, + buf + wordsize * PPC_LINUX_PT_XER); + regcache_raw_supply (regcache, regcache_tdep->ppc_ctr_regnum, + buf + wordsize * PPC_LINUX_PT_CTR); + if (regcache_tdep->ppc_mq_regnum != -1) + right_supply_register (regcache, wordsize, regcache_tdep->ppc_mq_regnum, + buf + wordsize * PPC_LINUX_PT_MQ); + right_supply_register (regcache, wordsize, regcache_tdep->ppc_ps_regnum, + buf + wordsize * PPC_LINUX_PT_MSR); +} - supply_register (PC_REGNUM, buf + 4 * PPC_LINUX_PT_NIP); - supply_register (tdep->ppc_lr_regnum, buf + 4 * PPC_LINUX_PT_LNK); - supply_register (tdep->ppc_cr_regnum, buf + 4 * PPC_LINUX_PT_CCR); - supply_register (tdep->ppc_xer_regnum, buf + 4 * PPC_LINUX_PT_XER); - supply_register (tdep->ppc_ctr_regnum, buf + 4 * PPC_LINUX_PT_CTR); - if (tdep->ppc_mq_regnum != -1) - supply_register (tdep->ppc_mq_regnum, buf + 4 * PPC_LINUX_PT_MQ); - supply_register (tdep->ppc_ps_regnum, buf + 4 * PPC_LINUX_PT_MSR); +static void +ppc32_linux_supply_gregset (const struct regset *regset, + struct regcache *regcache, + int regnum, const void *gregs, size_t size) +{ + ppc_linux_supply_gregset (regcache, regnum, gregs, size, 4); } +static struct regset ppc32_linux_gregset = { + NULL, ppc32_linux_supply_gregset +}; + +static void +ppc64_linux_supply_gregset (const struct regset *regset, + struct regcache * regcache, + int regnum, const void *gregs, size_t size) +{ + ppc_linux_supply_gregset (regcache, regnum, gregs, size, 8); +} + +static struct regset ppc64_linux_gregset = { + NULL, ppc64_linux_supply_gregset +}; + void -ppc_linux_supply_fpregset (char *buf) +ppc_linux_supply_fpregset (const struct regset *regset, + struct regcache * regcache, + int regnum, const void *fpset, size_t size) { int regi; - struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); + struct gdbarch *regcache_arch = get_regcache_arch (regcache); + struct gdbarch_tdep *regcache_tdep = gdbarch_tdep (regcache_arch); + const bfd_byte *buf = fpset; for (regi = 0; regi < 32; regi++) - supply_register (FP0_REGNUM + regi, buf + 8 * regi); + regcache_raw_supply (regcache, FP0_REGNUM + regi, buf + 8 * regi); /* The FPSCR is stored in the low order word of the last doubleword in the fpregset. */ - supply_register (tdep->ppc_fpscr_regnum, buf + 8 * 32 + 4); + regcache_raw_supply (regcache, regcache_tdep->ppc_fpscr_regnum, + buf + 8 * 32 + 4); } -/* - Use a local version of this function to get the correct types for regsets. -*/ +static struct regset ppc_linux_fpregset = { NULL, ppc_linux_supply_fpregset }; -static void -fetch_core_registers (char *core_reg_sect, - unsigned core_reg_size, - int which, - CORE_ADDR reg_addr) +static const struct regset * +ppc_linux_regset_from_core_section (struct gdbarch *core_arch, + const char *sect_name, size_t sect_size) { - if (which == 0) + struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch); + if (strcmp (sect_name, ".reg") == 0) { - if (core_reg_size == ELF_GREGSET_SIZE) - ppc_linux_supply_gregset (core_reg_sect); + if (tdep->wordsize == 4) + return &ppc32_linux_gregset; else - warning ("wrong size gregset struct in core file"); - } - else if (which == 2) - { - if (core_reg_size == ELF_FPREGSET_SIZE) - ppc_linux_supply_fpregset (core_reg_sect); - else - warning ("wrong size fpregset struct in core file"); + return &ppc64_linux_gregset; } + if (strcmp (sect_name, ".reg2") == 0) + return &ppc_linux_fpregset; + return NULL; } -/* Register that we are able to handle ELF file formats using standard - procfs "regset" structures. */ - -static struct core_fns ppc_linux_regset_core_fns = -{ - bfd_target_elf_flavour, /* core_flavour */ - default_check_format, /* check_format */ - default_core_sniffer, /* core_sniffer */ - fetch_core_registers, /* core_read_registers */ - NULL /* next */ -}; - static void ppc_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) @@ -1086,6 +1119,7 @@ /* PPC64 malloc's entry-point is called ".malloc". */ set_gdbarch_name_of_malloc (gdbarch, ".malloc"); } + set_gdbarch_regset_from_core_section (gdbarch, ppc_linux_regset_from_core_section); } void @@ -1099,5 +1133,4 @@ ppc_linux_init_abi); gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX, ppc_linux_init_abi); - add_core_fns (&ppc_linux_regset_core_fns); } Index: ppc-tdep.h =================================================================== RCS file: /cvs/src/src/gdb/ppc-tdep.h,v retrieving revision 1.25 diff -u -r1.25 ppc-tdep.h --- ppc-tdep.h 10 Nov 2003 22:47:28 -0000 1.25 +++ ppc-tdep.h 15 Mar 2004 21:28:31 -0000 @@ -1,6 +1,7 @@ /* Target-dependent code for GDB, the GNU debugger. - Copyright 2000, 2001, 2002, 2003 - Free Software Foundation, Inc. + + Copyright 2000, 2001, 2002, 2003, 2004 Free Software Foundation, + Inc. This file is part of GDB. @@ -62,8 +63,12 @@ CORE_ADDR bpaddr); int ppc_linux_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache); struct link_map_offsets *ppc_linux_svr4_fetch_link_map_offsets (void); -void ppc_linux_supply_gregset (char *buf); -void ppc_linux_supply_fpregset (char *buf); +void ppc_linux_supply_gregset (struct regcache *regcache, + int regnum, const void *gregs, size_t size, + int wordsize); +void ppc_linux_supply_fpregset (const struct regset *regset, + struct regcache *regcache, + int regnum, const void *gregs, size_t size); enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
2004-03-15 22:35:25 +01:00
void ppc_linux_supply_gregset (struct regcache *regcache,
int regnum, const void *gregs, size_t size,
int wordsize);
void ppc_linux_supply_fpregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *gregs, size_t size);
2000-07-31 22:56:44 +02:00
2003-11-07 Andrew Cagney <cagney@redhat.com> * ppc-linux-tdep.c (ppc_linux_init_abi): When 32-bit GNU/Linux, set "return_value" instead of "use_struct_convention". (ppc_linux_use_struct_convention): Delete function. (ppc_linux_return_value): New function. * ppc-sysv-tdep.c (ppc_sysv_abi_return_value): New function. (ppc_sysv_abi_broken_return_value): New function. (do_ppc_sysv_return_value): Add "gdbarch" parameter. (ppc64_sysv_abi_push_dummy_call): Add "gdbarch" parameter, drop static. (ppc_sysv_abi_extract_return_value): Delete function. (ppc_sysv_abi_broken_extract_return_value): Delete function. (ppc_sysv_abi_store_return_value): Delete function. (ppc_sysv_abi_broken_store_return_value): Delete function. (ppc_sysv_abi_use_struct_convention): Delete function. (ppc64_sysv_abi_use_struct_convention): Delete function. (ppc64_sysv_abi_extract_return_value): Delete function. (ppc64_sysv_abi_store_return_value): Delete function. * ppcnbsd-tdep.c (ppcnbsd_return_value): New function. (ppcnbsd_init_abi): Set "return_value", instead of "use_struct_convention", "extract_return_value", and "store_return_value". (ppcnbsd_use_struct_convention): Delete function. * ppc-tdep.h (ppc64_sysv_abi_return_value): Declare. (ppc_sysv_abi_return_value): Declare. (ppc_sysv_abi_broken_return_value): Declare. (ppc_sysv_abi_use_struct_convention): Delete. (ppc_sysv_abi_store_return_value): Delete. (ppc_sysv_abi_extract_return_value): Delete. (ppc_sysv_abi_broken_store_return_value): Delete. (ppc_sysv_abi_broken_extract_return_value): Delete. (ppc64_sysv_abi_use_struct_convention): Delete. (ppc64_sysv_abi_extract_return_value): Delete. (ppc64_sysv_abi_store_return_value): Delete. * rs6000-tdep.c (rs6000_gdbarch_init): For 32-bit and 64-bit SYSV, set "return_value" instead of "extract_return_value", "store_return_value", and "use_struct_convention".
2003-11-07 21:44:51 +01:00
enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch,
struct type *valtype,
struct regcache *regcache,
gdb_byte *readbuf,
const gdb_byte *writebuf);
2000-07-31 22:56:44 +02:00
/* From rs6000-tdep.c... */
int altivec_register_p (int regno);
int spe_register_p (int regno);
2000-07-31 22:56:44 +02:00
* ppc-tdep.h (struct gdbarch_tdep): Change definition of ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this processor variant lacks those registers. (ppc_floating_point_unit_p): Change description to make it clear that this returns info about the ISA, not the ABI. * rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to return true or false by checking tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum. The original code replicated the BFD arch/mach switching done in rs6000_gdbarch_init; it's better to keep that logic there, and just check the results here. (rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum to -1 to indicate that we have no floating-point registers. (ppc_supply_fpregset, ppc_collect_fpregset) (rs6000_push_dummy_call, rs6000_extract_return_value) (rs6000_store_return_value): Assert that we have floating-point registers. (rs6000_dwarf2_stab_reg_to_regnum): Add FIXME. (rs6000_frame_cache): Don't note the locations at which floating-point registers were saved if we have no fprs. * aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP registers. (fetch_regs_user_thread, fetch_regs_kernel_thread) (store_regs_user_thread, store_regs_kernel_thread): Only call supply_fprs / fill_fprs if we actually have floating-point registers. (special_register_p): Check ppc_fpscr_regnum before matching against it. (supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't supply / collect fpscr if we don't have it. * ppc-bdm.c: #include "gdb_assert.h". (bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we have floating-point registers, since I can't test this code on FP-free systems to adapt it. * ppc-linux-nat.c (ppc_register_u_addr): Don't match against the fpscr and floating point register numbers if they don't exist. (fetch_register): Assert that we have floating-point registers before we reach the code that handles them. (store_register): Same. And use tdep instead of calling gdbarch_tdep again. (fill_fpregset): Don't try to collect FP registers and fpscr if we don't have them. (ppc_linux_sigtramp_cache): Don't record the saved locations of fprs and fpscr if we don't have them. (ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we don't have them. * ppcnbsd-nat.c: #include "gdb_assert.h". (getfpregs_supplies): Assert that we have floating-point registers. * ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same. * ppcobsd-tdep.c: #include "gdb_assert.h". (ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we have floating-point registers. * rs6000-nat.c (regmap): Don't match against the fpscr and floating point register numbers if they don't exist. (fetch_inferior_registers, store_inferior_registers, fetch_core_registers): Only fetch / store / supply the floating-point registers and the fpscr if we have them. * Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o) (ppcobsd-tdep.o): Update dependencies.
2004-05-11 06:55:32 +02:00
/* Return non-zero if the architecture described by GDBARCH has
floating-point registers (f0 --- f31 and fpscr). */
int ppc_floating_point_unit_p (struct gdbarch *gdbarch);
/* Register set description. */
struct ppc_reg_offsets
{
/* General-purpose registers. */
int r0_offset;
int pc_offset;
int ps_offset;
int cr_offset;
int lr_offset;
int ctr_offset;
int xer_offset;
int mq_offset;
/* Floating-point registers. */
int f0_offset;
int fpscr_offset;
/* AltiVec registers. */
int vr0_offset;
int vscr_offset;
int vrsave_offset;
};
/* Supply register REGNUM in the general-purpose register set REGSET
from the buffer specified by GREGS and LEN to register cache
REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
extern void ppc_supply_gregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *gregs, size_t len);
/* Supply register REGNUM in the floating-point register set REGSET
from the buffer specified by FPREGS and LEN to register cache
REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
extern void ppc_supply_fpregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *fpregs, size_t len);
/* Collect register REGNUM in the general-purpose register set
REGSET. from register cache REGCACHE into the buffer specified by
GREGS and LEN. If REGNUM is -1, do this for all registers in
REGSET. */
extern void ppc_collect_gregset (const struct regset *regset,
const struct regcache *regcache,
int regnum, void *gregs, size_t len);
/* Collect register REGNUM in the floating-point register set
REGSET. from register cache REGCACHE into the buffer specified by
FPREGS and LEN. If REGNUM is -1, do this for all registers in
REGSET. */
extern void ppc_collect_fpregset (const struct regset *regset,
const struct regcache *regcache,
int regnum, void *fpregs, size_t len);
/* Private data that this module attaches to struct gdbarch. */
struct gdbarch_tdep
{
int wordsize; /* size in bytes of fixed-point word */
const struct reg *regs; /* from current variant */
int ppc_gp0_regnum; /* GPR register 0 */
int ppc_toc_regnum; /* TOC register */
int ppc_ps_regnum; /* Processor (or machine) status (%msr) */
int ppc_cr_regnum; /* Condition register */
int ppc_lr_regnum; /* Link register */
int ppc_ctr_regnum; /* Count register */
int ppc_xer_regnum; /* Integer exception register */
* ppc-tdep.h (struct gdbarch_tdep): Change definition of ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this processor variant lacks those registers. (ppc_floating_point_unit_p): Change description to make it clear that this returns info about the ISA, not the ABI. * rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to return true or false by checking tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum. The original code replicated the BFD arch/mach switching done in rs6000_gdbarch_init; it's better to keep that logic there, and just check the results here. (rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum to -1 to indicate that we have no floating-point registers. (ppc_supply_fpregset, ppc_collect_fpregset) (rs6000_push_dummy_call, rs6000_extract_return_value) (rs6000_store_return_value): Assert that we have floating-point registers. (rs6000_dwarf2_stab_reg_to_regnum): Add FIXME. (rs6000_frame_cache): Don't note the locations at which floating-point registers were saved if we have no fprs. * aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP registers. (fetch_regs_user_thread, fetch_regs_kernel_thread) (store_regs_user_thread, store_regs_kernel_thread): Only call supply_fprs / fill_fprs if we actually have floating-point registers. (special_register_p): Check ppc_fpscr_regnum before matching against it. (supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't supply / collect fpscr if we don't have it. * ppc-bdm.c: #include "gdb_assert.h". (bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we have floating-point registers, since I can't test this code on FP-free systems to adapt it. * ppc-linux-nat.c (ppc_register_u_addr): Don't match against the fpscr and floating point register numbers if they don't exist. (fetch_register): Assert that we have floating-point registers before we reach the code that handles them. (store_register): Same. And use tdep instead of calling gdbarch_tdep again. (fill_fpregset): Don't try to collect FP registers and fpscr if we don't have them. (ppc_linux_sigtramp_cache): Don't record the saved locations of fprs and fpscr if we don't have them. (ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we don't have them. * ppcnbsd-nat.c: #include "gdb_assert.h". (getfpregs_supplies): Assert that we have floating-point registers. * ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same. * ppcobsd-tdep.c: #include "gdb_assert.h". (ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we have floating-point registers. * rs6000-nat.c (regmap): Don't match against the fpscr and floating point register numbers if they don't exist. (fetch_inferior_registers, store_inferior_registers, fetch_core_registers): Only fetch / store / supply the floating-point registers and the fpscr if we have them. * Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o) (ppcobsd-tdep.o): Update dependencies.
2004-05-11 06:55:32 +02:00
/* On PPC and RS6000 variants that have no floating-point
registers, the next two members will be -1. */
int ppc_fp0_regnum; /* floating-point register 0 */
int ppc_fpscr_regnum; /* Floating point status and condition
register */
* ppc-tdep.h (struct gdbarch_tdep): Change definition of ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this processor variant lacks those registers. (ppc_floating_point_unit_p): Change description to make it clear that this returns info about the ISA, not the ABI. * rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to return true or false by checking tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum. The original code replicated the BFD arch/mach switching done in rs6000_gdbarch_init; it's better to keep that logic there, and just check the results here. (rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and tdep->ppc_fpscr_regnum to -1 to indicate that we have no floating-point registers. (ppc_supply_fpregset, ppc_collect_fpregset) (rs6000_push_dummy_call, rs6000_extract_return_value) (rs6000_store_return_value): Assert that we have floating-point registers. (rs6000_dwarf2_stab_reg_to_regnum): Add FIXME. (rs6000_frame_cache): Don't note the locations at which floating-point registers were saved if we have no fprs. * aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP registers. (fetch_regs_user_thread, fetch_regs_kernel_thread) (store_regs_user_thread, store_regs_kernel_thread): Only call supply_fprs / fill_fprs if we actually have floating-point registers. (special_register_p): Check ppc_fpscr_regnum before matching against it. (supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't supply / collect fpscr if we don't have it. * ppc-bdm.c: #include "gdb_assert.h". (bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we have floating-point registers, since I can't test this code on FP-free systems to adapt it. * ppc-linux-nat.c (ppc_register_u_addr): Don't match against the fpscr and floating point register numbers if they don't exist. (fetch_register): Assert that we have floating-point registers before we reach the code that handles them. (store_register): Same. And use tdep instead of calling gdbarch_tdep again. (fill_fpregset): Don't try to collect FP registers and fpscr if we don't have them. (ppc_linux_sigtramp_cache): Don't record the saved locations of fprs and fpscr if we don't have them. (ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we don't have them. * ppcnbsd-nat.c: #include "gdb_assert.h". (getfpregs_supplies): Assert that we have floating-point registers. * ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same. * ppcobsd-tdep.c: #include "gdb_assert.h". (ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we have floating-point registers. * rs6000-nat.c (regmap): Don't match against the fpscr and floating point register numbers if they don't exist. (fetch_inferior_registers, store_inferior_registers, fetch_core_registers): Only fetch / store / supply the floating-point registers and the fpscr if we have them. * Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o) (ppcobsd-tdep.o): Update dependencies.
2004-05-11 06:55:32 +02:00
int ppc_sr0_regnum; /* segment register 0, or -1 on
variants that have no segment
registers. */
int ppc_mq_regnum; /* Multiply/Divide extension register */
int ppc_vr0_regnum; /* First AltiVec register */
int ppc_vrsave_regnum; /* Last AltiVec register */
Change the layout of the PowerPC E500 raw register cache to allow the lower 32-bit halves of the GPRS to be their own raw registers, not pseudoregisters. * ppc-tdep.h (struct gdbarch_tdep): Remove ppc_gprs_pseudo_p flag; add ppc_ev0_upper_regnum flag. * rs6000-tdep.c: #include "reggroups.h". (spe_register_p): Recognize the ev upper half registers as SPE registers. (init_sim_regno_table): Build gdb->sim mappings for the upper-half registers. (e500_move_ev_register): New function. (e500_pseudo_register_read, e500_pseudo_register_write): The 'ev' vector registers are the pseudo-registers now, formed by splicing together the gprs and the upper-half registers. (e500_register_reggroup_p): New function. (P): Macro deleted. (P8, A4): New macro. (PPC_EV_REGS, PPC_GPRS_PSEUDO_REGS): Macros deleted. (PPC_SPE_GP_REGS, PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): New macros. (registers_e500): Rearrange register set so that the raw register set contains 32-bit GPRs and upper-half registers, and the SPE vector registers become pseudo-registers. (rs6000_gdbarch_init): Don't initialize tdep->ppc_gprs_pseudo_p; it has been deleted. Initialize ppc_ev0_upper_regnum. Many other register numbers are now the same for the E500 as they are for other PowerPC variants. Register e500_register_reggroup_p as the register group function for the E500. * Makefile.in (rs6000-tdep.o): Update dependencies. Adapt PPC E500 native support to the new raw regcache layout. * ppc-linux-nat.c (struct gdb_evrregset_t): Doc fixes. (read_spliced_spe_reg, write_spliced_spe_reg): Deleted. (fetch_spe_register, store_spe_register): Handle fetching/storing all the SPE registers at once, if regno == -1. These now take over the job of fetch_spe_registers and store_spe_registers. (fetch_spe_registers, store_spe_registers): Deleted. (fetch_ppc_registers, store_ppc_registers): Fetch/store gprs unconditionally; they're always raw. Fetch/store SPE upper half registers, if present, instead of ev registers. (fetch_register, store_register): Remove sanity checks: gprs are never pseudo-registers now, so we never need to even mention any registers that are ever pseudoregisters.
2004-08-04 19:17:55 +02:00
int ppc_ev0_upper_regnum; /* First GPR upper half register */
int ppc_ev0_regnum; /* First ev register */
int ppc_ev31_regnum; /* Last ev register */
int ppc_acc_regnum; /* SPE 'acc' register */
int ppc_spefscr_regnum; /* SPE 'spefscr' register */
2002-04-12 21:48:37 +02:00
int lr_frame_offset; /* Offset to ABI specific location where
link register is saved. */
/* An array of integers, such that sim_regno[I] is the simulator
register number for GDB register number I, or -1 if the
simulator does not implement that register. */
int *sim_regno;
};
2001-11-01 02:07:35 +01:00
/* Constants for register set sizes. */
enum
{
ppc_num_gprs = 32, /* 32 general-purpose registers */
ppc_num_fprs = 32, /* 32 floating-point registers */
ppc_num_srs = 16, /* 16 segment registers */
ppc_num_vrs = 32 /* 32 Altivec vector registers */
};
* ppc-tdep.h (ppc_spr_mq, ppc_spr_xer, ppc_spr_rtcu, ppc_spr_rtcl) (ppc_spr_lr, ppc_spr_ctr, ppc_spr_cnt, ppc_spr_dsisr, ppc_spr_dar) (ppc_spr_dec, ppc_spr_sdr1, ppc_spr_srr0, ppc_spr_srr1) (ppc_spr_eie, ppc_spr_eid, ppc_spr_nri, ppc_spr_sp, ppc_spr_cmpa) (ppc_spr_cmpb, ppc_spr_cmpc, ppc_spr_cmpd, ppc_spr_icr) (ppc_spr_der, ppc_spr_counta, ppc_spr_countb, ppc_spr_cmpe) (ppc_spr_cmpf, ppc_spr_cmpg, ppc_spr_cmph, ppc_spr_lctrl1) (ppc_spr_lctrl2, ppc_spr_ictrl, ppc_spr_bar, ppc_spr_vrsave) (ppc_spr_sprg0, ppc_spr_sprg1, ppc_spr_sprg2, ppc_spr_sprg3) (ppc_spr_ear, ppc_spr_tbl, ppc_spr_tbu, ppc_spr_pvr) (ppc_spr_spefscr, ppc_spr_ibat0u, ppc_spr_ibat0l, ppc_spr_ibat1u) (ppc_spr_ibat1l, ppc_spr_ibat2u, ppc_spr_ibat2l, ppc_spr_ibat3u) (ppc_spr_ibat3l, ppc_spr_dbat0u, ppc_spr_dbat0l, ppc_spr_dbat1u) (ppc_spr_dbat1l, ppc_spr_dbat2u, ppc_spr_dbat2l, ppc_spr_dbat3u) (ppc_spr_dbat3l, ppc_spr_ic_cst, ppc_spr_ic_adr, ppc_spr_ic_dat) (ppc_spr_dc_cst, ppc_spr_dc_adr, ppc_spr_dc_dat, ppc_spr_dpdr) (ppc_spr_dpir, ppc_spr_immr, ppc_spr_mi_ctr, ppc_spr_mi_ap) (ppc_spr_mi_epn, ppc_spr_mi_twc, ppc_spr_mi_rpn, ppc_spr_mi_cam) (ppc_spr_mi_ram0, ppc_spr_mi_ram1, ppc_spr_md_ctr, ppc_spr_m_casid) (ppc_spr_md_ap, ppc_spr_md_epn, ppc_spr_md_twb, ppc_spr_md_twc) (ppc_spr_md_rpn, ppc_spr_m_tw, ppc_spr_md_dbcam, ppc_spr_md_dbram0) (ppc_spr_md_dbram1, ppc_spr_ummcr0, ppc_spr_upmc1, ppc_spr_upmc2) (ppc_spr_usia, ppc_spr_ummcr1, ppc_spr_upmc3, ppc_spr_upmc4) (ppc_spr_zpr, ppc_spr_pid, ppc_spr_mmcr0, ppc_spr_pmc1) (ppc_spr_sgr, ppc_spr_pmc2, ppc_spr_dcwr, ppc_spr_sia) (ppc_spr_mmcr1, ppc_spr_pmc3, ppc_spr_pmc4, ppc_spr_sda) (ppc_spr_tbhu, ppc_spr_tblu, ppc_spr_dmiss, ppc_spr_dcmp) (ppc_spr_hash1, ppc_spr_hash2, ppc_spr_icdbdr, ppc_spr_imiss) (ppc_spr_esr, ppc_spr_icmp, ppc_spr_dear, ppc_spr_rpa) (ppc_spr_evpr, ppc_spr_cdbcr, ppc_spr_tsr, ppc_spr_602_tcr) (ppc_spr_403_tcr, ppc_spr_ibr, ppc_spr_pit, ppc_spr_esasrr) (ppc_spr_tbhi, ppc_spr_tblo, ppc_spr_srr2, ppc_spr_sebr) (ppc_spr_srr3, ppc_spr_ser, ppc_spr_hid0, ppc_spr_dbsr) (ppc_spr_hid1, ppc_spr_iabr, ppc_spr_dbcr, ppc_spr_iac1) (ppc_spr_dabr, ppc_spr_iac2, ppc_spr_dac1, ppc_spr_dac2) (ppc_spr_l2cr, ppc_spr_dccr, ppc_spr_ictc, ppc_spr_iccr) (ppc_spr_thrm1, ppc_spr_pbl1, ppc_spr_thrm2, ppc_spr_pbu1) (ppc_spr_thrm3, ppc_spr_pbl2, ppc_spr_fpecr, ppc_spr_lt) (ppc_spr_pir, ppc_spr_pbu2): New enum constants for PowerPC special-purpose register numbers.
2004-07-15 01:13:13 +02:00
/* Constants for SPR register numbers. These are *not* GDB register
numbers: they are the numbers used in the PowerPC ISA itself to
refer to these registers.
This table includes all the SPRs from all the variants I could find
documentation for.
There may be registers from different PowerPC variants assigned the
same number, but that's fine: GDB and the SIM always use the
numbers in the context of a particular variant, so it's not
ambiguous.
We need to deviate from the naming pattern when variants have
special-purpose registers of the same name, but with different
numbers. Fortunately, this is rare: look below to see how we
handle the 'tcr' registers on the 403/403GX and 602. */
enum
{
ppc_spr_mq = 0,
ppc_spr_xer = 1,
ppc_spr_rtcu = 4,
ppc_spr_rtcl = 5,
ppc_spr_lr = 8,
ppc_spr_ctr = 9,
ppc_spr_cnt = 9,
ppc_spr_dsisr = 18,
ppc_spr_dar = 19,
ppc_spr_dec = 22,
ppc_spr_sdr1 = 25,
ppc_spr_srr0 = 26,
ppc_spr_srr1 = 27,
ppc_spr_eie = 80,
ppc_spr_eid = 81,
ppc_spr_nri = 82,
ppc_spr_sp = 102,
ppc_spr_cmpa = 144,
ppc_spr_cmpb = 145,
ppc_spr_cmpc = 146,
ppc_spr_cmpd = 147,
ppc_spr_icr = 148,
ppc_spr_der = 149,
ppc_spr_counta = 150,
ppc_spr_countb = 151,
ppc_spr_cmpe = 152,
ppc_spr_cmpf = 153,
ppc_spr_cmpg = 154,
ppc_spr_cmph = 155,
ppc_spr_lctrl1 = 156,
ppc_spr_lctrl2 = 157,
ppc_spr_ictrl = 158,
ppc_spr_bar = 159,
ppc_spr_vrsave = 256,
ppc_spr_sprg0 = 272,
ppc_spr_sprg1 = 273,
ppc_spr_sprg2 = 274,
ppc_spr_sprg3 = 275,
ppc_spr_asr = 280,
* ppc-tdep.h (ppc_spr_mq, ppc_spr_xer, ppc_spr_rtcu, ppc_spr_rtcl) (ppc_spr_lr, ppc_spr_ctr, ppc_spr_cnt, ppc_spr_dsisr, ppc_spr_dar) (ppc_spr_dec, ppc_spr_sdr1, ppc_spr_srr0, ppc_spr_srr1) (ppc_spr_eie, ppc_spr_eid, ppc_spr_nri, ppc_spr_sp, ppc_spr_cmpa) (ppc_spr_cmpb, ppc_spr_cmpc, ppc_spr_cmpd, ppc_spr_icr) (ppc_spr_der, ppc_spr_counta, ppc_spr_countb, ppc_spr_cmpe) (ppc_spr_cmpf, ppc_spr_cmpg, ppc_spr_cmph, ppc_spr_lctrl1) (ppc_spr_lctrl2, ppc_spr_ictrl, ppc_spr_bar, ppc_spr_vrsave) (ppc_spr_sprg0, ppc_spr_sprg1, ppc_spr_sprg2, ppc_spr_sprg3) (ppc_spr_ear, ppc_spr_tbl, ppc_spr_tbu, ppc_spr_pvr) (ppc_spr_spefscr, ppc_spr_ibat0u, ppc_spr_ibat0l, ppc_spr_ibat1u) (ppc_spr_ibat1l, ppc_spr_ibat2u, ppc_spr_ibat2l, ppc_spr_ibat3u) (ppc_spr_ibat3l, ppc_spr_dbat0u, ppc_spr_dbat0l, ppc_spr_dbat1u) (ppc_spr_dbat1l, ppc_spr_dbat2u, ppc_spr_dbat2l, ppc_spr_dbat3u) (ppc_spr_dbat3l, ppc_spr_ic_cst, ppc_spr_ic_adr, ppc_spr_ic_dat) (ppc_spr_dc_cst, ppc_spr_dc_adr, ppc_spr_dc_dat, ppc_spr_dpdr) (ppc_spr_dpir, ppc_spr_immr, ppc_spr_mi_ctr, ppc_spr_mi_ap) (ppc_spr_mi_epn, ppc_spr_mi_twc, ppc_spr_mi_rpn, ppc_spr_mi_cam) (ppc_spr_mi_ram0, ppc_spr_mi_ram1, ppc_spr_md_ctr, ppc_spr_m_casid) (ppc_spr_md_ap, ppc_spr_md_epn, ppc_spr_md_twb, ppc_spr_md_twc) (ppc_spr_md_rpn, ppc_spr_m_tw, ppc_spr_md_dbcam, ppc_spr_md_dbram0) (ppc_spr_md_dbram1, ppc_spr_ummcr0, ppc_spr_upmc1, ppc_spr_upmc2) (ppc_spr_usia, ppc_spr_ummcr1, ppc_spr_upmc3, ppc_spr_upmc4) (ppc_spr_zpr, ppc_spr_pid, ppc_spr_mmcr0, ppc_spr_pmc1) (ppc_spr_sgr, ppc_spr_pmc2, ppc_spr_dcwr, ppc_spr_sia) (ppc_spr_mmcr1, ppc_spr_pmc3, ppc_spr_pmc4, ppc_spr_sda) (ppc_spr_tbhu, ppc_spr_tblu, ppc_spr_dmiss, ppc_spr_dcmp) (ppc_spr_hash1, ppc_spr_hash2, ppc_spr_icdbdr, ppc_spr_imiss) (ppc_spr_esr, ppc_spr_icmp, ppc_spr_dear, ppc_spr_rpa) (ppc_spr_evpr, ppc_spr_cdbcr, ppc_spr_tsr, ppc_spr_602_tcr) (ppc_spr_403_tcr, ppc_spr_ibr, ppc_spr_pit, ppc_spr_esasrr) (ppc_spr_tbhi, ppc_spr_tblo, ppc_spr_srr2, ppc_spr_sebr) (ppc_spr_srr3, ppc_spr_ser, ppc_spr_hid0, ppc_spr_dbsr) (ppc_spr_hid1, ppc_spr_iabr, ppc_spr_dbcr, ppc_spr_iac1) (ppc_spr_dabr, ppc_spr_iac2, ppc_spr_dac1, ppc_spr_dac2) (ppc_spr_l2cr, ppc_spr_dccr, ppc_spr_ictc, ppc_spr_iccr) (ppc_spr_thrm1, ppc_spr_pbl1, ppc_spr_thrm2, ppc_spr_pbu1) (ppc_spr_thrm3, ppc_spr_pbl2, ppc_spr_fpecr, ppc_spr_lt) (ppc_spr_pir, ppc_spr_pbu2): New enum constants for PowerPC special-purpose register numbers.
2004-07-15 01:13:13 +02:00
ppc_spr_ear = 282,
ppc_spr_tbl = 284,
ppc_spr_tbu = 285,
ppc_spr_pvr = 287,
ppc_spr_spefscr = 512,
ppc_spr_ibat0u = 528,
ppc_spr_ibat0l = 529,
ppc_spr_ibat1u = 530,
ppc_spr_ibat1l = 531,
ppc_spr_ibat2u = 532,
ppc_spr_ibat2l = 533,
ppc_spr_ibat3u = 534,
ppc_spr_ibat3l = 535,
ppc_spr_dbat0u = 536,
ppc_spr_dbat0l = 537,
ppc_spr_dbat1u = 538,
ppc_spr_dbat1l = 539,
ppc_spr_dbat2u = 540,
ppc_spr_dbat2l = 541,
ppc_spr_dbat3u = 542,
ppc_spr_dbat3l = 543,
ppc_spr_ic_cst = 560,
ppc_spr_ic_adr = 561,
ppc_spr_ic_dat = 562,
ppc_spr_dc_cst = 568,
ppc_spr_dc_adr = 569,
ppc_spr_dc_dat = 570,
ppc_spr_dpdr = 630,
ppc_spr_dpir = 631,
ppc_spr_immr = 638,
ppc_spr_mi_ctr = 784,
ppc_spr_mi_ap = 786,
ppc_spr_mi_epn = 787,
ppc_spr_mi_twc = 789,
ppc_spr_mi_rpn = 790,
ppc_spr_mi_cam = 816,
ppc_spr_mi_ram0 = 817,
ppc_spr_mi_ram1 = 818,
ppc_spr_md_ctr = 792,
ppc_spr_m_casid = 793,
ppc_spr_md_ap = 794,
ppc_spr_md_epn = 795,
ppc_spr_m_twb = 796,
* ppc-tdep.h (ppc_spr_mq, ppc_spr_xer, ppc_spr_rtcu, ppc_spr_rtcl) (ppc_spr_lr, ppc_spr_ctr, ppc_spr_cnt, ppc_spr_dsisr, ppc_spr_dar) (ppc_spr_dec, ppc_spr_sdr1, ppc_spr_srr0, ppc_spr_srr1) (ppc_spr_eie, ppc_spr_eid, ppc_spr_nri, ppc_spr_sp, ppc_spr_cmpa) (ppc_spr_cmpb, ppc_spr_cmpc, ppc_spr_cmpd, ppc_spr_icr) (ppc_spr_der, ppc_spr_counta, ppc_spr_countb, ppc_spr_cmpe) (ppc_spr_cmpf, ppc_spr_cmpg, ppc_spr_cmph, ppc_spr_lctrl1) (ppc_spr_lctrl2, ppc_spr_ictrl, ppc_spr_bar, ppc_spr_vrsave) (ppc_spr_sprg0, ppc_spr_sprg1, ppc_spr_sprg2, ppc_spr_sprg3) (ppc_spr_ear, ppc_spr_tbl, ppc_spr_tbu, ppc_spr_pvr) (ppc_spr_spefscr, ppc_spr_ibat0u, ppc_spr_ibat0l, ppc_spr_ibat1u) (ppc_spr_ibat1l, ppc_spr_ibat2u, ppc_spr_ibat2l, ppc_spr_ibat3u) (ppc_spr_ibat3l, ppc_spr_dbat0u, ppc_spr_dbat0l, ppc_spr_dbat1u) (ppc_spr_dbat1l, ppc_spr_dbat2u, ppc_spr_dbat2l, ppc_spr_dbat3u) (ppc_spr_dbat3l, ppc_spr_ic_cst, ppc_spr_ic_adr, ppc_spr_ic_dat) (ppc_spr_dc_cst, ppc_spr_dc_adr, ppc_spr_dc_dat, ppc_spr_dpdr) (ppc_spr_dpir, ppc_spr_immr, ppc_spr_mi_ctr, ppc_spr_mi_ap) (ppc_spr_mi_epn, ppc_spr_mi_twc, ppc_spr_mi_rpn, ppc_spr_mi_cam) (ppc_spr_mi_ram0, ppc_spr_mi_ram1, ppc_spr_md_ctr, ppc_spr_m_casid) (ppc_spr_md_ap, ppc_spr_md_epn, ppc_spr_md_twb, ppc_spr_md_twc) (ppc_spr_md_rpn, ppc_spr_m_tw, ppc_spr_md_dbcam, ppc_spr_md_dbram0) (ppc_spr_md_dbram1, ppc_spr_ummcr0, ppc_spr_upmc1, ppc_spr_upmc2) (ppc_spr_usia, ppc_spr_ummcr1, ppc_spr_upmc3, ppc_spr_upmc4) (ppc_spr_zpr, ppc_spr_pid, ppc_spr_mmcr0, ppc_spr_pmc1) (ppc_spr_sgr, ppc_spr_pmc2, ppc_spr_dcwr, ppc_spr_sia) (ppc_spr_mmcr1, ppc_spr_pmc3, ppc_spr_pmc4, ppc_spr_sda) (ppc_spr_tbhu, ppc_spr_tblu, ppc_spr_dmiss, ppc_spr_dcmp) (ppc_spr_hash1, ppc_spr_hash2, ppc_spr_icdbdr, ppc_spr_imiss) (ppc_spr_esr, ppc_spr_icmp, ppc_spr_dear, ppc_spr_rpa) (ppc_spr_evpr, ppc_spr_cdbcr, ppc_spr_tsr, ppc_spr_602_tcr) (ppc_spr_403_tcr, ppc_spr_ibr, ppc_spr_pit, ppc_spr_esasrr) (ppc_spr_tbhi, ppc_spr_tblo, ppc_spr_srr2, ppc_spr_sebr) (ppc_spr_srr3, ppc_spr_ser, ppc_spr_hid0, ppc_spr_dbsr) (ppc_spr_hid1, ppc_spr_iabr, ppc_spr_dbcr, ppc_spr_iac1) (ppc_spr_dabr, ppc_spr_iac2, ppc_spr_dac1, ppc_spr_dac2) (ppc_spr_l2cr, ppc_spr_dccr, ppc_spr_ictc, ppc_spr_iccr) (ppc_spr_thrm1, ppc_spr_pbl1, ppc_spr_thrm2, ppc_spr_pbu1) (ppc_spr_thrm3, ppc_spr_pbl2, ppc_spr_fpecr, ppc_spr_lt) (ppc_spr_pir, ppc_spr_pbu2): New enum constants for PowerPC special-purpose register numbers.
2004-07-15 01:13:13 +02:00
ppc_spr_md_twc = 797,
ppc_spr_md_rpn = 798,
ppc_spr_m_tw = 799,
ppc_spr_mi_dbcam = 816,
ppc_spr_mi_dbram0 = 817,
ppc_spr_mi_dbram1 = 818,
* ppc-tdep.h (ppc_spr_mq, ppc_spr_xer, ppc_spr_rtcu, ppc_spr_rtcl) (ppc_spr_lr, ppc_spr_ctr, ppc_spr_cnt, ppc_spr_dsisr, ppc_spr_dar) (ppc_spr_dec, ppc_spr_sdr1, ppc_spr_srr0, ppc_spr_srr1) (ppc_spr_eie, ppc_spr_eid, ppc_spr_nri, ppc_spr_sp, ppc_spr_cmpa) (ppc_spr_cmpb, ppc_spr_cmpc, ppc_spr_cmpd, ppc_spr_icr) (ppc_spr_der, ppc_spr_counta, ppc_spr_countb, ppc_spr_cmpe) (ppc_spr_cmpf, ppc_spr_cmpg, ppc_spr_cmph, ppc_spr_lctrl1) (ppc_spr_lctrl2, ppc_spr_ictrl, ppc_spr_bar, ppc_spr_vrsave) (ppc_spr_sprg0, ppc_spr_sprg1, ppc_spr_sprg2, ppc_spr_sprg3) (ppc_spr_ear, ppc_spr_tbl, ppc_spr_tbu, ppc_spr_pvr) (ppc_spr_spefscr, ppc_spr_ibat0u, ppc_spr_ibat0l, ppc_spr_ibat1u) (ppc_spr_ibat1l, ppc_spr_ibat2u, ppc_spr_ibat2l, ppc_spr_ibat3u) (ppc_spr_ibat3l, ppc_spr_dbat0u, ppc_spr_dbat0l, ppc_spr_dbat1u) (ppc_spr_dbat1l, ppc_spr_dbat2u, ppc_spr_dbat2l, ppc_spr_dbat3u) (ppc_spr_dbat3l, ppc_spr_ic_cst, ppc_spr_ic_adr, ppc_spr_ic_dat) (ppc_spr_dc_cst, ppc_spr_dc_adr, ppc_spr_dc_dat, ppc_spr_dpdr) (ppc_spr_dpir, ppc_spr_immr, ppc_spr_mi_ctr, ppc_spr_mi_ap) (ppc_spr_mi_epn, ppc_spr_mi_twc, ppc_spr_mi_rpn, ppc_spr_mi_cam) (ppc_spr_mi_ram0, ppc_spr_mi_ram1, ppc_spr_md_ctr, ppc_spr_m_casid) (ppc_spr_md_ap, ppc_spr_md_epn, ppc_spr_md_twb, ppc_spr_md_twc) (ppc_spr_md_rpn, ppc_spr_m_tw, ppc_spr_md_dbcam, ppc_spr_md_dbram0) (ppc_spr_md_dbram1, ppc_spr_ummcr0, ppc_spr_upmc1, ppc_spr_upmc2) (ppc_spr_usia, ppc_spr_ummcr1, ppc_spr_upmc3, ppc_spr_upmc4) (ppc_spr_zpr, ppc_spr_pid, ppc_spr_mmcr0, ppc_spr_pmc1) (ppc_spr_sgr, ppc_spr_pmc2, ppc_spr_dcwr, ppc_spr_sia) (ppc_spr_mmcr1, ppc_spr_pmc3, ppc_spr_pmc4, ppc_spr_sda) (ppc_spr_tbhu, ppc_spr_tblu, ppc_spr_dmiss, ppc_spr_dcmp) (ppc_spr_hash1, ppc_spr_hash2, ppc_spr_icdbdr, ppc_spr_imiss) (ppc_spr_esr, ppc_spr_icmp, ppc_spr_dear, ppc_spr_rpa) (ppc_spr_evpr, ppc_spr_cdbcr, ppc_spr_tsr, ppc_spr_602_tcr) (ppc_spr_403_tcr, ppc_spr_ibr, ppc_spr_pit, ppc_spr_esasrr) (ppc_spr_tbhi, ppc_spr_tblo, ppc_spr_srr2, ppc_spr_sebr) (ppc_spr_srr3, ppc_spr_ser, ppc_spr_hid0, ppc_spr_dbsr) (ppc_spr_hid1, ppc_spr_iabr, ppc_spr_dbcr, ppc_spr_iac1) (ppc_spr_dabr, ppc_spr_iac2, ppc_spr_dac1, ppc_spr_dac2) (ppc_spr_l2cr, ppc_spr_dccr, ppc_spr_ictc, ppc_spr_iccr) (ppc_spr_thrm1, ppc_spr_pbl1, ppc_spr_thrm2, ppc_spr_pbu1) (ppc_spr_thrm3, ppc_spr_pbl2, ppc_spr_fpecr, ppc_spr_lt) (ppc_spr_pir, ppc_spr_pbu2): New enum constants for PowerPC special-purpose register numbers.
2004-07-15 01:13:13 +02:00
ppc_spr_md_dbcam = 824,
ppc_spr_md_cam = 824,
* ppc-tdep.h (ppc_spr_mq, ppc_spr_xer, ppc_spr_rtcu, ppc_spr_rtcl) (ppc_spr_lr, ppc_spr_ctr, ppc_spr_cnt, ppc_spr_dsisr, ppc_spr_dar) (ppc_spr_dec, ppc_spr_sdr1, ppc_spr_srr0, ppc_spr_srr1) (ppc_spr_eie, ppc_spr_eid, ppc_spr_nri, ppc_spr_sp, ppc_spr_cmpa) (ppc_spr_cmpb, ppc_spr_cmpc, ppc_spr_cmpd, ppc_spr_icr) (ppc_spr_der, ppc_spr_counta, ppc_spr_countb, ppc_spr_cmpe) (ppc_spr_cmpf, ppc_spr_cmpg, ppc_spr_cmph, ppc_spr_lctrl1) (ppc_spr_lctrl2, ppc_spr_ictrl, ppc_spr_bar, ppc_spr_vrsave) (ppc_spr_sprg0, ppc_spr_sprg1, ppc_spr_sprg2, ppc_spr_sprg3) (ppc_spr_ear, ppc_spr_tbl, ppc_spr_tbu, ppc_spr_pvr) (ppc_spr_spefscr, ppc_spr_ibat0u, ppc_spr_ibat0l, ppc_spr_ibat1u) (ppc_spr_ibat1l, ppc_spr_ibat2u, ppc_spr_ibat2l, ppc_spr_ibat3u) (ppc_spr_ibat3l, ppc_spr_dbat0u, ppc_spr_dbat0l, ppc_spr_dbat1u) (ppc_spr_dbat1l, ppc_spr_dbat2u, ppc_spr_dbat2l, ppc_spr_dbat3u) (ppc_spr_dbat3l, ppc_spr_ic_cst, ppc_spr_ic_adr, ppc_spr_ic_dat) (ppc_spr_dc_cst, ppc_spr_dc_adr, ppc_spr_dc_dat, ppc_spr_dpdr) (ppc_spr_dpir, ppc_spr_immr, ppc_spr_mi_ctr, ppc_spr_mi_ap) (ppc_spr_mi_epn, ppc_spr_mi_twc, ppc_spr_mi_rpn, ppc_spr_mi_cam) (ppc_spr_mi_ram0, ppc_spr_mi_ram1, ppc_spr_md_ctr, ppc_spr_m_casid) (ppc_spr_md_ap, ppc_spr_md_epn, ppc_spr_md_twb, ppc_spr_md_twc) (ppc_spr_md_rpn, ppc_spr_m_tw, ppc_spr_md_dbcam, ppc_spr_md_dbram0) (ppc_spr_md_dbram1, ppc_spr_ummcr0, ppc_spr_upmc1, ppc_spr_upmc2) (ppc_spr_usia, ppc_spr_ummcr1, ppc_spr_upmc3, ppc_spr_upmc4) (ppc_spr_zpr, ppc_spr_pid, ppc_spr_mmcr0, ppc_spr_pmc1) (ppc_spr_sgr, ppc_spr_pmc2, ppc_spr_dcwr, ppc_spr_sia) (ppc_spr_mmcr1, ppc_spr_pmc3, ppc_spr_pmc4, ppc_spr_sda) (ppc_spr_tbhu, ppc_spr_tblu, ppc_spr_dmiss, ppc_spr_dcmp) (ppc_spr_hash1, ppc_spr_hash2, ppc_spr_icdbdr, ppc_spr_imiss) (ppc_spr_esr, ppc_spr_icmp, ppc_spr_dear, ppc_spr_rpa) (ppc_spr_evpr, ppc_spr_cdbcr, ppc_spr_tsr, ppc_spr_602_tcr) (ppc_spr_403_tcr, ppc_spr_ibr, ppc_spr_pit, ppc_spr_esasrr) (ppc_spr_tbhi, ppc_spr_tblo, ppc_spr_srr2, ppc_spr_sebr) (ppc_spr_srr3, ppc_spr_ser, ppc_spr_hid0, ppc_spr_dbsr) (ppc_spr_hid1, ppc_spr_iabr, ppc_spr_dbcr, ppc_spr_iac1) (ppc_spr_dabr, ppc_spr_iac2, ppc_spr_dac1, ppc_spr_dac2) (ppc_spr_l2cr, ppc_spr_dccr, ppc_spr_ictc, ppc_spr_iccr) (ppc_spr_thrm1, ppc_spr_pbl1, ppc_spr_thrm2, ppc_spr_pbu1) (ppc_spr_thrm3, ppc_spr_pbl2, ppc_spr_fpecr, ppc_spr_lt) (ppc_spr_pir, ppc_spr_pbu2): New enum constants for PowerPC special-purpose register numbers.
2004-07-15 01:13:13 +02:00
ppc_spr_md_dbram0 = 825,
ppc_spr_md_ram0 = 825,
* ppc-tdep.h (ppc_spr_mq, ppc_spr_xer, ppc_spr_rtcu, ppc_spr_rtcl) (ppc_spr_lr, ppc_spr_ctr, ppc_spr_cnt, ppc_spr_dsisr, ppc_spr_dar) (ppc_spr_dec, ppc_spr_sdr1, ppc_spr_srr0, ppc_spr_srr1) (ppc_spr_eie, ppc_spr_eid, ppc_spr_nri, ppc_spr_sp, ppc_spr_cmpa) (ppc_spr_cmpb, ppc_spr_cmpc, ppc_spr_cmpd, ppc_spr_icr) (ppc_spr_der, ppc_spr_counta, ppc_spr_countb, ppc_spr_cmpe) (ppc_spr_cmpf, ppc_spr_cmpg, ppc_spr_cmph, ppc_spr_lctrl1) (ppc_spr_lctrl2, ppc_spr_ictrl, ppc_spr_bar, ppc_spr_vrsave) (ppc_spr_sprg0, ppc_spr_sprg1, ppc_spr_sprg2, ppc_spr_sprg3) (ppc_spr_ear, ppc_spr_tbl, ppc_spr_tbu, ppc_spr_pvr) (ppc_spr_spefscr, ppc_spr_ibat0u, ppc_spr_ibat0l, ppc_spr_ibat1u) (ppc_spr_ibat1l, ppc_spr_ibat2u, ppc_spr_ibat2l, ppc_spr_ibat3u) (ppc_spr_ibat3l, ppc_spr_dbat0u, ppc_spr_dbat0l, ppc_spr_dbat1u) (ppc_spr_dbat1l, ppc_spr_dbat2u, ppc_spr_dbat2l, ppc_spr_dbat3u) (ppc_spr_dbat3l, ppc_spr_ic_cst, ppc_spr_ic_adr, ppc_spr_ic_dat) (ppc_spr_dc_cst, ppc_spr_dc_adr, ppc_spr_dc_dat, ppc_spr_dpdr) (ppc_spr_dpir, ppc_spr_immr, ppc_spr_mi_ctr, ppc_spr_mi_ap) (ppc_spr_mi_epn, ppc_spr_mi_twc, ppc_spr_mi_rpn, ppc_spr_mi_cam) (ppc_spr_mi_ram0, ppc_spr_mi_ram1, ppc_spr_md_ctr, ppc_spr_m_casid) (ppc_spr_md_ap, ppc_spr_md_epn, ppc_spr_md_twb, ppc_spr_md_twc) (ppc_spr_md_rpn, ppc_spr_m_tw, ppc_spr_md_dbcam, ppc_spr_md_dbram0) (ppc_spr_md_dbram1, ppc_spr_ummcr0, ppc_spr_upmc1, ppc_spr_upmc2) (ppc_spr_usia, ppc_spr_ummcr1, ppc_spr_upmc3, ppc_spr_upmc4) (ppc_spr_zpr, ppc_spr_pid, ppc_spr_mmcr0, ppc_spr_pmc1) (ppc_spr_sgr, ppc_spr_pmc2, ppc_spr_dcwr, ppc_spr_sia) (ppc_spr_mmcr1, ppc_spr_pmc3, ppc_spr_pmc4, ppc_spr_sda) (ppc_spr_tbhu, ppc_spr_tblu, ppc_spr_dmiss, ppc_spr_dcmp) (ppc_spr_hash1, ppc_spr_hash2, ppc_spr_icdbdr, ppc_spr_imiss) (ppc_spr_esr, ppc_spr_icmp, ppc_spr_dear, ppc_spr_rpa) (ppc_spr_evpr, ppc_spr_cdbcr, ppc_spr_tsr, ppc_spr_602_tcr) (ppc_spr_403_tcr, ppc_spr_ibr, ppc_spr_pit, ppc_spr_esasrr) (ppc_spr_tbhi, ppc_spr_tblo, ppc_spr_srr2, ppc_spr_sebr) (ppc_spr_srr3, ppc_spr_ser, ppc_spr_hid0, ppc_spr_dbsr) (ppc_spr_hid1, ppc_spr_iabr, ppc_spr_dbcr, ppc_spr_iac1) (ppc_spr_dabr, ppc_spr_iac2, ppc_spr_dac1, ppc_spr_dac2) (ppc_spr_l2cr, ppc_spr_dccr, ppc_spr_ictc, ppc_spr_iccr) (ppc_spr_thrm1, ppc_spr_pbl1, ppc_spr_thrm2, ppc_spr_pbu1) (ppc_spr_thrm3, ppc_spr_pbl2, ppc_spr_fpecr, ppc_spr_lt) (ppc_spr_pir, ppc_spr_pbu2): New enum constants for PowerPC special-purpose register numbers.
2004-07-15 01:13:13 +02:00
ppc_spr_md_dbram1 = 826,
ppc_spr_md_ram1 = 826,
* ppc-tdep.h (ppc_spr_mq, ppc_spr_xer, ppc_spr_rtcu, ppc_spr_rtcl) (ppc_spr_lr, ppc_spr_ctr, ppc_spr_cnt, ppc_spr_dsisr, ppc_spr_dar) (ppc_spr_dec, ppc_spr_sdr1, ppc_spr_srr0, ppc_spr_srr1) (ppc_spr_eie, ppc_spr_eid, ppc_spr_nri, ppc_spr_sp, ppc_spr_cmpa) (ppc_spr_cmpb, ppc_spr_cmpc, ppc_spr_cmpd, ppc_spr_icr) (ppc_spr_der, ppc_spr_counta, ppc_spr_countb, ppc_spr_cmpe) (ppc_spr_cmpf, ppc_spr_cmpg, ppc_spr_cmph, ppc_spr_lctrl1) (ppc_spr_lctrl2, ppc_spr_ictrl, ppc_spr_bar, ppc_spr_vrsave) (ppc_spr_sprg0, ppc_spr_sprg1, ppc_spr_sprg2, ppc_spr_sprg3) (ppc_spr_ear, ppc_spr_tbl, ppc_spr_tbu, ppc_spr_pvr) (ppc_spr_spefscr, ppc_spr_ibat0u, ppc_spr_ibat0l, ppc_spr_ibat1u) (ppc_spr_ibat1l, ppc_spr_ibat2u, ppc_spr_ibat2l, ppc_spr_ibat3u) (ppc_spr_ibat3l, ppc_spr_dbat0u, ppc_spr_dbat0l, ppc_spr_dbat1u) (ppc_spr_dbat1l, ppc_spr_dbat2u, ppc_spr_dbat2l, ppc_spr_dbat3u) (ppc_spr_dbat3l, ppc_spr_ic_cst, ppc_spr_ic_adr, ppc_spr_ic_dat) (ppc_spr_dc_cst, ppc_spr_dc_adr, ppc_spr_dc_dat, ppc_spr_dpdr) (ppc_spr_dpir, ppc_spr_immr, ppc_spr_mi_ctr, ppc_spr_mi_ap) (ppc_spr_mi_epn, ppc_spr_mi_twc, ppc_spr_mi_rpn, ppc_spr_mi_cam) (ppc_spr_mi_ram0, ppc_spr_mi_ram1, ppc_spr_md_ctr, ppc_spr_m_casid) (ppc_spr_md_ap, ppc_spr_md_epn, ppc_spr_md_twb, ppc_spr_md_twc) (ppc_spr_md_rpn, ppc_spr_m_tw, ppc_spr_md_dbcam, ppc_spr_md_dbram0) (ppc_spr_md_dbram1, ppc_spr_ummcr0, ppc_spr_upmc1, ppc_spr_upmc2) (ppc_spr_usia, ppc_spr_ummcr1, ppc_spr_upmc3, ppc_spr_upmc4) (ppc_spr_zpr, ppc_spr_pid, ppc_spr_mmcr0, ppc_spr_pmc1) (ppc_spr_sgr, ppc_spr_pmc2, ppc_spr_dcwr, ppc_spr_sia) (ppc_spr_mmcr1, ppc_spr_pmc3, ppc_spr_pmc4, ppc_spr_sda) (ppc_spr_tbhu, ppc_spr_tblu, ppc_spr_dmiss, ppc_spr_dcmp) (ppc_spr_hash1, ppc_spr_hash2, ppc_spr_icdbdr, ppc_spr_imiss) (ppc_spr_esr, ppc_spr_icmp, ppc_spr_dear, ppc_spr_rpa) (ppc_spr_evpr, ppc_spr_cdbcr, ppc_spr_tsr, ppc_spr_602_tcr) (ppc_spr_403_tcr, ppc_spr_ibr, ppc_spr_pit, ppc_spr_esasrr) (ppc_spr_tbhi, ppc_spr_tblo, ppc_spr_srr2, ppc_spr_sebr) (ppc_spr_srr3, ppc_spr_ser, ppc_spr_hid0, ppc_spr_dbsr) (ppc_spr_hid1, ppc_spr_iabr, ppc_spr_dbcr, ppc_spr_iac1) (ppc_spr_dabr, ppc_spr_iac2, ppc_spr_dac1, ppc_spr_dac2) (ppc_spr_l2cr, ppc_spr_dccr, ppc_spr_ictc, ppc_spr_iccr) (ppc_spr_thrm1, ppc_spr_pbl1, ppc_spr_thrm2, ppc_spr_pbu1) (ppc_spr_thrm3, ppc_spr_pbl2, ppc_spr_fpecr, ppc_spr_lt) (ppc_spr_pir, ppc_spr_pbu2): New enum constants for PowerPC special-purpose register numbers.
2004-07-15 01:13:13 +02:00
ppc_spr_ummcr0 = 936,
ppc_spr_upmc1 = 937,
ppc_spr_upmc2 = 938,
ppc_spr_usia = 939,
ppc_spr_ummcr1 = 940,
ppc_spr_upmc3 = 941,
ppc_spr_upmc4 = 942,
ppc_spr_zpr = 944,
ppc_spr_pid = 945,
ppc_spr_mmcr0 = 952,
ppc_spr_pmc1 = 953,
ppc_spr_sgr = 953,
ppc_spr_pmc2 = 954,
ppc_spr_dcwr = 954,
ppc_spr_sia = 955,
ppc_spr_mmcr1 = 956,
ppc_spr_pmc3 = 957,
ppc_spr_pmc4 = 958,
ppc_spr_sda = 959,
ppc_spr_tbhu = 972,
ppc_spr_tblu = 973,
ppc_spr_dmiss = 976,
ppc_spr_dcmp = 977,
ppc_spr_hash1 = 978,
ppc_spr_hash2 = 979,
ppc_spr_icdbdr = 979,
ppc_spr_imiss = 980,
ppc_spr_esr = 980,
ppc_spr_icmp = 981,
ppc_spr_dear = 981,
ppc_spr_rpa = 982,
ppc_spr_evpr = 982,
ppc_spr_cdbcr = 983,
ppc_spr_tsr = 984,
ppc_spr_602_tcr = 984,
ppc_spr_403_tcr = 986,
ppc_spr_ibr = 986,
ppc_spr_pit = 987,
ppc_spr_esasrr = 988,
ppc_spr_tbhi = 988,
ppc_spr_tblo = 989,
ppc_spr_srr2 = 990,
ppc_spr_sebr = 990,
ppc_spr_srr3 = 991,
ppc_spr_ser = 991,
ppc_spr_hid0 = 1008,
ppc_spr_dbsr = 1008,
ppc_spr_hid1 = 1009,
ppc_spr_iabr = 1010,
ppc_spr_dbcr = 1010,
ppc_spr_iac1 = 1012,
ppc_spr_dabr = 1013,
ppc_spr_iac2 = 1013,
ppc_spr_dac1 = 1014,
ppc_spr_dac2 = 1015,
ppc_spr_l2cr = 1017,
ppc_spr_dccr = 1018,
ppc_spr_ictc = 1019,
ppc_spr_iccr = 1019,
ppc_spr_thrm1 = 1020,
ppc_spr_pbl1 = 1020,
ppc_spr_thrm2 = 1021,
ppc_spr_pbu1 = 1021,
ppc_spr_thrm3 = 1022,
ppc_spr_pbl2 = 1022,
ppc_spr_fpecr = 1022,
ppc_spr_lt = 1022,
ppc_spr_pir = 1023,
ppc_spr_pbu2 = 1023
};
2001-11-01 02:07:35 +01:00
#endif