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binutils-gdb/ld/testsuite/ld-powerpc/callstub-4.d

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Power10 stub selection This patch better supports mixing of power10 and non-power10 code, as might be seen in a cpu-optimized library using ifuncs to select functions optimized for a given cpu. Using -Wl,--no-power10-stubs isn't that good in this situation since non-power10 notoc stubs are slower and larger than the power10 variants, which you'd like to use on power10 code paths. With this change, power10 pc-relative code that makes calls marked @notoc uses power10 stubs if stubs are necessary, and other calls use non-power10 instructions in stubs. This will mean that if gcc is generating code for -mcpu=power10 but with pc-rel disabled then you'll get the older stubs even on power10 (unless you force with -Wl,--power10-stubs). That shouldn't be too big a problem: stubs that use r2 are reasonable. It's just the ones that set up addressing using "mflr 12; bcl 20,31,.+4; mflr 11; mtlr 12" that should be avoided if possible. bfd/ * elf64-ppc.c (struct ppc_link_hash_table): Add has_power10_relocs. (select_alt_stub): New function. (ppc_get_stub_entry): Use it here. (ppc64_elf_check_relocs): Set had_power10_relocs rather than power10_stubs. (ppc64_elf_size_stubs): Clear power10_stubs here instead. Don't merge notoc stubs with other varieties when power10_stubs is "auto". Instead dup the stub hash table entry. (plt_stub_size, ppc_build_one_stub, ppc_size_one_stub): Adjust tests of power10_stubs. ld/ * emultempl/ppc64elf.em (power10-stubs): Accept optional "auto" arg. * ld.texi (power10-stubs): Update. * testsuite/ld-powerpc/callstub-1.d: Force --power10-stubs. * testsuite/ld-powerpc/callstub-2.d: Relax branch offset comparison. * testsuite/ld-powerpc/callstub-4.d: New test. * testsuite/ld-powerpc/notoc.d: Force --no-power10-stubs. * testsuite/ld-powerpc/notoc3.d, * testsuite/ld-powerpc/notoc3.s, * testsuite/ld-powerpc/notoc3.wf: New test. * testsuite/ld-powerpc/powerpc.exp: Run new tests. Pass --no-power10-stubs for notoc link. (cherry picked from commit e10a07b32dc1faed25b5bbcbbc47d68e2ff537b9)
2020-07-17 09:17:28 +02:00
#source: callstub-1.s
#as: -a64 -mpower10
#ld: -melf64ppc -shared --plt-align=0 --hash-style=gnu
#objdump: -dr -Mpower10
.*
Disassembly of section \.text:
.*\.plt_call\.f1>:
.*: (04 10 00 01|01 00 10 04) pld r12,.*
.*: (e5 80 .. ..|.. .. 80 e5)
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
.*: (4e 80 04 20|20 04 80 4e) bctr
.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
.*: (e9 82 80 28|28 80 82 e9) ld r12,-32728\(r2\)
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
.*: (4e 80 04 20|20 04 80 4e) bctr
.*\.plt_call\.f2>:
.*: (04 10 00 01|01 00 10 04) pld r12,.*
.*: (e5 80 .. ..|.. .. 80 e5)
.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
.*: (4e 80 04 20|20 04 80 4e) bctr
#...
.*<_start>:
.*: (4b ff .. ..|.. .. ff 4b) bl .*\.plt_call\.f1\+0x10>
.*: (e8 41 00 18|18 00 41 e8) ld r2,24\(r1\)
.*: (4b ff .. ..|.. .. ff 4b) bl .*\.plt_call\.f1>
.*: (4b ff .. ..|.. .. ff 4b) bl .*\.plt_call\.f2>
#pass