2003-10-10 09:13:11 +02:00
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/* Target-specific definition for a Renesas Super-H.
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2007-01-09 18:59:20 +01:00
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Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
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2009-01-03 06:58:08 +01:00
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2003, 2007, 2008, 2009 Free Software Foundation, Inc.
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2002-05-17 08:55:49 +02:00
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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2007-08-23 20:08:50 +02:00
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the Free Software Foundation; either version 3 of the License, or
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2002-05-17 08:55:49 +02:00
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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2007-08-23 20:08:50 +02:00
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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2002-05-17 08:55:49 +02:00
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#ifndef SH_TDEP_H
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#define SH_TDEP_H
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/* Contributed by Steve Chamberlain sac@cygnus.com */
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2003-09-16 17:56:03 +02:00
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/* Registers for all SH variants. Used also by sh3-rom.c. */
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2002-05-17 08:55:49 +02:00
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enum
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{
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R0_REGNUM = 0,
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STRUCT_RETURN_REGNUM = 2,
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2003-09-08 13:26:21 +02:00
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ARG0_REGNUM = 4,
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ARGLAST_REGNUM = 7,
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2003-09-16 17:56:03 +02:00
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FP_REGNUM = 14,
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2003-09-08 13:26:21 +02:00
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PR_REGNUM = 17,
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2002-05-17 08:55:49 +02:00
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GBR_REGNUM = 18,
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VBR_REGNUM = 19,
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MACH_REGNUM = 20,
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MACL_REGNUM = 21,
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2003-09-08 13:26:21 +02:00
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SR_REGNUM = 22,
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2003-09-16 17:56:03 +02:00
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FPUL_REGNUM = 23,
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/* Floating point registers */
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FPSCR_REGNUM = 24,
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2006-04-03 16:31:14 +02:00
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FR0_REGNUM = 25,
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2003-09-08 13:26:21 +02:00
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FLOAT_ARG0_REGNUM = 29,
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2003-09-16 17:56:03 +02:00
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FLOAT_ARGLAST_REGNUM = 36,
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FP_LAST_REGNUM = 40,
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/* sh3,sh4 registers */
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SSR_REGNUM = 41,
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SPC_REGNUM = 42,
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/* DSP registers */
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DSR_REGNUM = 24,
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A0G_REGNUM = 25,
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A0_REGNUM = 26,
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A1G_REGNUM = 27,
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A1_REGNUM = 28,
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M0_REGNUM = 29,
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M1_REGNUM = 30,
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X0_REGNUM = 31,
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X1_REGNUM = 32,
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Y0_REGNUM = 33,
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Y1_REGNUM = 34,
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MOD_REGNUM = 40,
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RS_REGNUM = 43,
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RE_REGNUM = 44,
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2004-02-17 17:04:19 +01:00
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DSP_R0_BANK_REGNUM = 51,
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DSP_R7_BANK_REGNUM = 58,
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* sh-tdep.c (SH_NUM_REGS): Define as 67.
(sh_sh_register_name): Add eight empty register names.
(sh_sh3_register_name): Ditto.
(sh_sh3e_register_name): Ditto.
(sh_sh2e_register_name): Ditto.
(sh_sh2a_register_name): New function, defining SH2A register set.
(sh_sh2a_nofpu_register_name): New function, defining SH2A register set
in nofpu case.
(sh_sh_dsp_register_name): Add eight empty register names.
(sh_sh3_dsp_register_name): Ditto.
(sh_sh4_register_name): Ditto.
(sh_sh4_nofpu_register_name): Ditto.
(sh_sh4al_dsp_register_name): Ditto.
(sh2a_show_regs): New function.
(sh2a_nofpu_show_regs): New function.
(sh_sh2a_register_type): New function.
(do_bank_register_info): New function.
(sh_print_pseudo_register): Call do_bank_register_info.
Call sh_print_pseudo_register for valid "bank" register.
(sh_sh2a_register_sim_regno): New function.
(sh_gdbarch_init): Add bfd_mach_sh2a and bfd_mach_sh2a_nofpu handling.
Increment pseudo register count by one for all sh variants with
pseudo registers to accomodate pseudo bank register.
* sh-tdep.h: Add register numbers for R0_BANK0_REGNUM, MACHB_REGNUM,
IVNB_REGNUM, PRB_REGNUM, GBRB_REGNUM, MACLB_REGNUM, BANK_REGNUM,
IBCR_REGNUM, IBNR_REGNUM, TBR_REGNUM and PSEUDO_BANK_REGNUM.
Increment pseudo register numbers.
2004-10-06 10:55:36 +02:00
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/* sh2a register */
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R0_BANK0_REGNUM = 43,
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MACHB_REGNUM = 58,
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IVNB_REGNUM = 59,
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PRB_REGNUM = 60,
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GBRB_REGNUM = 61,
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MACLB_REGNUM = 62,
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BANK_REGNUM = 63,
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IBCR_REGNUM = 64,
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IBNR_REGNUM = 65,
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TBR_REGNUM = 66,
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PSEUDO_BANK_REGNUM = 67,
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2003-09-16 17:56:03 +02:00
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/* Floating point pseudo registers */
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* sh-tdep.c (SH_NUM_REGS): Define as 67.
(sh_sh_register_name): Add eight empty register names.
(sh_sh3_register_name): Ditto.
(sh_sh3e_register_name): Ditto.
(sh_sh2e_register_name): Ditto.
(sh_sh2a_register_name): New function, defining SH2A register set.
(sh_sh2a_nofpu_register_name): New function, defining SH2A register set
in nofpu case.
(sh_sh_dsp_register_name): Add eight empty register names.
(sh_sh3_dsp_register_name): Ditto.
(sh_sh4_register_name): Ditto.
(sh_sh4_nofpu_register_name): Ditto.
(sh_sh4al_dsp_register_name): Ditto.
(sh2a_show_regs): New function.
(sh2a_nofpu_show_regs): New function.
(sh_sh2a_register_type): New function.
(do_bank_register_info): New function.
(sh_print_pseudo_register): Call do_bank_register_info.
Call sh_print_pseudo_register for valid "bank" register.
(sh_sh2a_register_sim_regno): New function.
(sh_gdbarch_init): Add bfd_mach_sh2a and bfd_mach_sh2a_nofpu handling.
Increment pseudo register count by one for all sh variants with
pseudo registers to accomodate pseudo bank register.
* sh-tdep.h: Add register numbers for R0_BANK0_REGNUM, MACHB_REGNUM,
IVNB_REGNUM, PRB_REGNUM, GBRB_REGNUM, MACLB_REGNUM, BANK_REGNUM,
IBCR_REGNUM, IBNR_REGNUM, TBR_REGNUM and PSEUDO_BANK_REGNUM.
Increment pseudo register numbers.
2004-10-06 10:55:36 +02:00
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DR0_REGNUM = 68,
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DR_LAST_REGNUM = 75,
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FV0_REGNUM = 76,
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FV_LAST_REGNUM = 79
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2002-05-17 08:55:49 +02:00
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};
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2003-09-08 13:26:21 +02:00
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extern gdbarch_init_ftype sh64_gdbarch_init;
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* sh-tdep.h (sh_show_regs): Add FRAME parameter.
* sh-tdep.c (sh_show_regs): Likewise.
(sh_show_regs_command): Pass current frame to sh_show_regs routine.
(sh_generic_show_regs): Add FRAME parameter. Use register
values from that frame instead of calling read_register.
(sh3_show_regs, sh2e_show_regs, sh2a_show_regs, sh2a_nofpu_show_regs,
sh3e_show_regs, sh3_dsp_show_regs, sh4_show_regs, sh4_nofpu_show_regs,
sh_dsp_show_regs): Likewise.
* sh64-tdep.c (sh64_show_media_regs, sh64_show_compact_regs,
sh64_show_regs): Likewise.
2007-06-16 00:31:01 +02:00
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extern void sh64_show_regs (struct frame_info *);
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2003-09-08 13:26:21 +02:00
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2002-05-17 08:55:49 +02:00
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#endif /* SH_TDEP_H */
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