binutils-gdb/gdb/arch/arm.c

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Implement breakpoint_kind_from_pc and sw_breakpoint_from_kind for ARM in GDBServer. ARM can have multiple breakpoint types based on the instruction set it's currently in: arm, thumb or thumb2. GDBServer needs to know what breakpoint is to be inserted at location when inserting a breakpoint. This is handled by the breakpoint_kind_from_pc and sw_breakpoint_from_kind target ops introduced in a previous patch, this patch adds the arm_breakpoint_kind_from_pc and arm_sw_breakpoint_from_kind implementation so that the proper breakpoint type is returned based on the pc. Also in order to share some code with GDB a new file called arm.c have been introduced in arch/. While this file does not contain much yet future patches will add more to it thus the inclusion at this stage. No regressions on Ubuntu 14.04 on ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } gdb/ChangeLog: * Makefile.in: Add arm.c/o. * arch/arm.c: New file. * arch/arm.h: (IS_THUMB_ADDR): Move macro from arm-tdep.c. (MAKE_THUMB_ADDR): Likewise. (UNMAKE_THUMB_ADDR): Likewise. * arm-tdep.c (int thumb_insn_size): Move to arm.c. (IS_THUMB_ADDR): Move to arm.h. (MAKE_THUMB_ADDR): Likewise. (UNMAKE_THUMB_ADDR): Likewise. * configure.tgt: Add arm.o to all ARM configs. gdb/gdbserver/ChangeLog: * Makefile.in: Add arm.c/o. * configure.srv: Likewise. * linux-arm-low.c (arm_breakpoint_kinds): New enum. (arm_breakpoint_kind_from_pc): New function. (arm_sw_breakpoint_from_kind): Return proper kind. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize.
2015-10-21 17:13:41 +02:00
/* Common target dependent code for GDB on ARM systems.
Copyright (C) 1988-2016 Free Software Foundation, Inc.
Implement breakpoint_kind_from_pc and sw_breakpoint_from_kind for ARM in GDBServer. ARM can have multiple breakpoint types based on the instruction set it's currently in: arm, thumb or thumb2. GDBServer needs to know what breakpoint is to be inserted at location when inserting a breakpoint. This is handled by the breakpoint_kind_from_pc and sw_breakpoint_from_kind target ops introduced in a previous patch, this patch adds the arm_breakpoint_kind_from_pc and arm_sw_breakpoint_from_kind implementation so that the proper breakpoint type is returned based on the pc. Also in order to share some code with GDB a new file called arm.c have been introduced in arch/. While this file does not contain much yet future patches will add more to it thus the inclusion at this stage. No regressions on Ubuntu 14.04 on ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } gdb/ChangeLog: * Makefile.in: Add arm.c/o. * arch/arm.c: New file. * arch/arm.h: (IS_THUMB_ADDR): Move macro from arm-tdep.c. (MAKE_THUMB_ADDR): Likewise. (UNMAKE_THUMB_ADDR): Likewise. * arm-tdep.c (int thumb_insn_size): Move to arm.c. (IS_THUMB_ADDR): Move to arm.h. (MAKE_THUMB_ADDR): Likewise. (UNMAKE_THUMB_ADDR): Likewise. * configure.tgt: Add arm.o to all ARM configs. gdb/gdbserver/ChangeLog: * Makefile.in: Add arm.c/o. * configure.srv: Likewise. * linux-arm-low.c (arm_breakpoint_kinds): New enum. (arm_breakpoint_kind_from_pc): New function. (arm_sw_breakpoint_from_kind): Return proper kind. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize.
2015-10-21 17:13:41 +02:00
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "common-defs.h"
Support software single step on ARM in GDBServer This patch teaches GDBServer how to software single step on ARM linux by sharing code with GDB. The arm_get_next_pcs function in GDB is now shared with GDBServer. So that GDBServer can use the function to return the possible addresses of the next PC. A proper shared context was also needed so that we could share the code, this context is described in the arm_get_next_pcs structure. Testing : No regressions, tested on ubuntu 14.04 ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } gdb/ChangeLog: * Makefile.in (ALL_TARGET_OBS): Append arm-get-next-pcs.o, arm-linux.o. (ALLDEPFILES): Append arm-get-next-pcs.c, arm-linux.c (arm-linux.o): New rule. (arm-get-next-pcs.o): New rule. * arch/arm-get-next-pcs.c: New file. * arch/arm-get-next-pcs.h: New file. * arch/arm-linux.h: New file. * arch/arm-linux.c: New file. * arm.c: Include common-regcache.c. (thumb_advance_itstate): Moved from arm-tdep.c. (arm_instruction_changes_pc): Likewise. (thumb_instruction_changes_pc): Likewise. (thumb2_instruction_changes_pc): Likewise. (shifted_reg_val): Likewise. * arm.h (submask): Move macro from arm-tdep.h (bit): Likewise. (bits): Likewise. (sbits): Likewise. (BranchDest): Likewise. (thumb_advance_itstate): Moved declaration from arm-tdep.h (arm_instruction_changes_pc): Likewise. (thumb_instruction_changes_pc): Likewise. (thumb2_instruction_changes_pc): Likewise. (shifted_reg_val): Likewise. * arm-linux-tdep.c: Include arch/arm.h, arch/arm-get-next-pcs.h arch/arm-linux.h. (arm_linux_get_next_pcs_ops): New struct. (ARM_SIGCONTEXT_R0, ARM_UCONTEXT_SIGCONTEXT, ARM_OLD_RT_SIGFRAME_SIGINFO, ARM_OLD_RT_SIGFRAME_UCONTEXT, ARM_NEW_RT_SIGFRAME_UCONTEXT, ARM_NEW_SIGFRAME_MAGIC): Move stack layout defines to arch/arm-linux.h. (arm_linux_sigreturn_next_pc_offset): Move to arch/arm-linux.c. (arm_linux_software_single_step): Adjust for arm_get_next_pcs implementation. * arm-tdep.c: Include arch/arm-get-next-pcs.h. (arm_get_next_pcs_ops): New struct. (submask): Move macro to arm.h. (bit): Likewise. (bits): Likewise. (sbits): Likewise. (BranchDest): Likewise. (thumb_instruction_changes_pc): Move to arm.c (thumb2_instruction_changes_pc): Likewise. (arm_instruction_changes_pc): Likewise. (shifted_reg_val): Likewise. (thumb_advance_itstate): Likewise. (thumb_get_next_pc_raw): Move to arm-get-next-pcs.c. (arm_get_next_pc_raw): Likewise. (arm_get_next_pc): Likewise. (thumb_deal_with_atomic_sequence_raw): Likewise. (arm_deal_with_atomic_sequence_raw): Likewise. (arm_deal_with_atomic_sequence): Likewise. (arm_get_next_pcs_read_memory_unsigned_integer): New function. (arm_get_next_pcs_addr_bits_remove): Likewise. (arm_get_next_pcs_syscall_next_pc): Likewise. (arm_get_next_pcs_is_thumb): Likewise. (arm_software_single_step): Adjust for arm_get_next_pcs implementation. * arm-tdep.h: (arm_get_next_pc): Remove declaration. (arm_get_next_pcs_read_memory_unsigned_integer): New declaration. (arm_get_next_pcs_addr_bits_remove): Likewise. (arm_get_next_pcs_syscall_next_pc): Likewise. (arm_get_next_pcs_is_thumb): Likewise. (arm_deal_with_atomic_sequence: Remove declaration. * common/gdb_vecs.h: Add CORE_ADDR vector definition. * configure.tgt (aarch64*-*-linux): Add arm-get-next-pcs.o, arm-linux.o. (arm*-wince-pe): Add arm-get-next-pcs.o. (arm*-*-linux*): Add arm-get-next-pcs.o, arm-linux.o, arm-get-next-pcs.o (arm*-*-netbsd*,arm*-*-knetbsd*-gnu): Add arm-get-next-pcs.o. (arm*-*-openbsd*): Likewise. (arm*-*-symbianelf*): Likewise. (arm*-*-*): Likewise. * symtab.h: Move CORE_ADDR vector definition to gdb_vecs.h. gdb/gdbserver/ChangeLog: * Makefile.in (SFILES): Append arch/arm-linux.c, arch/arm-get-next-pcs.c. (arm-linux.o): New rule. (arm-get-next-pcs.o): New rule. * configure.srv (arm*-*-linux*): Add arm-get-next-pcs.o, arm-linux.o. * linux-aarch32-low.c (arm_abi_breakpoint): Remove macro. Moved to linux-aarch32-low.c. (arm_eabi_breakpoint, arm_breakpoint): Likewise. (arm_breakpoint_len, thumb_breakpoint): Likewise. (thumb_breakpoint_len, thumb2_breakpoint): Likewise. (thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode): Make non-static. * linux-aarch32-low.h (arm_abi_breakpoint): New macro. Moved from linux-aarch32-low.c. (arm_eabi_breakpoint, arm_breakpoint): Likewise. (arm_breakpoint_len, thumb_breakpoint): Likewise. (thumb_breakpoint_len, thumb2_breakpoint): Likewise. (thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode): New declaration. * linux-arm-low.c: Include arch/arm-linux.h aarch/arm-get-next-pcs.h, sys/syscall.h. (get_next_pcs_ops): New struct. (get_next_pcs_addr_bits_remove): New function. (get_next_pcs_is_thumb): New function. (get_next_pcs_read_memory_unsigned_integer): Likewise. (arm_sigreturn_next_pc): Likewise. (get_next_pcs_syscall_next_pc): Likewise. (arm_gdbserver_get_next_pcs): Likewise. (struct linux_target_ops) <arm_gdbserver_get_next_pcs>: Initialize. * linux-low.h: Move CORE_ADDR vector definition to gdb_vecs.h. * server.h: Include gdb_vecs.h.
2015-12-18 17:33:59 +01:00
#include "common-regcache.h"
Implement breakpoint_kind_from_pc and sw_breakpoint_from_kind for ARM in GDBServer. ARM can have multiple breakpoint types based on the instruction set it's currently in: arm, thumb or thumb2. GDBServer needs to know what breakpoint is to be inserted at location when inserting a breakpoint. This is handled by the breakpoint_kind_from_pc and sw_breakpoint_from_kind target ops introduced in a previous patch, this patch adds the arm_breakpoint_kind_from_pc and arm_sw_breakpoint_from_kind implementation so that the proper breakpoint type is returned based on the pc. Also in order to share some code with GDB a new file called arm.c have been introduced in arch/. While this file does not contain much yet future patches will add more to it thus the inclusion at this stage. No regressions on Ubuntu 14.04 on ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } gdb/ChangeLog: * Makefile.in: Add arm.c/o. * arch/arm.c: New file. * arch/arm.h: (IS_THUMB_ADDR): Move macro from arm-tdep.c. (MAKE_THUMB_ADDR): Likewise. (UNMAKE_THUMB_ADDR): Likewise. * arm-tdep.c (int thumb_insn_size): Move to arm.c. (IS_THUMB_ADDR): Move to arm.h. (MAKE_THUMB_ADDR): Likewise. (UNMAKE_THUMB_ADDR): Likewise. * configure.tgt: Add arm.o to all ARM configs. gdb/gdbserver/ChangeLog: * Makefile.in: Add arm.c/o. * configure.srv: Likewise. * linux-arm-low.c (arm_breakpoint_kinds): New enum. (arm_breakpoint_kind_from_pc): New function. (arm_sw_breakpoint_from_kind): Return proper kind. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize.
2015-10-21 17:13:41 +02:00
#include "arm.h"
/* See arm.h. */
Implement breakpoint_kind_from_pc and sw_breakpoint_from_kind for ARM in GDBServer. ARM can have multiple breakpoint types based on the instruction set it's currently in: arm, thumb or thumb2. GDBServer needs to know what breakpoint is to be inserted at location when inserting a breakpoint. This is handled by the breakpoint_kind_from_pc and sw_breakpoint_from_kind target ops introduced in a previous patch, this patch adds the arm_breakpoint_kind_from_pc and arm_sw_breakpoint_from_kind implementation so that the proper breakpoint type is returned based on the pc. Also in order to share some code with GDB a new file called arm.c have been introduced in arch/. While this file does not contain much yet future patches will add more to it thus the inclusion at this stage. No regressions on Ubuntu 14.04 on ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } gdb/ChangeLog: * Makefile.in: Add arm.c/o. * arch/arm.c: New file. * arch/arm.h: (IS_THUMB_ADDR): Move macro from arm-tdep.c. (MAKE_THUMB_ADDR): Likewise. (UNMAKE_THUMB_ADDR): Likewise. * arm-tdep.c (int thumb_insn_size): Move to arm.c. (IS_THUMB_ADDR): Move to arm.h. (MAKE_THUMB_ADDR): Likewise. (UNMAKE_THUMB_ADDR): Likewise. * configure.tgt: Add arm.o to all ARM configs. gdb/gdbserver/ChangeLog: * Makefile.in: Add arm.c/o. * configure.srv: Likewise. * linux-arm-low.c (arm_breakpoint_kinds): New enum. (arm_breakpoint_kind_from_pc): New function. (arm_sw_breakpoint_from_kind): Return proper kind. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize.
2015-10-21 17:13:41 +02:00
int
thumb_insn_size (unsigned short inst1)
{
if ((inst1 & 0xe000) == 0xe000 && (inst1 & 0x1800) != 0)
return 4;
else
return 2;
}
/* See arm.h. */
int
bitcount (unsigned long val)
{
int nbits;
for (nbits = 0; val != 0; nbits++)
val &= val - 1; /* Delete rightmost 1-bit in val. */
return nbits;
}
/* See arm.h. */
int
condition_true (unsigned long cond, unsigned long status_reg)
{
if (cond == INST_AL || cond == INST_NV)
return 1;
switch (cond)
{
case INST_EQ:
return ((status_reg & FLAG_Z) != 0);
case INST_NE:
return ((status_reg & FLAG_Z) == 0);
case INST_CS:
return ((status_reg & FLAG_C) != 0);
case INST_CC:
return ((status_reg & FLAG_C) == 0);
case INST_MI:
return ((status_reg & FLAG_N) != 0);
case INST_PL:
return ((status_reg & FLAG_N) == 0);
case INST_VS:
return ((status_reg & FLAG_V) != 0);
case INST_VC:
return ((status_reg & FLAG_V) == 0);
case INST_HI:
return ((status_reg & (FLAG_C | FLAG_Z)) == FLAG_C);
case INST_LS:
return ((status_reg & (FLAG_C | FLAG_Z)) != FLAG_C);
case INST_GE:
return (((status_reg & FLAG_N) == 0) == ((status_reg & FLAG_V) == 0));
case INST_LT:
return (((status_reg & FLAG_N) == 0) != ((status_reg & FLAG_V) == 0));
case INST_GT:
return (((status_reg & FLAG_Z) == 0)
&& (((status_reg & FLAG_N) == 0)
== ((status_reg & FLAG_V) == 0)));
case INST_LE:
return (((status_reg & FLAG_Z) != 0)
|| (((status_reg & FLAG_N) == 0)
!= ((status_reg & FLAG_V) == 0)));
}
return 1;
}
Support software single step on ARM in GDBServer This patch teaches GDBServer how to software single step on ARM linux by sharing code with GDB. The arm_get_next_pcs function in GDB is now shared with GDBServer. So that GDBServer can use the function to return the possible addresses of the next PC. A proper shared context was also needed so that we could share the code, this context is described in the arm_get_next_pcs structure. Testing : No regressions, tested on ubuntu 14.04 ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } gdb/ChangeLog: * Makefile.in (ALL_TARGET_OBS): Append arm-get-next-pcs.o, arm-linux.o. (ALLDEPFILES): Append arm-get-next-pcs.c, arm-linux.c (arm-linux.o): New rule. (arm-get-next-pcs.o): New rule. * arch/arm-get-next-pcs.c: New file. * arch/arm-get-next-pcs.h: New file. * arch/arm-linux.h: New file. * arch/arm-linux.c: New file. * arm.c: Include common-regcache.c. (thumb_advance_itstate): Moved from arm-tdep.c. (arm_instruction_changes_pc): Likewise. (thumb_instruction_changes_pc): Likewise. (thumb2_instruction_changes_pc): Likewise. (shifted_reg_val): Likewise. * arm.h (submask): Move macro from arm-tdep.h (bit): Likewise. (bits): Likewise. (sbits): Likewise. (BranchDest): Likewise. (thumb_advance_itstate): Moved declaration from arm-tdep.h (arm_instruction_changes_pc): Likewise. (thumb_instruction_changes_pc): Likewise. (thumb2_instruction_changes_pc): Likewise. (shifted_reg_val): Likewise. * arm-linux-tdep.c: Include arch/arm.h, arch/arm-get-next-pcs.h arch/arm-linux.h. (arm_linux_get_next_pcs_ops): New struct. (ARM_SIGCONTEXT_R0, ARM_UCONTEXT_SIGCONTEXT, ARM_OLD_RT_SIGFRAME_SIGINFO, ARM_OLD_RT_SIGFRAME_UCONTEXT, ARM_NEW_RT_SIGFRAME_UCONTEXT, ARM_NEW_SIGFRAME_MAGIC): Move stack layout defines to arch/arm-linux.h. (arm_linux_sigreturn_next_pc_offset): Move to arch/arm-linux.c. (arm_linux_software_single_step): Adjust for arm_get_next_pcs implementation. * arm-tdep.c: Include arch/arm-get-next-pcs.h. (arm_get_next_pcs_ops): New struct. (submask): Move macro to arm.h. (bit): Likewise. (bits): Likewise. (sbits): Likewise. (BranchDest): Likewise. (thumb_instruction_changes_pc): Move to arm.c (thumb2_instruction_changes_pc): Likewise. (arm_instruction_changes_pc): Likewise. (shifted_reg_val): Likewise. (thumb_advance_itstate): Likewise. (thumb_get_next_pc_raw): Move to arm-get-next-pcs.c. (arm_get_next_pc_raw): Likewise. (arm_get_next_pc): Likewise. (thumb_deal_with_atomic_sequence_raw): Likewise. (arm_deal_with_atomic_sequence_raw): Likewise. (arm_deal_with_atomic_sequence): Likewise. (arm_get_next_pcs_read_memory_unsigned_integer): New function. (arm_get_next_pcs_addr_bits_remove): Likewise. (arm_get_next_pcs_syscall_next_pc): Likewise. (arm_get_next_pcs_is_thumb): Likewise. (arm_software_single_step): Adjust for arm_get_next_pcs implementation. * arm-tdep.h: (arm_get_next_pc): Remove declaration. (arm_get_next_pcs_read_memory_unsigned_integer): New declaration. (arm_get_next_pcs_addr_bits_remove): Likewise. (arm_get_next_pcs_syscall_next_pc): Likewise. (arm_get_next_pcs_is_thumb): Likewise. (arm_deal_with_atomic_sequence: Remove declaration. * common/gdb_vecs.h: Add CORE_ADDR vector definition. * configure.tgt (aarch64*-*-linux): Add arm-get-next-pcs.o, arm-linux.o. (arm*-wince-pe): Add arm-get-next-pcs.o. (arm*-*-linux*): Add arm-get-next-pcs.o, arm-linux.o, arm-get-next-pcs.o (arm*-*-netbsd*,arm*-*-knetbsd*-gnu): Add arm-get-next-pcs.o. (arm*-*-openbsd*): Likewise. (arm*-*-symbianelf*): Likewise. (arm*-*-*): Likewise. * symtab.h: Move CORE_ADDR vector definition to gdb_vecs.h. gdb/gdbserver/ChangeLog: * Makefile.in (SFILES): Append arch/arm-linux.c, arch/arm-get-next-pcs.c. (arm-linux.o): New rule. (arm-get-next-pcs.o): New rule. * configure.srv (arm*-*-linux*): Add arm-get-next-pcs.o, arm-linux.o. * linux-aarch32-low.c (arm_abi_breakpoint): Remove macro. Moved to linux-aarch32-low.c. (arm_eabi_breakpoint, arm_breakpoint): Likewise. (arm_breakpoint_len, thumb_breakpoint): Likewise. (thumb_breakpoint_len, thumb2_breakpoint): Likewise. (thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode): Make non-static. * linux-aarch32-low.h (arm_abi_breakpoint): New macro. Moved from linux-aarch32-low.c. (arm_eabi_breakpoint, arm_breakpoint): Likewise. (arm_breakpoint_len, thumb_breakpoint): Likewise. (thumb_breakpoint_len, thumb2_breakpoint): Likewise. (thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode): New declaration. * linux-arm-low.c: Include arch/arm-linux.h aarch/arm-get-next-pcs.h, sys/syscall.h. (get_next_pcs_ops): New struct. (get_next_pcs_addr_bits_remove): New function. (get_next_pcs_is_thumb): New function. (get_next_pcs_read_memory_unsigned_integer): Likewise. (arm_sigreturn_next_pc): Likewise. (get_next_pcs_syscall_next_pc): Likewise. (arm_gdbserver_get_next_pcs): Likewise. (struct linux_target_ops) <arm_gdbserver_get_next_pcs>: Initialize. * linux-low.h: Move CORE_ADDR vector definition to gdb_vecs.h. * server.h: Include gdb_vecs.h.
2015-12-18 17:33:59 +01:00
/* See arm.h. */
int
thumb_advance_itstate (unsigned int itstate)
{
/* Preserve IT[7:5], the first three bits of the condition. Shift
the upcoming condition flags left by one bit. */
itstate = (itstate & 0xe0) | ((itstate << 1) & 0x1f);
/* If we have finished the IT block, clear the state. */
if ((itstate & 0x0f) == 0)
itstate = 0;
return itstate;
}
/* See arm.h. */
int
arm_instruction_changes_pc (uint32_t this_instr)
{
if (bits (this_instr, 28, 31) == INST_NV)
/* Unconditional instructions. */
switch (bits (this_instr, 24, 27))
{
case 0xa:
case 0xb:
/* Branch with Link and change to Thumb. */
return 1;
case 0xc:
case 0xd:
case 0xe:
/* Coprocessor register transfer. */
if (bits (this_instr, 12, 15) == 15)
error (_("Invalid update to pc in instruction"));
return 0;
default:
return 0;
}
else
switch (bits (this_instr, 25, 27))
{
case 0x0:
if (bits (this_instr, 23, 24) == 2 && bit (this_instr, 20) == 0)
{
/* Multiplies and extra load/stores. */
if (bit (this_instr, 4) == 1 && bit (this_instr, 7) == 1)
/* Neither multiplies nor extension load/stores are allowed
to modify PC. */
return 0;
/* Otherwise, miscellaneous instructions. */
/* BX <reg>, BXJ <reg>, BLX <reg> */
if (bits (this_instr, 4, 27) == 0x12fff1
|| bits (this_instr, 4, 27) == 0x12fff2
|| bits (this_instr, 4, 27) == 0x12fff3)
return 1;
/* Other miscellaneous instructions are unpredictable if they
modify PC. */
return 0;
}
/* Data processing instruction. Fall through. */
case 0x1:
if (bits (this_instr, 12, 15) == 15)
return 1;
else
return 0;
case 0x2:
case 0x3:
/* Media instructions and architecturally undefined instructions. */
if (bits (this_instr, 25, 27) == 3 && bit (this_instr, 4) == 1)
return 0;
/* Stores. */
if (bit (this_instr, 20) == 0)
return 0;
/* Loads. */
if (bits (this_instr, 12, 15) == ARM_PC_REGNUM)
return 1;
else
return 0;
case 0x4:
/* Load/store multiple. */
if (bit (this_instr, 20) == 1 && bit (this_instr, 15) == 1)
return 1;
else
return 0;
case 0x5:
/* Branch and branch with link. */
return 1;
case 0x6:
case 0x7:
/* Coprocessor transfers or SWIs can not affect PC. */
return 0;
default:
internal_error (__FILE__, __LINE__, _("bad value in switch"));
}
}
/* See arm.h. */
int
thumb_instruction_changes_pc (unsigned short inst)
{
if ((inst & 0xff00) == 0xbd00) /* pop {rlist, pc} */
return 1;
if ((inst & 0xf000) == 0xd000) /* conditional branch */
return 1;
if ((inst & 0xf800) == 0xe000) /* unconditional branch */
return 1;
if ((inst & 0xff00) == 0x4700) /* bx REG, blx REG */
return 1;
if ((inst & 0xff87) == 0x4687) /* mov pc, REG */
return 1;
if ((inst & 0xf500) == 0xb100) /* CBNZ or CBZ. */
return 1;
return 0;
}
/* See arm.h. */
int
thumb2_instruction_changes_pc (unsigned short inst1, unsigned short inst2)
{
if ((inst1 & 0xf800) == 0xf000 && (inst2 & 0x8000) == 0x8000)
{
/* Branches and miscellaneous control instructions. */
if ((inst2 & 0x1000) != 0 || (inst2 & 0xd001) == 0xc000)
{
/* B, BL, BLX. */
return 1;
}
else if (inst1 == 0xf3de && (inst2 & 0xff00) == 0x3f00)
{
/* SUBS PC, LR, #imm8. */
return 1;
}
else if ((inst2 & 0xd000) == 0x8000 && (inst1 & 0x0380) != 0x0380)
{
/* Conditional branch. */
return 1;
}
return 0;
}
if ((inst1 & 0xfe50) == 0xe810)
{
/* Load multiple or RFE. */
if (bit (inst1, 7) && !bit (inst1, 8))
{
/* LDMIA or POP */
if (bit (inst2, 15))
return 1;
}
else if (!bit (inst1, 7) && bit (inst1, 8))
{
/* LDMDB */
if (bit (inst2, 15))
return 1;
}
else if (bit (inst1, 7) && bit (inst1, 8))
{
/* RFEIA */
return 1;
}
else if (!bit (inst1, 7) && !bit (inst1, 8))
{
/* RFEDB */
return 1;
}
return 0;
}
if ((inst1 & 0xffef) == 0xea4f && (inst2 & 0xfff0) == 0x0f00)
{
/* MOV PC or MOVS PC. */
return 1;
}
if ((inst1 & 0xff70) == 0xf850 && (inst2 & 0xf000) == 0xf000)
{
/* LDR PC. */
if (bits (inst1, 0, 3) == 15)
return 1;
if (bit (inst1, 7))
return 1;
if (bit (inst2, 11))
return 1;
if ((inst2 & 0x0fc0) == 0x0000)
return 1;
return 0;
}
if ((inst1 & 0xfff0) == 0xe8d0 && (inst2 & 0xfff0) == 0xf000)
{
/* TBB. */
return 1;
}
if ((inst1 & 0xfff0) == 0xe8d0 && (inst2 & 0xfff0) == 0xf010)
{
/* TBH. */
return 1;
}
return 0;
}
/* See arm.h. */
unsigned long
shifted_reg_val (struct regcache *regcache, unsigned long inst,
int carry, unsigned long pc_val, unsigned long status_reg)
{
unsigned long res, shift;
int rm = bits (inst, 0, 3);
unsigned long shifttype = bits (inst, 5, 6);
if (bit (inst, 4))
{
int rs = bits (inst, 8, 11);
shift = (rs == 15
? pc_val + 8
: regcache_raw_get_unsigned (regcache, rs)) & 0xFF;
}
else
shift = bits (inst, 7, 11);
res = (rm == ARM_PC_REGNUM
? (pc_val + (bit (inst, 4) ? 12 : 8))
: regcache_raw_get_unsigned (regcache, rm));
switch (shifttype)
{
case 0: /* LSL */
res = shift >= 32 ? 0 : res << shift;
break;
case 1: /* LSR */
res = shift >= 32 ? 0 : res >> shift;
break;
case 2: /* ASR */
if (shift >= 32)
shift = 31;
res = ((res & 0x80000000L)
? ~((~res) >> shift) : res >> shift);
break;
case 3: /* ROR/RRX */
shift &= 31;
if (shift == 0)
res = (res >> 1) | (carry ? 0x80000000L : 0);
else
res = (res >> shift) | (res << (32 - shift));
break;
}
return res & 0xffffffff;
}