1999-05-03 09:29:11 +02:00
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/* GAS interface for targets using CGEN: Cpu tools GENerator.
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Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free Software
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Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <setjmp.h>
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#include "ansidecl.h"
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#include "libiberty.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "cgen-desc.h"
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#include "as.h"
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#include "subsegs.h"
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#include "cgen.h"
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/* Opcode table descriptor, must be set by md_begin. */
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CGEN_CPU_DESC gas_cgen_cpu_desc;
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/* Callback to insert a register into the symbol table.
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A target may choose to let GAS parse the registers.
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??? Not currently used. */
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void
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cgen_asm_record_register (name, number)
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char * name;
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int number;
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{
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/* Use symbol_create here instead of symbol_new so we don't try to
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output registers into the object file's symbol table. */
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symbol_table_insert (symbol_create (name, reg_section,
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number, & zero_address_frag));
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}
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/* We need to keep a list of fixups. We can't simply generate them as
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we go, because that would require us to first create the frag, and
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that would screw up references to ``.''.
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This is used by cpu's with simple operands. It keeps knowledge of what
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an `expressionS' is and what a `fixup' is out of CGEN which for the time
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being is preferable.
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OPINDEX is the index in the operand table.
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OPINFO is something the caller chooses to help in reloc determination. */
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struct fixup
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{
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int opindex;
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int opinfo;
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expressionS exp;
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};
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static struct fixup fixups [GAS_CGEN_MAX_FIXUPS];
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static int num_fixups;
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/* Prepare to parse an instruction.
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??? May wish to make this static and delete calls in md_assemble. */
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void
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gas_cgen_init_parse ()
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{
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num_fixups = 0;
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}
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/* Queue a fixup. */
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static void
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queue_fixup (opindex, opinfo, expP)
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int opindex;
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expressionS * expP;
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{
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/* We need to generate a fixup for this expression. */
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if (num_fixups >= GAS_CGEN_MAX_FIXUPS)
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as_fatal (_("too many fixups"));
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fixups[num_fixups].exp = * expP;
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fixups[num_fixups].opindex = opindex;
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fixups[num_fixups].opinfo = opinfo;
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++ num_fixups;
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}
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/* The following three functions allow a backup of the fixup chain to be made,
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and to have this backup be swapped with the current chain. This allows
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certain ports, eg the m32r, to swap two instructions and swap their fixups
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at the same time. */
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/* ??? I think with cgen_asm_finish_insn (or something else) there is no
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more need for this. */
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static struct fixup saved_fixups [GAS_CGEN_MAX_FIXUPS];
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static int saved_num_fixups;
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void
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gas_cgen_save_fixups ()
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{
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saved_num_fixups = num_fixups;
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memcpy (saved_fixups, fixups, sizeof (fixups[0]) * num_fixups);
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num_fixups = 0;
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}
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void
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gas_cgen_restore_fixups ()
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{
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num_fixups = saved_num_fixups;
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memcpy (fixups, saved_fixups, sizeof (fixups[0]) * num_fixups);
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saved_num_fixups = 0;
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}
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void
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gas_cgen_swap_fixups ()
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{
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int tmp;
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struct fixup tmp_fixup;
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if (num_fixups == 0)
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{
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gas_cgen_restore_fixups ();
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}
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else if (saved_num_fixups == 0)
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{
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gas_cgen_save_fixups ();
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}
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else
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{
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tmp = saved_num_fixups;
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saved_num_fixups = num_fixups;
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num_fixups = tmp;
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for (tmp = GAS_CGEN_MAX_FIXUPS; tmp--;)
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{
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tmp_fixup = saved_fixups [tmp];
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saved_fixups [tmp] = fixups [tmp];
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fixups [tmp] = tmp_fixup;
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}
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}
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}
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/* Default routine to record a fixup.
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This is a cover function to fix_new.
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It exists because we record INSN with the fixup.
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FRAG and WHERE are their respective arguments to fix_new_exp.
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LENGTH is in bits.
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OPINFO is something the caller chooses to help in reloc determination.
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At this point we do not use a bfd_reloc_code_real_type for
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operands residing in the insn, but instead just use the
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operand index. This lets us easily handle fixups for any
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operand type. We pick a BFD reloc type in md_apply_fix. */
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fixS *
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gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offset)
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fragS * frag;
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int where;
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const CGEN_INSN * insn;
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int length;
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const CGEN_OPERAND * operand;
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int opinfo;
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symbolS * symbol;
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offsetT offset;
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{
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fixS * fixP;
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/* It may seem strange to use operand->attrs and not insn->attrs here,
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but it is the operand that has a pc relative relocation. */
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fixP = fix_new (frag, where, length / 8, symbol, offset,
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CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR),
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(bfd_reloc_code_real_type)
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((int) BFD_RELOC_UNUSED
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+ (int) operand->type));
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fixP->fx_cgen.insn = insn;
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fixP->fx_cgen.opinfo = opinfo;
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return fixP;
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}
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/* Default routine to record a fixup given an expression.
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This is a cover function to fix_new_exp.
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It exists because we record INSN with the fixup.
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FRAG and WHERE are their respective arguments to fix_new_exp.
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LENGTH is in bits.
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OPINFO is something the caller chooses to help in reloc determination.
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At this point we do not use a bfd_reloc_code_real_type for
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operands residing in the insn, but instead just use the
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operand index. This lets us easily handle fixups for any
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operand type. We pick a BFD reloc type in md_apply_fix. */
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fixS *
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gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp)
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fragS * frag;
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int where;
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const CGEN_INSN * insn;
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int length;
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const CGEN_OPERAND * operand;
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int opinfo;
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expressionS * exp;
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{
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fixS * fixP;
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/* It may seem strange to use operand->attrs and not insn->attrs here,
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but it is the operand that has a pc relative relocation. */
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fixP = fix_new_exp (frag, where, length / 8, exp,
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CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR),
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(bfd_reloc_code_real_type)
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((int) BFD_RELOC_UNUSED
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+ (int) operand->type));
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fixP->fx_cgen.insn = insn;
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fixP->fx_cgen.opinfo = opinfo;
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return fixP;
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}
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/* Used for communication between the next two procedures. */
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static jmp_buf expr_jmp_buf;
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/* Callback for cgen interface. Parse the expression at *STRP.
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The result is an error message or NULL for success (in which case
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*STRP is advanced past the parsed text).
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WANT is an indication of what the caller is looking for.
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If WANT == CGEN_ASM_PARSE_INIT the caller is beginning to try to match
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a table entry with the insn, reset the queued fixups counter.
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An enum cgen_parse_operand_result is stored in RESULTP.
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OPINDEX is the operand's table entry index.
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OPINFO is something the caller chooses to help in reloc determination.
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The resulting value is stored in VALUEP. */
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const char *
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gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP)
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CGEN_CPU_DESC cd;
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enum cgen_parse_operand_type want;
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const char ** strP;
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int opindex;
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int opinfo;
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enum cgen_parse_operand_result * resultP;
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bfd_vma * valueP;
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{
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#ifdef __STDC__
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/* These are volatile to survive the setjmp. */
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char * volatile hold;
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enum cgen_parse_operand_result * volatile resultP_1;
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#else
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static char * hold;
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static enum cgen_parse_operand_result * resultP_1;
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#endif
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const char * errmsg = NULL;
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expressionS exp;
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if (want == CGEN_PARSE_OPERAND_INIT)
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{
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gas_cgen_init_parse ();
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return NULL;
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}
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resultP_1 = resultP;
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hold = input_line_pointer;
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input_line_pointer = (char *) * strP;
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/* We rely on md_operand to longjmp back to us.
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This is done via gas_cgen_md_operand. */
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if (setjmp (expr_jmp_buf) != 0)
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{
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input_line_pointer = (char *) hold;
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* resultP_1 = CGEN_PARSE_OPERAND_RESULT_ERROR;
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return "illegal operand";
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}
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expression (& exp);
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* strP = input_line_pointer;
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input_line_pointer = hold;
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/* FIXME: Need to check `want'. */
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switch (exp.X_op)
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{
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case O_illegal :
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errmsg = _("illegal operand");
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* resultP = CGEN_PARSE_OPERAND_RESULT_ERROR;
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break;
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case O_absent :
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errmsg = _("missing operand");
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* resultP = CGEN_PARSE_OPERAND_RESULT_ERROR;
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break;
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case O_constant :
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* valueP = exp.X_add_number;
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* resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER;
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break;
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case O_register :
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* valueP = exp.X_add_number;
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* resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER;
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break;
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default :
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queue_fixup (opindex, opinfo, & exp);
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* valueP = 0;
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* resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED;
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break;
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}
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return errmsg;
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}
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/* md_operand handler to catch unrecognized expressions and halt the
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parsing process so the next entry can be tried.
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??? This could be done differently by adding code to `expression'. */
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void
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gas_cgen_md_operand (expressionP)
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expressionS * expressionP;
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{
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longjmp (expr_jmp_buf, 1);
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}
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/* Finish assembling instruction INSN.
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BUF contains what we've built up so far.
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LENGTH is the size of the insn in bits.
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RELAX_P is non-zero if relaxable insns should be emitted as such.
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Otherwise they're emitted in non-relaxable forms.
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The "result" is stored in RESULT if non-NULL. */
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void
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gas_cgen_finish_insn (insn, buf, length, relax_p, result)
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const CGEN_INSN * insn;
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CGEN_INSN_BYTES_PTR buf;
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unsigned int length;
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int relax_p;
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finished_insnS * result;
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{
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int i;
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int relax_operand;
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char * f;
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unsigned int byte_len = length / 8;
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/* ??? Target foo issues various warnings here, so one might want to provide
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a hook here. However, our caller is defined in tc-foo.c so there
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shouldn't be a need for a hook. */
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/* Write out the instruction.
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It is important to fetch enough space in one call to `frag_more'.
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We use (f - frag_now->fr_literal) to compute where we are and we
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don't want frag_now to change between calls.
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Relaxable instructions: We need to ensure we allocate enough
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space for the largest insn. */
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if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX))
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abort (); /* These currently shouldn't get here. */
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/* Is there a relaxable insn with the relaxable operand needing a fixup? */
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relax_operand = -1;
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if (relax_p && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE))
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{
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/* Scan the fixups for the operand affected by relaxing
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(i.e. the branch address). */
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for (i = 0; i < num_fixups; ++ i)
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|
|
|
{
|
|
|
|
if (CGEN_OPERAND_ATTR_VALUE (cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex),
|
|
|
|
CGEN_OPERAND_RELAX))
|
|
|
|
{
|
|
|
|
relax_operand = i;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (relax_operand != -1)
|
|
|
|
{
|
|
|
|
int max_len;
|
|
|
|
fragS * old_frag;
|
|
|
|
|
|
|
|
#ifdef TC_CGEN_MAX_RELAX
|
|
|
|
max_len = TC_CGEN_MAX_RELAX (insn, byte_len);
|
|
|
|
#else
|
|
|
|
max_len = CGEN_MAX_INSN_SIZE;
|
|
|
|
#endif
|
|
|
|
/* Ensure variable part and fixed part are in same fragment. */
|
|
|
|
/* FIXME: Having to do this seems like a hack. */
|
|
|
|
frag_grow (max_len);
|
|
|
|
|
|
|
|
/* Allocate space for the fixed part. */
|
|
|
|
f = frag_more (byte_len);
|
|
|
|
|
|
|
|
/* Create a relaxable fragment for this instruction. */
|
|
|
|
old_frag = frag_now;
|
|
|
|
|
|
|
|
frag_var (rs_machine_dependent,
|
|
|
|
max_len - byte_len /* max chars */,
|
|
|
|
0 /* variable part already allocated */,
|
|
|
|
/* FIXME: When we machine generate the relax table,
|
|
|
|
machine generate a macro to compute subtype. */
|
|
|
|
1 /* subtype */,
|
|
|
|
fixups[relax_operand].exp.X_add_symbol,
|
|
|
|
fixups[relax_operand].exp.X_add_number,
|
|
|
|
f);
|
|
|
|
|
|
|
|
/* Record the operand number with the fragment so md_convert_frag
|
|
|
|
can use gas_cgen_md_record_fixup to record the appropriate reloc. */
|
|
|
|
old_frag->fr_cgen.insn = insn;
|
|
|
|
old_frag->fr_cgen.opindex = fixups[relax_operand].opindex;
|
|
|
|
old_frag->fr_cgen.opinfo = fixups[relax_operand].opinfo;
|
|
|
|
if (result)
|
|
|
|
result->frag = old_frag;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
f = frag_more (byte_len);
|
|
|
|
if (result)
|
|
|
|
result->frag = frag_now;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If we're recording insns as numbers (rather than a string of bytes),
|
|
|
|
target byte order handling is deferred until now. */
|
|
|
|
#if CGEN_INT_INSN_P
|
|
|
|
cgen_put_insn_value (gas_cgen_cpu_desc, f, length, *buf);
|
|
|
|
#else
|
|
|
|
memcpy (f, buf, byte_len);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Create any fixups. */
|
|
|
|
for (i = 0; i < num_fixups; ++i)
|
|
|
|
{
|
|
|
|
fixS *fixP;
|
|
|
|
const CGEN_OPERAND *operand =
|
|
|
|
cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex);
|
|
|
|
|
|
|
|
/* Don't create fixups for these. That's done during relaxation.
|
|
|
|
We don't need to test for CGEN_INSN_RELAX as they can't get here
|
|
|
|
(see above). */
|
|
|
|
if (relax_p
|
|
|
|
&& CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE)
|
|
|
|
&& CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_RELAX))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
#ifndef md_cgen_record_fixup_exp
|
|
|
|
#define md_cgen_record_fixup_exp gas_cgen_record_fixup_exp
|
|
|
|
#endif
|
|
|
|
|
|
|
|
fixP = md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal,
|
|
|
|
insn, length, operand,
|
|
|
|
fixups[i].opinfo,
|
|
|
|
& fixups[i].exp);
|
|
|
|
if (result)
|
|
|
|
result->fixups[i] = fixP;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (result)
|
|
|
|
{
|
|
|
|
result->num_fixups = num_fixups;
|
|
|
|
result->addr = f;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Apply a fixup to the object code. This is called for all the
|
|
|
|
fixups we generated by the call to fix_new_exp, above. In the call
|
|
|
|
above we used a reloc code which was the largest legal reloc code
|
|
|
|
plus the operand index. Here we undo that to recover the operand
|
|
|
|
index. At this point all symbol values should be fully resolved,
|
|
|
|
and we attempt to completely resolve the reloc. If we can not do
|
|
|
|
that, we determine the correct reloc code and put it back in the fixup. */
|
|
|
|
|
|
|
|
/* FIXME: This function handles some of the fixups and bfd_install_relocation
|
|
|
|
handles the rest. bfd_install_relocation (or some other bfd function)
|
|
|
|
should handle them all. */
|
|
|
|
|
|
|
|
int
|
|
|
|
gas_cgen_md_apply_fix3 (fixP, valueP, seg)
|
|
|
|
fixS * fixP;
|
|
|
|
valueT * valueP;
|
|
|
|
segT seg;
|
|
|
|
{
|
|
|
|
char * where = fixP->fx_frag->fr_literal + fixP->fx_where;
|
|
|
|
valueT value;
|
|
|
|
/* canonical name, since used a lot */
|
|
|
|
CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
|
|
|
|
|
|
|
|
/* FIXME FIXME FIXME: The value we are passed in *valuep includes
|
|
|
|
the symbol values. Since we are using BFD_ASSEMBLER, if we are
|
|
|
|
doing this relocation the code in write.c is going to call
|
|
|
|
bfd_install_relocation, which is also going to use the symbol
|
|
|
|
value. That means that if the reloc is fully resolved we want to
|
|
|
|
use *valuep since bfd_install_relocation is not being used.
|
|
|
|
However, if the reloc is not fully resolved we do not want to use
|
|
|
|
*valuep, and must use fx_offset instead. However, if the reloc
|
|
|
|
is PC relative, we do want to use *valuep since it includes the
|
|
|
|
result of md_pcrel_from. This is confusing. */
|
|
|
|
|
|
|
|
if (fixP->fx_addsy == (symbolS *) NULL)
|
|
|
|
{
|
|
|
|
value = * valueP;
|
|
|
|
fixP->fx_done = 1;
|
|
|
|
}
|
|
|
|
else if (fixP->fx_pcrel)
|
|
|
|
value = * valueP;
|
|
|
|
else
|
|
|
|
{
|
|
|
|
value = fixP->fx_offset;
|
|
|
|
if (fixP->fx_subsy != (symbolS *) NULL)
|
|
|
|
{
|
|
|
|
if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
|
|
|
|
value -= S_GET_VALUE (fixP->fx_subsy);
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* We don't actually support subtracting a symbol. */
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
|
|
|
_("expression too complex"));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
|
|
|
|
{
|
|
|
|
int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
|
|
|
|
const CGEN_OPERAND *operand = cgen_operand_lookup_by_num (cd, opindex);
|
|
|
|
const char *errmsg;
|
|
|
|
bfd_reloc_code_real_type reloc_type;
|
|
|
|
CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
|
|
|
|
const CGEN_INSN *insn = fixP->fx_cgen.insn;
|
|
|
|
|
|
|
|
/* If the reloc has been fully resolved finish the operand here. */
|
|
|
|
/* FIXME: This duplicates the capabilities of code in BFD. */
|
|
|
|
if (fixP->fx_done
|
|
|
|
/* FIXME: If partial_inplace isn't set bfd_install_relocation won't
|
|
|
|
finish the job. Testing for pcrel is a temporary hack. */
|
|
|
|
|| fixP->fx_pcrel)
|
|
|
|
{
|
|
|
|
CGEN_CPU_SET_FIELDS_BITSIZE (cd) (fields, CGEN_INSN_BITSIZE (insn));
|
|
|
|
CGEN_CPU_SET_VMA_OPERAND (cd) (cd, opindex, fields, (bfd_vma) value);
|
|
|
|
|
|
|
|
#if CGEN_INT_INSN_P
|
|
|
|
{
|
|
|
|
CGEN_INSN_INT insn_value =
|
|
|
|
cgen_get_insn_value (cd, where, CGEN_INSN_BITSIZE (insn));
|
|
|
|
|
|
|
|
/* ??? 0 is passed for `pc' */
|
|
|
|
errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields,
|
|
|
|
&insn_value, (bfd_vma) 0);
|
|
|
|
cgen_put_insn_value (cd, where, CGEN_INSN_BITSIZE (insn),
|
|
|
|
insn_value);
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
/* ??? 0 is passed for `pc' */
|
|
|
|
errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields, where,
|
|
|
|
(bfd_vma) 0);
|
|
|
|
#endif
|
|
|
|
if (errmsg)
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line, "%s", errmsg);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fixP->fx_done)
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
/* The operand isn't fully resolved. Determine a BFD reloc value
|
|
|
|
based on the operand information and leave it to
|
|
|
|
bfd_install_relocation. Note that this doesn't work when
|
|
|
|
partial_inplace == false. */
|
|
|
|
|
|
|
|
reloc_type = md_cgen_lookup_reloc (insn, operand, fixP);
|
|
|
|
if (reloc_type != BFD_RELOC_NONE)
|
|
|
|
{
|
|
|
|
fixP->fx_r_type = reloc_type;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
|
|
|
_("unresolved expression that must be resolved"));
|
|
|
|
fixP->fx_done = 1;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if (fixP->fx_done)
|
|
|
|
{
|
|
|
|
/* We're finished with this fixup. Install it because
|
|
|
|
bfd_install_relocation won't be called to do it. */
|
|
|
|
switch (fixP->fx_r_type)
|
|
|
|
{
|
|
|
|
case BFD_RELOC_8:
|
|
|
|
md_number_to_chars (where, value, 1);
|
|
|
|
break;
|
|
|
|
case BFD_RELOC_16:
|
|
|
|
md_number_to_chars (where, value, 2);
|
|
|
|
break;
|
|
|
|
case BFD_RELOC_32:
|
|
|
|
md_number_to_chars (where, value, 4);
|
|
|
|
break;
|
|
|
|
/* FIXME: later add support for 64 bits. */
|
|
|
|
default:
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
|
|
|
_("internal error: can't install fix for reloc type %d (`%s')"),
|
|
|
|
fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* bfd_install_relocation will be called to finish things up. */
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Tuck `value' away for use by tc_gen_reloc.
|
|
|
|
See the comment describing fx_addnumber in write.h.
|
|
|
|
This field is misnamed (or misused :-). */
|
|
|
|
fixP->fx_addnumber = value;
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Translate internal representation of relocation info to BFD target format.
|
|
|
|
|
|
|
|
FIXME: To what extent can we get all relevant targets to use this? */
|
|
|
|
|
|
|
|
arelent *
|
|
|
|
gas_cgen_tc_gen_reloc (section, fixP)
|
|
|
|
asection * section;
|
|
|
|
fixS * fixP;
|
|
|
|
{
|
|
|
|
arelent * reloc;
|
|
|
|
|
|
|
|
reloc = (arelent *) xmalloc (sizeof (arelent));
|
|
|
|
|
|
|
|
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
|
|
|
|
if (reloc->howto == (reloc_howto_type *) NULL)
|
|
|
|
{
|
|
|
|
as_bad_where (fixP->fx_file, fixP->fx_line,
|
|
|
|
_("internal error: can't export reloc type %d (`%s')"),
|
|
|
|
fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type));
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
assert (!fixP->fx_pcrel == !reloc->howto->pc_relative);
|
|
|
|
|
1999-06-03 14:51:21 +02:00
|
|
|
reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
|
|
|
|
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
|
1999-05-03 09:29:11 +02:00
|
|
|
|
|
|
|
/* Use fx_offset for these cases */
|
|
|
|
if ( fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY
|
|
|
|
|| fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
|
|
|
|
reloc->addend = fixP->fx_offset;
|
|
|
|
else
|
|
|
|
reloc->addend = fixP->fx_addnumber;
|
|
|
|
|
|
|
|
reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
|
|
|
|
return reloc;
|
|
|
|
}
|