diff --git a/gas/ChangeLog b/gas/ChangeLog index 3d1f3371c5..030c1456bd 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,7 @@ +2003-03-23 H.J. Lu + + * config/tc-i386.c (md_begin): Allow '.' in mnemonic. + 2007-03-23 Mark Shinwell * config/tc-arm.c (md_apply_fix): Turn CBZ instructions that diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index eba64002ad..f0b65b2254 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1294,6 +1294,7 @@ md_begin () #endif digit_chars['-'] = '-'; mnemonic_chars['-'] = '-'; + mnemonic_chars['.'] = '.'; identifier_chars['_'] = '_'; identifier_chars['.'] = '.'; diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 48425b1468..b4108713be 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,14 @@ +2003-03-23 H.J. Lu + + * gas/i386/rex.s: Add tests for rex.WRXB. + * gas/i386/rex.d: Updated. + + * gas/i386/rex.d: Replace rex64XYZ with rex.WRXB. + * gas/i386/x86-64-io-intel.d : Likewise. + * gas/i386/x86-64-io-suffix.d: Likewise. + * gas/i386/x86-64-io.d: Likewise. + * gas/i386/x86-64-opcode.d: Likewise. + 2003-03-21 H.J. Lu PR binutils/4218 diff --git a/gas/testsuite/gas/i386/rex.d b/gas/testsuite/gas/i386/rex.d index 285e1dc6c7..9023b49ace 100644 --- a/gas/testsuite/gas/i386/rex.d +++ b/gas/testsuite/gas/i386/rex.d @@ -7,11 +7,27 @@ Disassembly of section .text: 0+ <_start>: [ ]*[0-9a-f]+:[ ]+40 0f ae 00[ ]+rex fxsavel?[ ]+\(%rax\) -[ ]*[0-9a-f]+:[ ]+48 0f ae 00[ ]+(rex64 )?fxsaveq?[ ]+\(%rax\) +[ ]*[0-9a-f]+:[ ]+48 0f ae 00[ ]+(rex.W )?fxsaveq?[ ]+\(%rax\) [ ]*[0-9a-f]+:[ ]+41 0f ae 00[ ]+fxsavel?[ ]+\(%r8\) -[ ]*[0-9a-f]+:[ ]+49 0f ae 00[ ]+(rex64Z? )?fxsaveq?[ ]+\(%r8\) +[ ]*[0-9a-f]+:[ ]+49 0f ae 00[ ]+(rex.WB? )?fxsaveq?[ ]+\(%r8\) [ ]*[0-9a-f]+:[ ]+42 0f ae 04 05 00 00 00 00[ ]+fxsavel?[ ]+(0x0)?\(,%r8(,1)?\) -[ ]*[0-9a-f]+:[ ]+4a 0f ae 04 05 00 00 00 00[ ]+(rex64Y? )?fxsaveq?[ ]+(0x0)?\(,%r8(,1)?\) +[ ]*[0-9a-f]+:[ ]+4a 0f ae 04 05 00 00 00 00[ ]+(rex.WX? )?fxsaveq?[ ]+(0x0)?\(,%r8(,1)?\) [ ]*[0-9a-f]+:[ ]+43 0f ae 04 00[ ]+fxsavel?[ ]+\(%r8,%r8(,1)?\) -[ ]*[0-9a-f]+:[ ]+4b 0f ae 04 00[ ]+(rex64(YZ)? )?fxsaveq?[ ]+\(%r8,%r8(,1)?\) +[ ]*[0-9a-f]+:[ ]+4b 0f ae 04 00[ ]+(rex.W(XB)? )?fxsaveq?[ ]+\(%r8,%r8(,1)?\) +[ ]*[0-9a-f]+:[ ]+40[ ]+rex +[ ]*[0-9a-f]+:[ ]+41[ ]+rex.B +[ ]*[0-9a-f]+:[ ]+42[ ]+rex.X +[ ]*[0-9a-f]+:[ ]+43[ ]+rex.XB +[ ]*[0-9a-f]+:[ ]+44[ ]+rex.R +[ ]*[0-9a-f]+:[ ]+45[ ]+rex.RB +[ ]*[0-9a-f]+:[ ]+46[ ]+rex.RX +[ ]*[0-9a-f]+:[ ]+47[ ]+rex.RXB +[ ]*[0-9a-f]+:[ ]+48[ ]+rex.W +[ ]*[0-9a-f]+:[ ]+49[ ]+rex.WB +[ ]*[0-9a-f]+:[ ]+4a[ ]+rex.WX +[ ]*[0-9a-f]+:[ ]+4b[ ]+rex.WXB +[ ]*[0-9a-f]+:[ ]+4c[ ]+rex.WR +[ ]*[0-9a-f]+:[ ]+4d[ ]+rex.WRB +[ ]*[0-9a-f]+:[ ]+4e[ ]+rex.WRX +[ ]*[0-9a-f]+:[ ]+4f[ ]+rex.WRXB #pass diff --git a/gas/testsuite/gas/i386/rex.s b/gas/testsuite/gas/i386/rex.s index a142312a2c..6f1e38a470 100644 --- a/gas/testsuite/gas/i386/rex.s +++ b/gas/testsuite/gas/i386/rex.s @@ -9,3 +9,21 @@ _start: rex64/fxsave (,%r8) rex/fxsave (%r8,%r8) rex64/fxsave (%r8,%r8) + +# Test prefixes family. + rex + rex.B + rex.X + rex.XB + rex.R + rex.RB + rex.RX + rex.RXB + rex.W + rex.WB + rex.WX + rex.WXB + rex.WR + rex.WRB + rex.WRX + rex.WRXB diff --git a/gas/testsuite/gas/i386/x86-64-io-intel.d b/gas/testsuite/gas/i386/x86-64-io-intel.d index a8787a00b5..c6df6e68c3 100644 --- a/gas/testsuite/gas/i386/x86-64-io-intel.d +++ b/gas/testsuite/gas/i386/x86-64-io-intel.d @@ -1,28 +1,28 @@ #source: x86-64-io.s #objdump: -dwMintel -#name: x86-64 rex64 in/out (Intel disassembly) +#name: x86-64 rex.W in/out (Intel disassembly) .*: +file format .* Disassembly of section .text: 0+000 <_in>: - 0: 48 ed rex64 in eax,dx + 0: 48 ed rex.W in eax,dx 2: 66 data16 - 3: 48 ed rex64 in eax,dx + 3: 48 ed rex.W in eax,dx 0+005 <_out>: - 5: 48 ef rex64 out dx,eax + 5: 48 ef rex.W out dx,eax 7: 66 data16 - 8: 48 ef rex64 out dx,eax + 8: 48 ef rex.W out dx,eax 0+00a <_ins>: - a: 48 6d rex64 ins DWORD PTR es:\[rdi\],dx + a: 48 6d rex.W ins DWORD PTR es:\[rdi\],dx c: 66 data16 - d: 48 6d rex64 ins DWORD PTR es:\[rdi\],dx + d: 48 6d rex.W ins DWORD PTR es:\[rdi\],dx 0+00f <_outs>: - f: 48 6f rex64 outs dx,DWORD PTR ds:\[rsi\] + f: 48 6f rex.W outs dx,DWORD PTR ds:\[rsi\] 11: 66 data16 - 12: 48 6f rex64 outs dx,DWORD PTR ds:\[rsi\] + 12: 48 6f rex.W outs dx,DWORD PTR ds:\[rsi\] #pass diff --git a/gas/testsuite/gas/i386/x86-64-io-suffix.d b/gas/testsuite/gas/i386/x86-64-io-suffix.d index f83b162230..a0ee9d0289 100644 --- a/gas/testsuite/gas/i386/x86-64-io-suffix.d +++ b/gas/testsuite/gas/i386/x86-64-io-suffix.d @@ -1,28 +1,28 @@ #source: x86-64-io.s #objdump: -dwMsuffix -#name: x86-64 rex64 in/out w/ suffix +#name: x86-64 rex.W in/out w/ suffix .*: +file format .* Disassembly of section .text: 0+000 <_in>: - 0: 48 ed rex64 inl \(%dx\),%eax + 0: 48 ed rex.W inl \(%dx\),%eax 2: 66 data16 - 3: 48 ed rex64 inl \(%dx\),%eax + 3: 48 ed rex.W inl \(%dx\),%eax 0+005 <_out>: - 5: 48 ef rex64 outl %eax,\(%dx\) + 5: 48 ef rex.W outl %eax,\(%dx\) 7: 66 data16 - 8: 48 ef rex64 outl %eax,\(%dx\) + 8: 48 ef rex.W outl %eax,\(%dx\) 0+00a <_ins>: - a: 48 6d rex64 insl \(%dx\),%es:\(%rdi\) + a: 48 6d rex.W insl \(%dx\),%es:\(%rdi\) c: 66 data16 - d: 48 6d rex64 insl \(%dx\),%es:\(%rdi\) + d: 48 6d rex.W insl \(%dx\),%es:\(%rdi\) 0+00f <_outs>: - f: 48 6f rex64 outsl %ds:\(%rsi\),\(%dx\) + f: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\) 11: 66 data16 - 12: 48 6f rex64 outsl %ds:\(%rsi\),\(%dx\) + 12: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\) #pass diff --git a/gas/testsuite/gas/i386/x86-64-io.d b/gas/testsuite/gas/i386/x86-64-io.d index 7158b75388..3e3b7e7bad 100644 --- a/gas/testsuite/gas/i386/x86-64-io.d +++ b/gas/testsuite/gas/i386/x86-64-io.d @@ -1,27 +1,27 @@ #objdump: -dw -#name: x86-64 rex64 in/out +#name: x86-64 rex.W in/out .*: +file format .* Disassembly of section .text: 0+000 <_in>: - 0: 48 ed rex64 in \(%dx\),%eax + 0: 48 ed rex.W in \(%dx\),%eax 2: 66 data16 - 3: 48 ed rex64 in \(%dx\),%eax + 3: 48 ed rex.W in \(%dx\),%eax 0+005 <_out>: - 5: 48 ef rex64 out %eax,\(%dx\) + 5: 48 ef rex.W out %eax,\(%dx\) 7: 66 data16 - 8: 48 ef rex64 out %eax,\(%dx\) + 8: 48 ef rex.W out %eax,\(%dx\) 0+00a <_ins>: - a: 48 6d rex64 insl \(%dx\),%es:\(%rdi\) + a: 48 6d rex.W insl \(%dx\),%es:\(%rdi\) c: 66 data16 - d: 48 6d rex64 insl \(%dx\),%es:\(%rdi\) + d: 48 6d rex.W insl \(%dx\),%es:\(%rdi\) 0+00f <_outs>: - f: 48 6f rex64 outsl %ds:\(%rsi\),\(%dx\) + f: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\) 11: 66 data16 - 12: 48 6f rex64 outsl %ds:\(%rsi\),\(%dx\) -#pass \ No newline at end of file + 12: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\) +#pass diff --git a/gas/testsuite/gas/i386/x86-64-opcode.d b/gas/testsuite/gas/i386/x86-64-opcode.d index 126b363823..912075e3be 100644 --- a/gas/testsuite/gas/i386/x86-64-opcode.d +++ b/gas/testsuite/gas/i386/x86-64-opcode.d @@ -272,7 +272,7 @@ Disassembly of section .text: [ ]*[0-9a-f]+:[ ]+66 90[ ]+xchg[ ]+%ax,%ax[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+87 c0[ ]+xchg[ ]+%eax,%eax[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+90[ ]+nop[ ]*(#.*)* -[ ]*[0-9a-f]+:[ ]+48 90[ ]+rex64 nop[ ]*(#.*)* +[ ]*[0-9a-f]+:[ ]+48 90[ ]+rex.W nop[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+49 90[ ]+xchg[ ]+%rax,%r8[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+41 90[ ]+xchg[ ]+%eax,%r8d[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+41 90[ ]+xchg[ ]+%eax,%r8d[ ]*(#.*)* diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 914743b197..9b386ca094 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2003-03-23 H.J. Lu + + * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB. + + * i386-opc.c (i386_optab): Add rex.wrxb. + 2003-03-21 H.J. Lu * i386-dis.c (REX_MODE64): Remove definition. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 8ae51d8e86..55ecb237b5 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -2734,41 +2734,46 @@ ckprefix (void) static const char * prefix_name (int pref, int sizeflag) { + static const char *rexes [16] = + { + "rex", /* 0x40 */ + "rex.B", /* 0x41 */ + "rex.X", /* 0x42 */ + "rex.XB", /* 0x43 */ + "rex.R", /* 0x44 */ + "rex.RB", /* 0x45 */ + "rex.RX", /* 0x46 */ + "rex.RXB", /* 0x47 */ + "rex.W", /* 0x48 */ + "rex.WB", /* 0x49 */ + "rex.WX", /* 0x4a */ + "rex.WXB", /* 0x4b */ + "rex.WR", /* 0x4c */ + "rex.WRB", /* 0x4d */ + "rex.WRX", /* 0x4e */ + "rex.WRXB", /* 0x4f */ + }; + switch (pref) { /* REX prefixes family. */ case 0x40: - return "rex"; case 0x41: - return "rexZ"; case 0x42: - return "rexY"; case 0x43: - return "rexYZ"; case 0x44: - return "rexX"; case 0x45: - return "rexXZ"; case 0x46: - return "rexXY"; case 0x47: - return "rexXYZ"; case 0x48: - return "rex64"; case 0x49: - return "rex64Z"; case 0x4a: - return "rex64Y"; case 0x4b: - return "rex64YZ"; case 0x4c: - return "rex64X"; case 0x4d: - return "rex64XZ"; case 0x4e: - return "rex64XY"; case 0x4f: - return "rex64XYZ"; + return rexes [pref - 0x40]; case 0xf3: return "repz"; case 0xf2: diff --git a/opcodes/i386-opc.c b/opcodes/i386-opc.c index 373b1dd8ca..be12dcea0b 100644 --- a/opcodes/i386-opc.c +++ b/opcodes/i386-opc.c @@ -846,6 +846,21 @@ const template i386_optab[] = {"rex64xz",0, 0x4d, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, {"rex64xy",0, 0x4e, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, {"rex64xyz",0, 0x4f, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.b", 0, 0x41, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.x", 0, 0x42, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.xb", 0, 0x43, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.r", 0, 0x44, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.rb", 0, 0x45, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.rx", 0, 0x46, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.rxb",0, 0x47, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.w", 0, 0x48, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wb", 0, 0x49, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wx", 0, 0x4a, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wxb",0, 0x4b, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wr", 0, 0x4c, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wrb",0, 0x4d, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wrx",0, 0x4e, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wrxb",0, 0x4f, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, /* 486 extensions. */