* interp.c: Replace all references to load_mem and store_mem
with references to load_byte, load_half, load_3_byte, load_word
and store_byte, store_half, store_3_byte, store_word.
(INLINE): Delete definition.
(load_mem_big): Likewise.
(max_mem): Make it global.
(dispatch): Make this function inline.
(load_mem, store_mem): Delete functions.
* mn10300_sim.h (INLINE): Define.
(RLW): Delete unused definition.
(load_mem, store_mem): Delete declarations.
(load_mem_big): New definition.
(load_byte, load_half, load_3_byte, load_word): New functions.
(store_byte, store_half, store_3_byte, store_word): New functions.
* simops.c: Replace all references to load_mem and store_mem
with references to load_byte, load_half, load_3_byte, load_word
and store_byte, store_half, store_3_byte, store_word.
This commit is contained in:
Jeff Law
parent
4e39c0f9b2
commit
003c91bec4
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@ -1,3 +1,28 @@
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Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
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* interp.c: Replace all references to load_mem and store_mem
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with references to load_byte, load_half, load_3_byte, load_word
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and store_byte, store_half, store_3_byte, store_word.
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(INLINE): Delete definition.
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(load_mem_big): Likewise.
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(max_mem): Make it global.
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(dispatch): Make this function inline.
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(load_mem, store_mem): Delete functions.
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* mn10300_sim.h (INLINE): Define.
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(RLW): Delete unused definition.
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(load_mem, store_mem): Delete declarations.
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(load_mem_big): New definition.
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(load_byte, load_half, load_3_byte, load_word): New functions.
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(store_byte, store_half, store_3_byte, store_word): New functions.
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* simops.c: Replace all references to load_mem and store_mem
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with references to load_byte, load_half, load_3_byte, load_word
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and store_byte, store_half, store_3_byte, store_word.
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Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* interp.c (sim_open): Add callback to arguments.
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(sim_set_callbacks): Delete SIM_DESC argument.
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Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
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* interp.c (dispatch): Make this an inline function.
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@ -4,14 +4,6 @@
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#include "mn10300_sim.h"
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#ifndef INLINE
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#ifdef __GNUC__
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#define INLINE inline
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#else
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#define INLINE
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#endif
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#endif
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host_callback *mn10300_callback;
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int mn10300_debug;
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static SIM_OPEN_KIND sim_kind;
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@ -234,62 +226,6 @@ put_word (addr, data)
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a[3] = (data >> 24) & 0xff;
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}
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uint32
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load_mem (addr, len)
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SIM_ADDR addr;
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int len;
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{
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uint8 *p = addr + State.mem;
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if (addr > max_mem)
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abort ();
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switch (len)
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{
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case 1:
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return p[0];
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case 2:
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return p[1] << 8 | p[0];
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case 3:
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return p[2] << 16 | p[1] << 8 | p[0];
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case 4:
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return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
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default:
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abort ();
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}
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}
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void
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store_mem (addr, len, data)
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SIM_ADDR addr;
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int len;
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uint32 data;
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{
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uint8 *p = addr + State.mem;
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if (addr > max_mem)
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abort ();
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switch (len)
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{
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case 1:
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p[0] = data;
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return;
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case 2:
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p[0] = data;
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p[1] = data >> 8;
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return;
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case 4:
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p[0] = data;
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p[1] = data >> 8;
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p[2] = data >> 16;
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p[3] = data >> 24;
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return;
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default:
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abort ();
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}
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}
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void
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sim_size (power)
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int power;
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@ -326,7 +262,7 @@ sim_write (sd, addr, buffer, size)
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init_system ();
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for (i = 0; i < size; i++)
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store_mem (addr + i, 1, buffer[i]);
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store_byte (addr + i, buffer[i]);
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return size;
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}
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@ -348,8 +284,9 @@ compare_simops (arg1, arg2)
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}
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SIM_DESC
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sim_open (kind,argv)
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sim_open (kind,cb,argv)
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SIM_OPEN_KIND kind;
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host_callback *cb;
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char **argv;
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{
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struct simops *s;
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@ -357,6 +294,8 @@ sim_open (kind,argv)
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char **p;
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int i;
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mn10300_callback = cb;
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/* Sort the opcode array from smallest opcode to largest.
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This will generally improve simulator performance as the smaller
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opcodes are generally preferred to the larger opcodes. */
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@ -749,9 +688,9 @@ sim_resume (sd, step, siggnal)
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case 0x3a:
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case 0x3b:
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case 0xcc:
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insn = load_mem (PC, 1);
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insn = load_byte (PC);
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insn <<= 16;
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insn |= load_mem (PC + 1, 2);
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insn |= load_half (PC + 1);
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extension = 0;
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dispatch (insn, extension, 3);
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break;
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@ -777,7 +716,7 @@ sim_resume (sd, step, siggnal)
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{
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insn = inst;
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insn <<= 16;
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insn |= load_mem (PC + 2, 2);
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insn |= load_half (PC + 2);
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extension = 0;
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}
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dispatch (insn, extension, 4);
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@ -785,18 +724,18 @@ sim_resume (sd, step, siggnal)
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/* Five byte insns. */
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case 0xcd:
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insn = load_mem (PC, 1);
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insn = load_byte (PC);
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insn <<= 24;
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insn |= (load_mem (PC + 1, 2) << 8);
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insn |= load_mem (PC + 3, 1);
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extension = load_mem (PC + 4, 1);
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insn |= (load_half (PC + 1) << 8);
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insn |= load_byte (PC + 3);
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extension = load_byte (PC + 4);
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dispatch (insn, extension, 5);
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break;
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case 0xdc:
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insn = load_mem (PC, 1);
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insn = load_byte (PC);
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insn <<= 24;
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extension = load_mem (PC + 1, 4);
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extension = load_word (PC + 1);
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insn |= (extension & 0xffffff00) >> 8;
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extension &= 0xff;
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dispatch (insn, extension, 5);
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@ -806,29 +745,29 @@ sim_resume (sd, step, siggnal)
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case 0xfc:
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case 0xfd:
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insn = (inst << 16);
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extension = load_mem (PC + 2, 4);
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extension = load_word (PC + 2);
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insn |= ((extension & 0xffff0000) >> 16);
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extension &= 0xffff;
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dispatch (insn, extension, 6);
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break;
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case 0xdd:
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insn = load_mem (PC, 1) << 24;
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extension = load_mem (PC + 1, 4);
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insn = load_byte (PC) << 24;
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extension = load_word (PC + 1);
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insn |= ((extension >> 8) & 0xffffff);
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extension = (extension & 0xff) << 16;
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extension |= load_mem (PC + 5, 1) << 8;
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extension |= load_mem (PC + 6, 1);
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extension |= load_byte (PC + 5) << 8;
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extension |= load_byte (PC + 6);
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dispatch (insn, extension, 7);
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break;
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case 0xfe:
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insn = inst << 16;
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extension = load_mem (PC + 2, 4);
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extension = load_word (PC + 2);
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insn |= ((extension >> 16) & 0xffff);
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extension <<= 8;
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extension &= 0xffff00;
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extension |= load_mem (PC + 6, 1);
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extension |= load_byte (PC + 6);
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dispatch (insn, extension, 7);
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break;
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@ -898,8 +837,7 @@ sim_kill (sd)
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}
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void
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sim_set_callbacks (sd, p)
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SIM_DESC sd;
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sim_set_callbacks (p)
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host_callback *p;
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{
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mn10300_callback = p;
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@ -949,7 +887,7 @@ sim_read (sd, addr, buffer, size)
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{
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int i;
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for (i = 0; i < size; i++)
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buffer[i] = load_mem (addr + i, 1);
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buffer[i] = load_byte (addr + i);
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return size;
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}
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