[include/elf]
* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New. [bfd/] * archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New. (bfd_mach_mips5500): New. * cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New. (arch_info_struct): Add corresponding entries here. * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120, E_MIPS_MACH_5400 and E_MIPS_MACH_5500. (_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120, bfd_mach_mips5400 and bfd_mach_mips5500. (_bfd_mips_elf_mach_extends_p): New function. (_bfd_mips_elf_merge_private_bfd_data): Use it to help merge the EF_MIPS_MACH flags. * bfd-in2.h: Regenerate.
This commit is contained in:
Richard Sandiford
parent
82a9b2d95c
commit
00707a0e89
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@ -1,3 +1,22 @@
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2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
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Ken Raeburn <raeburn@cygnus.com>
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Aldy Hernandez <aldyh@redhat.com>
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Eric Christopher <echristo@redhat.com>
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Richard Sandiford <rsandifo@redhat.com>
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* archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New.
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(bfd_mach_mips5500): New.
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* cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New.
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(arch_info_struct): Add corresponding entries here.
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* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120,
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E_MIPS_MACH_5400 and E_MIPS_MACH_5500.
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(_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120,
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bfd_mach_mips5400 and bfd_mach_mips5500.
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(_bfd_mips_elf_mach_extends_p): New function.
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(_bfd_mips_elf_merge_private_bfd_data): Use it to help merge
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the EF_MIPS_MACH flags.
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* bfd-in2.h: Regenerate.
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2002-09-28 Jason Thorpe <thorpej@wasabisystems.com>
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* elf32-vax.c (elf_vax_size_dynamic_section): Don't strip
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@ -129,11 +129,14 @@ DESCRIPTION
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.#define bfd_mach_mips4010 4010
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.#define bfd_mach_mips4100 4100
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.#define bfd_mach_mips4111 4111
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.#define bfd_mach_mips4120 4120
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.#define bfd_mach_mips4300 4300
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.#define bfd_mach_mips4400 4400
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.#define bfd_mach_mips4600 4600
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.#define bfd_mach_mips4650 4650
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.#define bfd_mach_mips5000 5000
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.#define bfd_mach_mips5400 5400
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.#define bfd_mach_mips5500 5500
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.#define bfd_mach_mips6000 6000
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.#define bfd_mach_mips8000 8000
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.#define bfd_mach_mips10000 10000
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@ -1524,11 +1524,14 @@ enum bfd_architecture
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#define bfd_mach_mips4010 4010
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#define bfd_mach_mips4100 4100
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#define bfd_mach_mips4111 4111
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#define bfd_mach_mips4120 4120
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#define bfd_mach_mips4300 4300
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#define bfd_mach_mips4400 4400
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#define bfd_mach_mips4600 4600
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#define bfd_mach_mips4650 4650
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#define bfd_mach_mips5000 5000
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#define bfd_mach_mips5400 5400
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#define bfd_mach_mips5500 5500
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#define bfd_mach_mips6000 6000
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#define bfd_mach_mips8000 8000
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#define bfd_mach_mips10000 10000
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@ -67,11 +67,14 @@ enum
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I_mips4010,
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I_mips4100,
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I_mips4111,
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I_mips4120,
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I_mips4300,
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I_mips4400,
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I_mips4600,
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I_mips4650,
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I_mips5000,
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I_mips5400,
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I_mips5500,
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I_mips6000,
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I_mips8000,
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I_mips10000,
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@ -93,11 +96,14 @@ static const bfd_arch_info_type arch_info_struct[] =
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N (64, 64, bfd_mach_mips4010, "mips:4010", false, NN(I_mips4010)),
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N (64, 64, bfd_mach_mips4100, "mips:4100", false, NN(I_mips4100)),
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N (64, 64, bfd_mach_mips4111, "mips:4111", false, NN(I_mips4111)),
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N (64, 64, bfd_mach_mips4120, "mips:4120", false, NN(I_mips4120)),
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N (64, 64, bfd_mach_mips4300, "mips:4300", false, NN(I_mips4300)),
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N (64, 64, bfd_mach_mips4400, "mips:4400", false, NN(I_mips4400)),
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N (64, 64, bfd_mach_mips4600, "mips:4600", false, NN(I_mips4600)),
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N (64, 64, bfd_mach_mips4650, "mips:4650", false, NN(I_mips4650)),
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N (64, 64, bfd_mach_mips5000, "mips:5000", false, NN(I_mips5000)),
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N (64, 64, bfd_mach_mips5400, "mips:5400", false, NN(I_mips5400)),
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N (64, 64, bfd_mach_mips5500, "mips:5500", false, NN(I_mips5500)),
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N (32, 32, bfd_mach_mips6000, "mips:6000", false, NN(I_mips6000)),
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N (64, 64, bfd_mach_mips8000, "mips:8000", false, NN(I_mips8000)),
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N (64, 64, bfd_mach_mips10000,"mips:10000", false, NN(I_mips10000)),
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@ -364,6 +364,7 @@ static INLINE int elf_mips_isa PARAMS ((flagword));
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static INLINE char* elf_mips_abi_name PARAMS ((bfd *));
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static void mips_elf_irix6_finish_dynamic_symbol
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PARAMS ((bfd *, const char *, Elf_Internal_Sym *));
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static boolean _bfd_mips_elf_mach_extends_p PARAMS ((flagword, flagword));
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/* This will be used when we sort the dynamic relocation records. */
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static bfd *reldyn_sorting_bfd;
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@ -3058,9 +3059,18 @@ _bfd_elf_mips_mach (flags)
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case E_MIPS_MACH_4111:
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return bfd_mach_mips4111;
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case E_MIPS_MACH_4120:
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return bfd_mach_mips4120;
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case E_MIPS_MACH_4650:
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return bfd_mach_mips4650;
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case E_MIPS_MACH_5400:
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return bfd_mach_mips5400;
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case E_MIPS_MACH_5500:
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return bfd_mach_mips5500;
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case E_MIPS_MACH_SB1:
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return bfd_mach_mips_sb1;
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@ -5935,10 +5945,22 @@ _bfd_mips_elf_final_write_processing (abfd, linker)
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val = E_MIPS_ARCH_3 | E_MIPS_MACH_4111;
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break;
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case bfd_mach_mips4120:
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val = E_MIPS_ARCH_3 | E_MIPS_MACH_4120;
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break;
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case bfd_mach_mips4650:
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val = E_MIPS_ARCH_3 | E_MIPS_MACH_4650;
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break;
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case bfd_mach_mips5400:
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val = E_MIPS_ARCH_4 | E_MIPS_MACH_5400;
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break;
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case bfd_mach_mips5500:
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val = E_MIPS_ARCH_4 | E_MIPS_MACH_5500;
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break;
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case bfd_mach_mips5000:
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case bfd_mach_mips8000:
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case bfd_mach_mips10000:
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@ -7637,6 +7659,26 @@ _bfd_mips_elf_final_link (abfd, info)
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return true;
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}
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/* Return true if machine EXTENSION is an extension of machine BASE,
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meaning that it should be safe to link code for the two machines
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and set the output machine to EXTENSION. EXTENSION and BASE are
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both submasks of EF_MIPS_MACH. */
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static boolean
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_bfd_mips_elf_mach_extends_p (base, extension)
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flagword base, extension;
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{
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/* The vr5500 ISA is an extension of the core vr5400 ISA, but doesn't
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include the multimedia stuff. It seems better to allow vr5400
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and vr5500 code to be merged anyway, since many libraries will
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just use the core ISA. Perhaps we could add some sort of ASE
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flag if this ever proves a problem. */
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return (base == 0
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|| (base == E_MIPS_MACH_5400 && extension == E_MIPS_MACH_5500)
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|| (base == E_MIPS_MACH_4100 && extension == E_MIPS_MACH_4111)
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|| (base == E_MIPS_MACH_4100 && extension == E_MIPS_MACH_4120));
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}
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/* Merge backend specific data from an object file to the output
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object file when linking. */
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@ -7743,10 +7785,9 @@ _bfd_mips_elf_merge_private_bfd_data (ibfd, obfd)
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/* If either has no machine specified, just compare the general isa's.
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Some combinations of machines are ok, if the isa's match. */
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if (! new_mach
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|| ! old_mach
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|| new_mach == old_mach
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)
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if (new_mach == old_mach
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|| _bfd_mips_elf_mach_extends_p (new_mach, old_mach)
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|| _bfd_mips_elf_mach_extends_p (old_mach, new_mach))
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{
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/* Don't warn about mixing code using 32-bit ISAs, or mixing code
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using 64-bit ISAs. They will normally use the same data sizes
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@ -7763,8 +7804,11 @@ _bfd_mips_elf_merge_private_bfd_data (ibfd, obfd)
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else
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{
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/* Do we need to update the mach field? */
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if (old_mach == 0 && new_mach != 0)
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elf_elfheader (obfd)->e_flags |= new_mach;
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if (_bfd_mips_elf_mach_extends_p (old_mach, new_mach))
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{
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elf_elfheader (obfd)->e_flags &= ~EF_MIPS_MACH;
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elf_elfheader (obfd)->e_flags |= new_mach;
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}
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/* Do we need to update the ISA field? */
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if (new_isa > old_isa)
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@ -1,3 +1,11 @@
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2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
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Ken Raeburn <raeburn@cygnus.com>
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Aldy Hernandez <aldyh@redhat.com>
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Eric Christopher <echristo@redhat.com>
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Richard Sandiford <rsandifo@redhat.com>
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* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New.
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2002-09-12 Roland McGrath <roland@redhat.com>
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* dwarf2.h: Updates from GCC version of thie file:
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@ -175,8 +175,11 @@ END_RELOC_NUMBERS (R_MIPS_maxext)
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#define E_MIPS_MACH_4010 0x00820000
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#define E_MIPS_MACH_4100 0x00830000
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#define E_MIPS_MACH_4650 0x00850000
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#define E_MIPS_MACH_4120 0x00870000
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#define E_MIPS_MACH_4111 0x00880000
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#define E_MIPS_MACH_SB1 0x008a0000
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#define E_MIPS_MACH_5400 0x00910000
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#define E_MIPS_MACH_5500 0x00980000
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/* Processor specific section indices. These sections do not actually
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exist. Symbols with a st_shndx field corresponding to one of these
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