* s390-tdep.c (op1_lgfi, op2_lgfi, op1_agfi, op2_agfi,
op1_afi, op2_afi, op1_algfi, op2_algfi, op1_alfi, op2_alfi, op1_slgfi, op2_slgfi, op1_slfi, op2_slfi): New opcode enums. (s390_analyze_prologue): Recognize new z9-109 instructions.
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@ -1,3 +1,10 @@
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2005-08-15 Ulrich Weigand <uweigand@de.ibm.com>
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* s390-tdep.c (op1_lgfi, op2_lgfi, op1_agfi, op2_agfi,
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op1_afi, op2_afi, op1_algfi, op2_algfi, op1_alfi, op2_alfi,
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op1_slgfi, op2_slgfi, op1_slfi, op2_slfi): New opcode enums.
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(s390_analyze_prologue): Recognize new z9-109 instructions.
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2005-08-14 Mark Kettenis <kettenis@gnu.org>
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* solib-som.c (som_current_sos): Cast to 'gdb_byte *' where
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@ -811,6 +811,7 @@ enum
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{
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op1_lhi = 0xa7, op2_lhi = 0x08,
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op1_lghi = 0xa7, op2_lghi = 0x09,
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op1_lgfi = 0xc0, op2_lgfi = 0x01,
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op_lr = 0x18,
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op_lgr = 0xb904,
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op_l = 0x58,
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@ -828,11 +829,17 @@ enum
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op1_stmg = 0xeb, op2_stmg = 0x24,
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op1_aghi = 0xa7, op2_aghi = 0x0b,
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op1_ahi = 0xa7, op2_ahi = 0x0a,
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op1_agfi = 0xc2, op2_agfi = 0x08,
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op1_afi = 0xc2, op2_afi = 0x09,
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op1_algfi= 0xc2, op2_algfi= 0x0a,
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op1_alfi = 0xc2, op2_alfi = 0x0b,
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op_ar = 0x1a,
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op_agr = 0xb908,
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op_a = 0x5a,
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op1_ay = 0xe3, op2_ay = 0x5a,
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op1_ag = 0xe3, op2_ag = 0x08,
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op1_slgfi= 0xc2, op2_slgfi= 0x04,
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op1_slfi = 0xc2, op2_slfi = 0x05,
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op_sr = 0x1b,
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op_sgr = 0xb909,
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op_s = 0x5b,
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@ -1294,6 +1301,10 @@ s390_analyze_prologue (struct gdbarch *gdbarch,
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&& is_ri (insn, op1_lghi, op2_lghi, &r1, &i2))
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pv_set_to_constant (&data->gpr[r1], i2);
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/* LGFI r1, i2 --- load fullword immediate */
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else if (is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
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pv_set_to_constant (&data->gpr[r1], i2);
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/* LR r1, r2 --- load from register */
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else if (word_size == 4
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&& is_rr (insn, op_lr, &r1, &r2))
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@ -1434,6 +1445,26 @@ s390_analyze_prologue (struct gdbarch *gdbarch,
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&& is_ri (insn, op1_aghi, op2_aghi, &r1, &i2))
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pv_add_constant (&data->gpr[r1], i2);
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/* AFI r1, i2 --- add fullword immediate */
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else if (word_size == 4
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&& is_ril (insn, op1_afi, op2_afi, &r1, &i2))
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pv_add_constant (&data->gpr[r1], i2);
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/* AGFI r1, i2 --- add fullword immediate (64-bit version) */
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else if (word_size == 8
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&& is_ril (insn, op1_agfi, op2_agfi, &r1, &i2))
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pv_add_constant (&data->gpr[r1], i2);
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/* ALFI r1, i2 --- add logical immediate */
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else if (word_size == 4
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&& is_ril (insn, op1_alfi, op2_alfi, &r1, &i2))
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pv_add_constant (&data->gpr[r1], (CORE_ADDR)i2 & 0xffffffff);
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/* ALGFI r1, i2 --- add logical immediate (64-bit version) */
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else if (word_size == 8
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&& is_ril (insn, op1_algfi, op2_algfi, &r1, &i2))
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pv_add_constant (&data->gpr[r1], (CORE_ADDR)i2 & 0xffffffff);
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/* AR r1, r2 -- add register */
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else if (word_size == 4
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&& is_rr (insn, op_ar, &r1, &r2))
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@ -1483,6 +1514,16 @@ s390_analyze_prologue (struct gdbarch *gdbarch,
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pv_add (&data->gpr[r1], &data->gpr[r1], &value);
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}
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/* SLFI r1, i2 --- subtract logical immediate */
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else if (word_size == 4
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&& is_ril (insn, op1_slfi, op2_slfi, &r1, &i2))
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pv_add_constant (&data->gpr[r1], -((CORE_ADDR)i2 & 0xffffffff));
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/* SLGFI r1, i2 --- subtract logical immediate (64-bit version) */
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else if (word_size == 8
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&& is_ril (insn, op1_slgfi, op2_slgfi, &r1, &i2))
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pv_add_constant (&data->gpr[r1], -((CORE_ADDR)i2 & 0xffffffff));
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/* SR r1, r2 -- subtract register */
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else if (word_size == 4
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&& is_rr (insn, op_sr, &r1, &r2))
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