Separate the new FP16 instructions backported from Armv8.4-a to Armv8.2-a into a new flag order to distinguish them from the rest of the already existing optional FP16 instructions in Armv8.2-a.

The new flag "+fp16fml" is available from Armv8.2-a and implies +fp16 and is mandatory
from Armv8.4-a.

gas/

	* config/tc-arm.c (arm_ext_fp16_fml, fp16fml): New.
	(do_neon_fmac_maybe_scalar_long): Use arm_ext_fp16_fml.
	* doc/c-arm.texi (fp16, fp16fml): New.
	* testsuite/gas/arm/armv8_2-a-fp16.d (fp16): Make fp16fml.
	* testsuite/gas/arm/armv8_3-a-fp16.d (fp16): Make fp16fml.
	* testsuite/gas/arm/armv8_2-a-fp16-illegal.d (fp16): Make fp16fml.
	* testsuite/gas/arm/armv8_2-a-fp16-thumb2.d (fp16): Make fp16fml.

include/

	* opcode/arm.h: (ARM_EXT2_FP16_FML): New.
	(ARM_AEXT2_V8_4A): Add ARM_EXT2_FP16_FML.
This commit is contained in:
Tamar Christina 2017-11-15 15:56:23 +00:00
parent c0c11fa91d
commit 01f4802036
9 changed files with 31 additions and 6 deletions

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@ -1,3 +1,13 @@
2017-11-15 Tamar Christina <tamar.christina@arm.com>
* config/tc-arm.c (arm_ext_fp16_fml, fp16fml): New.
(do_neon_fmac_maybe_scalar_long): Use arm_ext_fp16_fml.
* doc/c-arm.texi (fp16, fp16fml): New.
* testsuite/gas/arm/armv8_2-a-fp16.d (fp16): Make fp16fml.
* testsuite/gas/arm/armv8_3-a-fp16.d (fp16): Make fp16fml.
* testsuite/gas/arm/armv8_2-a-fp16-illegal.d (fp16): Make fp16fml.
* testsuite/gas/arm/armv8_2-a-fp16-thumb2.d (fp16): Make fp16fml.
2017-11-15 Nick Clifton <nickc@redhat.com>
PR 15152

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@ -235,6 +235,8 @@ static const arm_feature_set arm_ext_ras =
/* FP16 instructions. */
static const arm_feature_set arm_ext_fp16 =
ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST);
static const arm_feature_set arm_ext_fp16_fml =
ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_FML);
static const arm_feature_set arm_ext_v8_2 =
ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_2A);
static const arm_feature_set arm_ext_v8_3 =
@ -16210,7 +16212,7 @@ do_neon_fmac_maybe_scalar_long (int subtype)
as_warn (_("vfmal/vfmsl with FP16 type cannot be conditional, the "
"behaviour is UNPREDICTABLE"));
constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_fp16),
constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_fp16_fml),
_(BAD_FP16));
constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, fpu_neon_ext_armv8),
@ -26243,6 +26245,11 @@ static const struct arm_option_extension_value_table arm_extensions[] =
ARM_EXT_OPT ("fp16", ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
ARM_ARCH_V8_2A),
ARM_EXT_OPT ("fp16fml", ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST
| ARM_EXT2_FP16_FML),
ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST
| ARM_EXT2_FP16_FML),
ARM_ARCH_V8_2A),
ARM_EXT_OPT2 ("idiv", ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV | ARM_EXT_DIV),
ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV | ARM_EXT_DIV),
ARM_FEATURE_CORE_LOW (ARM_EXT_V7A),

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@ -178,6 +178,8 @@ The following extensions are currently supported:
@code{crypto} (Cryptography Extensions for v8-A architecture, implies @code{fp+simd}),
@code{dotprod} (Dot Product Extensions for v8.2-A architecture, implies @code{fp+simd}),
@code{fp} (Floating Point Extensions for v8-A architecture),
@code{fp16} (FP16 Extensions for v8.2-A architecture, implies @code{fp}),
@code{fp16fml} (FP16 Floating Point Multiplication Variant Extensions for v8.2-A architecture, implies @code{fp16}),
@code{idiv} (Integer Divide Extensions for v7-A and v7-R architectures),
@code{iwmmxt},
@code{iwmmxt2},

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@ -1,2 +1,2 @@
#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
#as: -march=armv8.2-a+fp16fml -mfpu=neon-fp-armv8
#error-output: armv8_2-a-fp16-illegal.l

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@ -1,4 +1,4 @@
#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8 -mthumb
#as: -march=armv8.2-a+fp16fml -mfpu=neon-fp-armv8 -mthumb
#source: armv8_2-a-fp16.s
#objdump: -d

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@ -1,4 +1,4 @@
#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
#as: -march=armv8.2-a+fp16fml -mfpu=neon-fp-armv8
#source: armv8_2-a-fp16.s
#objdump: -d

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@ -1,4 +1,4 @@
#as: -march=armv8.3-a+fp16 -mfpu=neon-fp-armv8
#as: -march=armv8.3-a+fp16fml -mfpu=neon-fp-armv8
#source: armv8_2-a-fp16.s
#objdump: -d

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@ -1,3 +1,8 @@
2017-11-15 Tamar Christina <tamar.christina@arm.com>
* opcode/arm.h: (ARM_EXT2_FP16_FML): New.
(ARM_AEXT2_V8_4A): Add ARM_EXT2_FP16_FML.
2017-11-13 Jan Beulich <jbeulich@suse.com>
* coff/pe.h (COFF_ENCODE_ALIGNMENT): Cap value to maximum one

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@ -67,6 +67,7 @@
#define ARM_EXT2_V8_3A 0x00000100 /* ARM V8.3A. */
#define ARM_EXT2_V8A 0x00000200 /* ARMv8-A. */
#define ARM_EXT2_V8_4A 0x00000400 /* ARM V8.4A. */
#define ARM_EXT2_FP16_FML 0x00000800 /* ARM V8.2A FP16-FML instructions. */
/* Co-processor space extensions. */
#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
@ -157,7 +158,7 @@
#define ARM_AEXT2_V8_1A (ARM_AEXT2_V8A | ARM_EXT2_PAN)
#define ARM_AEXT2_V8_2A (ARM_AEXT2_V8_1A | ARM_EXT2_V8_2A | ARM_EXT2_RAS)
#define ARM_AEXT2_V8_3A (ARM_AEXT2_V8_2A | ARM_EXT2_V8_3A)
#define ARM_AEXT2_V8_4A (ARM_AEXT2_V8_3A | ARM_EXT2_V8_4A)
#define ARM_AEXT2_V8_4A (ARM_AEXT2_V8_3A | ARM_EXT2_FP16_FML | ARM_EXT2_V8_4A)
#define ARM_AEXT_V8M_BASE (ARM_AEXT_V6SM | ARM_EXT_DIV)
#define ARM_AEXT_V8M_MAIN ARM_AEXT_V7M
#define ARM_AEXT_V8M_MAIN_DSP ARM_AEXT_V7EM