* NEWS: Mention new ARM command-line options and VFP support.
* config/tc-arm.c (ARM_CEXT_XSCALE): Replaces ARM_EXT_XSCALE. All uses changed. (ARM_CEXT_MAVERICK): Similarly. (ARM_ANY): Now means any core instruction. (CPU_DEFAULT): Default to ARM_ANY. (uses_apcs_26, atcps, support_interwork, uses_apcs_float) (pic_code): Declare for all object types. Make type int. (legacy_cpu, legacy_fpu, mcpu_cpu_opt, mcpu_fpu_opt, march_cpu_opt) (march_fpu_opt, mfpu_opt): Declare. (md_longopts): Tidy up conditional definitions. (arm_opts, arm_cpus, arm_archs, arm_fpus, arm_extensions) (arm_long_opts): New tables. (arm_parse_cpu, arm_parse_arch, arm_parse_fpu): New functions. (arm_parse_extension): New function. (md_parse_option): Rewrite using new table-driven system. (md_show_usage): Use new table-driven system. (md_begin): Calculate cpu_variant from command line option data. * doc/as.texinfo (ARM ISA options): Docuement new ARM-specific command-line options. * doc/c-arm.texi: Likewise. Testsuite: * gas/arm/vfp1.d: Use new command-line options. * gas/arm/vfp1xD.d: Likewise. * gas/arm/arm.exp (vfp-bad): Likewise. * gas/arm/maverick.d: Likewise.
This commit is contained in:
Richard Earnshaw
parent
2a538ba50c
commit
03b1477f5d
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@ -1,3 +1,28 @@
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2002-01-18 Richard Earnshaw <rearnsha@arm.com>
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* NEWS: Mention new ARM command-line options and VFP support.
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* config/tc-arm.c (ARM_CEXT_XSCALE): Replaces ARM_EXT_XSCALE. All
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uses changed.
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(ARM_CEXT_MAVERICK): Similarly.
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(ARM_ANY): Now means any core instruction.
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(CPU_DEFAULT): Default to ARM_ANY.
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(uses_apcs_26, atcps, support_interwork, uses_apcs_float)
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(pic_code): Declare for all object types. Make type int.
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(legacy_cpu, legacy_fpu, mcpu_cpu_opt, mcpu_fpu_opt, march_cpu_opt)
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(march_fpu_opt, mfpu_opt): Declare.
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(md_longopts): Tidy up conditional definitions.
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(arm_opts, arm_cpus, arm_archs, arm_fpus, arm_extensions)
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(arm_long_opts): New tables.
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(arm_parse_cpu, arm_parse_arch, arm_parse_fpu): New functions.
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(arm_parse_extension): New function.
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(md_parse_option): Rewrite using new table-driven system.
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(md_show_usage): Use new table-driven system.
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(md_begin): Calculate cpu_variant from command line option data.
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* doc/as.texinfo (ARM ISA options): Docuement new ARM-specific
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command-line options.
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* doc/c-arm.texi: Likewise.
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2002-01-18 Andreas Jaeger <aj@suse.de>
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* as.c (parse_args): Update year.
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7
gas/NEWS
7
gas/NEWS
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@ -1,4 +1,11 @@
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-*- text -*-
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The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
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specifying the target instruction set. The old method of specifying the
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target processor has been deprecated, but is still accepted for
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compatibility.
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Support for the VFP floating-point instruction set has been added to
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the ARM assembler.
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New psuedo op: .incbin to include a set of binary data at a given point
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in the assembly. Contributed by Anders Norlander.
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1231
gas/config/tc-arm.c
1231
gas/config/tc-arm.c
File diff suppressed because it is too large
Load Diff
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@ -274,18 +274,11 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
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@ifset ARM
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@emph{Target ARM options:}
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[@b{-m[arm]1}|@b{-m[arm]2}|@b{-m[arm]250}|@b{-m[arm]3}|
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@b{-m[arm]6}|@b{-m[arm]60}|@b{-m[arm]600}|@b{-m[arm]610}|
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@b{-m[arm]620}|@b{-m[arm]7[t][[d]m[i]][fe]}|@b{-m[arm]70}|
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@b{-m[arm]700}|@b{-m[arm]710[c]}|@b{-m[arm]7100}|
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@b{-m[arm]7500}|@b{-m[arm]8}|@b{-m[arm]810}|@b{-m[arm]9}|
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@b{-m[arm]920}|@b{-m[arm]920t}|@b{-m[arm]9tdmi}|
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@b{-mstrongarm}|@b{-mstrongarm110}|@b{-mstrongarm1100}]
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[@b{-m[arm]v2}|@b{-m[arm]v2a}|@b{-m[arm]v3}|@b{-m[arm]v3m}|
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@b{-m[arm]v4}|@b{-m[arm]v4t}|@b{-m[arm]v5}|@b{-[arm]v5t}|
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@b{-[arm]v5te}]
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[@b{-mthumb}|@b{-mall}]
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[@b{-mfpa10}|@b{-mfpa11}|@b{-mfpe-old}|@b{-mno-fpu}]
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@c Don't document the deprecated options
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[@b{-mcpu}=@var{processor}[+@var{extension}@dots]]
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[@b{-march}=@var{architecture}[+@var{extension}@dots]]
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[@b{-mfpu}=@var{floating-point-fromat}]
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[@b{-mthumb}]
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[@b{-EB}|@b{-EL}]
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[@b{-mapcs-32}|@b{-mapcs-26}|@b{-mapcs-float}|
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@b{-mapcs-reentrant}]
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@ -568,14 +561,14 @@ The following options are available when @value{AS} is configured for the ARM
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processor family.
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@table @gcctabopt
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@item -m[arm][1|2|3|6|7|8|9][...]
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@item -mcpu=@var{processor}[+@var{extension}@dots]
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Specify which ARM processor variant is the target.
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@item -m[arm]v[2|2a|3|3m|4|4t|5|5t]
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@item -march=@var{architecture}[+@var{extension}@dots]
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Specify which ARM architecture variant is used by the target.
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@item -mthumb | -mall
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Enable or disable Thumb only instruction decoding.
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@item -mfpa10 | -mfpa11 | -mfpe-old | -mno-fpu
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@item -mfpu=@var{floating-point-format}
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Select which Floating Point architecture is the target.
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@item -mthumb
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Enable Thumb only instruction decoding.
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@item -mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant | -moabi
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Select which procedure calling convention is in use.
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@item -EB | -EL
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@ -31,45 +31,147 @@
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@table @code
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@cindex @code{-marm} command line option, ARM
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@item -marm@code{[2|250|3|6|60|600|610|620|7|7m|7d|7dm|7di|7dmi|70|700|700i|710|710c|7100|7500|7500fe|7tdmi|8|810|9|9tdmi|920|strongarm|strongarm110|strongarm1100]}
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@itemx -mxscale
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@itemx -marm9e
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@cindex @code{-mcpu=} command line option, ARM
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@item -mcpu=@var{processor}[+@var{extension}@dots]
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This option specifies the target processor. The assembler will issue an
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error message if an attempt is made to assemble an instruction which
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will not execute on the target processor.
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will not execute on the target processor. The following processor names are
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recognized:
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@code{arm1},
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@code{arm2},
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@code{arm250},
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@code{arm3},
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@code{arm6},
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@code{arm60},
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@code{arm600},
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@code{arm610},
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@code{arm620},
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@code{arm7},
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@code{arm7m},
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@code{arm7d},
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@code{arm7dm},
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@code{arm7di},
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@code{arm7dmi},
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@code{arm70},
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@code{arm700},
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@code{arm700i},
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@code{arm710},
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@code{arm710t},
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@code{arm720},
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@code{arm720t},
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@code{arm740t},
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@code{arm710c},
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@code{arm7100},
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@code{arm7500},
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@code{arm7500fe},
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@code{arm7t},
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@code{arm7tdmi},
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@code{arm8},
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@code{arm810},
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@code{strongarm},
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@code{strongarm1},
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@code{strongarm110},
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@code{strongarm1100},
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@code{strongarm1110},
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@code{arm9},
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@code{arm920},
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@code{arm920t},
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@code{arm922t},
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@code{arm940t},
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@code{arm9tdmi},
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@code{arm9e},
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@code{arm946e-r0},
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@code{arm946e},
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@code{arm966e-r0},
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@code{arm966e},
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@code{arm10t},
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@code{arm10e},
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@code{arm1020},
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@code{arm1020t},
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@code{arm1020e},
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@code{ep9312} (ARM920 with Cirrus Maverick coprocessor),
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@code{i80200} (Intel XScale processor)
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and
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@code{xscale}.
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The special name @code{all} may be used to allow the
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assembler to accept instructions valid for any ARM processor.
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The option @code{-marm9e} specifies that the target processor is the
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Cirrus ARM processor with the Maverick DSP co-processor.
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In addition to the basic instruction set, the assembler can be told to
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accept various extension mnemonics that extend the processor using the
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co-processor instruction space. For example, @code{-mcpu=arm920+maverick}
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is equivalent to specifying @code{-mcpu=ep9312}. The following extensions
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are currently supported:
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@code{+maverick}
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and
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@code{+xscale}.
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@cindex @code{-marmv} command line option, ARM
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@item -marmv@code{[2|2a|3|3m|4|4t|5|5t|5te]}
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@cindex @code{-march=} command line option, ARM
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@item -march=@var{architecture}[+@var{extension}@dots]
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This option specifies the target architecture. The assembler will issue
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an error message if an attempt is made to assemble an instruction which
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will not execute on the target architecture.
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The option @code{-marmv5te} specifies that v5t architecture should be
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used with the El Segundo extensions enabled.
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will not execute on the target architecture. The following architecture
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names are recognized:
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@code{armv1},
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@code{armv2},
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@code{armv2a},
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@code{armv2s},
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@code{armv3},
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@code{armv3m},
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@code{armv4},
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@code{armv4xm},
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@code{armv4t},
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@code{armv4txm},
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@code{armv5},
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@code{armv5t},
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@code{armv5txm},
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@code{armv5te},
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@code{armv5texp}
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and
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@code{xscale}.
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If both @code{-mcpu} and
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@code{-march} are specified, the assembler will use
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the setting for @code{-mcpu}.
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The architecture option can be extended with the same instruction set
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extension options as the @code{-mcpu} option.
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@cindex @code{-mfpu=} command line option, ARM
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@item -mfpu=@var{floating-point-format}
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This option specifies the floating point format to assemble for. The
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assembler will issue an error message if an attempt is made to assemble
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an instruction which will not execute on the target floating point unit.
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The following format options are recognized:
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@code{softfpa},
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@code{fpe},
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@code{fpa},
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@code{fpa10},
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@code{fpa11},
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@code{arm7500fe},
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@code{softvfp},
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@code{softvfp+vfp},
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@code{vfp},
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@code{vfp10},
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@code{vfp10-r0},
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@code{vfp9},
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@code{vfpxd},
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@code{arm1020t}
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and
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@code{arm1020e}.
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In addition to determining which instructions are assembled, this option
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also affects the way in which the @code{.double} assembler directive behaves
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when assembling little-endian code.
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The default is dependent on the processor selected. For Architecture 5 or
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later, the default is to assembler for VFP instructions; for earlier
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architectures the default is to assemble for FPA instructions.
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@cindex @code{-mthumb} command line option, ARM
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@item -mthumb
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This option specifies that only Thumb instructions should be assembled.
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@cindex @code{-mall} command line option, ARM
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@item -mall
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This option specifies that any Arm or Thumb instruction should be assembled.
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@cindex @code{-mfpa} command line option, ARM
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@item -mfpa @code{[10|11]}
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This option specifies the floating point architecture in use on the
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target processor.
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@cindex @code{-mfpe-old} command line option, ARM
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@item -mfpe-old
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Do not allow the assembly of floating point multiple instructions.
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@cindex @code{-mno-fpu} command line option, ARM
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@item -mno-fpu
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Do not allow the assembly of any floating point instructions.
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This option specifies that the assembler should start assembling Thumb
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instructions; that is, it should behave as though the file starts with a
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@code{.code 16} directive.
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@cindex @code{-mthumb-interwork} command line option, ARM
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@item -mthumb-interwork
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@ -1,3 +1,10 @@
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2002-01-18 Richard Earnshaw <rearnsha@arm.com>
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* gas/arm/vfp1.d: Use new command-line options.
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* gas/arm/vfp1xD.d: Likewise.
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* gas/arm/arm.exp (vfp-bad): Likewise.
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* gas/arm/maverick.d: Likewise.
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2002-01-17 Timothy Wall <twall@oculustech.com>
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* gas/tic54x/labels.s (after_macro): Correct comments.
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@ -51,7 +51,7 @@ if {[istarget *arm*-*-*] || [istarget "xscale-*-*"]} then {
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run_dump_test "vfp1"
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run_errors_test "vfp-bad" "-mvfp" "VFP errors"
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run_errors_test "vfp-bad" "-mfpu=vfp" "VFP errors"
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run_dump_test "xscale"
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@ -71,6 +71,7 @@ if [istarget arm-*-pe] {
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# Since big-endian numbers have the normal format, this doesn't exist.
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#run_dump_test "be-fpconst"
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}
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if [istarget arm9e-*] {
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run_dump_test "maverick"
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}
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@ -1,6 +1,6 @@
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#objdump: -dr --prefix-address --show-raw-insn
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#name: Maverick
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#as: -marm9e
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#as: -mcpu=arm9+maverick
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# Test the instructions of Maverick
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@ -1,6 +1,6 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: VFP Double-precision instructions
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#as: -mvfp
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#as: -mfpu=vfp
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# Test the ARM VFP Double Precision instructions
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@ -1,6 +1,6 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: VFP Single-precision instructions
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#as: -mvfpxd
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#as: -mfpu=vfpxd
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# Test the ARM VFP Single Precision instructions
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Loading…
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