From 043b7057fd25d89f2539850adf2c06de6ea42742 Mon Sep 17 00:00:00 2001 From: Chris Demetriou Date: Sun, 3 Mar 2002 06:49:43 +0000 Subject: [PATCH] 2002-03-02 Chris Demetriou * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND. * mips.igen (LL, CxC1, MxC1): Likewise. --- sim/mips/ChangeLog | 5 +++++ sim/mips/interp.c | 2 +- sim/mips/mips.igen | 14 +++++++------- 3 files changed, 13 insertions(+), 8 deletions(-) diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 43b78c3ec1..c02a53bbad 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,8 @@ +2002-03-02 Chris Demetriou + + * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND. + * mips.igen (LL, CxC1, MxC1): Likewise. + 2002-03-02 Chris Demetriou * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt, diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 95f0ab63f5..3e31ce46a7 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -1426,7 +1426,7 @@ load_word (SIM_DESC sd, LoadMemory (&memval,NULL,uncached, AccessLength_WORD, paddr, vaddr, isDATA, isREAL); byte = (vaddr & mask) ^ (bigend << 2); - return SIGNEXTEND (((memval >> (8 * byte)) & 0xffffffff), 32); + return EXTEND32 (memval >> (8 * byte)); } } diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index 1e6eb62d75..be7882064b 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -1716,7 +1716,7 @@ paddr = ((paddr & ~mask) | ((paddr & mask) ^ (reverse << shift))); LoadMemory(&memval,&memval1,uncached,AccessLength_WORD,paddr,vaddr,isDATA,isREAL); byte = ((vaddr & mask) ^ (bigend << shift)); - GPR[RT] = (SIGNEXTEND(((memval >> (8 * byte)) & 0xFFFFFFFF),32)); + GPR[RT] = EXTEND32 (memval >> (8 * byte)); LLBIT = 1; } } @@ -3269,9 +3269,9 @@ else { /* control from */ if (FS == 0) - PENDING_FILL(RT,SIGNEXTEND(FCR0,32)); + PENDING_FILL(RT, EXTEND32 (FCR0)); else if (FS == 31) - PENDING_FILL(RT,SIGNEXTEND(FCR31,32)); + PENDING_FILL(RT, EXTEND32 (FCR31)); /* else NOP */ } } @@ -3310,12 +3310,12 @@ if (FS == 0) { TRACE_ALU_INPUT1 (FCR0); - GPR[RT] = SIGNEXTEND (FCR0, 32); + GPR[RT] = EXTEND32 (FCR0); } else if (FS == 31) { TRACE_ALU_INPUT1 (FCR31); - GPR[RT] = SIGNEXTEND (FCR31, 32); + GPR[RT] = EXTEND32 (FCR31); } TRACE_ALU_RESULT (GPR[RT]); /* else NOP */ @@ -3656,7 +3656,7 @@ PENDING_FILL ((FS + FGRIDX), VL4_8(GPR[RT])); } else /*MFC1*/ - PENDING_FILL (RT, SIGNEXTEND(FGR[FS],32)); + PENDING_FILL (RT, EXTEND32 (FGR[FS])); } 010001,00,X,00,5.RT,5.FS,00000000000:COP1Sb:32,f::MxC1 "m%sc1 r, f" @@ -3672,7 +3672,7 @@ /*MTC1*/ StoreFPR (FS, fmt_uninterpreted_32, VL4_8 (GPR[RT])); else /*MFC1*/ - GPR[RT] = SIGNEXTEND(FGR[FS],32); + GPR[RT] = EXTEND32 (FGR[FS]); }