gas/
2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix if there was none specified for moves between scalar and core register. gas/testsuite/ 2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/arm/neon-omit.s: Add tests for suffix less VMOV. * gas/arm/neon-omit.d: Update accordingly.
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@ -1,3 +1,9 @@
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2013-04-09 Jan Beulich <jbeulich@suse.com>
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* gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
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if there was none specified for moves between scalar and core
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register.
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2013-04-09 Jan Beulich <jbeulich@suse.com>
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* gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
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@ -15360,6 +15360,16 @@ do_neon_mov (void)
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unsigned dn = NEON_SCALAR_REG (inst.operands[0].reg);
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unsigned x = NEON_SCALAR_INDEX (inst.operands[0].reg);
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/* .<size> is optional here, defaulting to .32. */
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if (inst.vectype.elems == 0
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&& inst.operands[0].vectype.type == NT_invtype
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&& inst.operands[1].vectype.type == NT_invtype)
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{
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inst.vectype.el[0].type = NT_untyped;
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inst.vectype.el[0].size = 32;
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inst.vectype.elems = 1;
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}
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et = neon_check_type (2, NS_NULL, N_8 | N_16 | N_32 | N_KEY, N_EQK);
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logsize = neon_logbits (et.size);
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@ -15409,6 +15419,16 @@ do_neon_mov (void)
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unsigned x = NEON_SCALAR_INDEX (inst.operands[1].reg);
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unsigned abcdebits = 0;
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/* .<dt> is optional here, defaulting to .32. */
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if (inst.vectype.elems == 0
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&& inst.operands[0].vectype.type == NT_invtype
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&& inst.operands[1].vectype.type == NT_invtype)
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{
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inst.vectype.el[0].type = NT_untyped;
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inst.vectype.el[0].size = 32;
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inst.vectype.elems = 1;
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}
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et = neon_check_type (2, NS_NULL,
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N_EQK, N_S8 | N_S16 | N_U8 | N_U16 | N_32 | N_KEY);
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logsize = neon_logbits (et.size);
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@ -1,3 +1,8 @@
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2013-04-09 Jan Beulich <jbeulich@suse.com>
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* gas/arm/neon-omit.s: Add tests for suffix less VMOV.
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* gas/arm/neon-omit.d: Update accordingly.
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2013-04-09 Jan Beulich <jbeulich@suse.com>
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* gas/arm/neon-addressing-bad.s: Add test for further invalid VST
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@ -93,4 +93,6 @@ Disassembly of section .text:
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0[0-9a-f]+ <[^>]+> f3954556 vsli\.16 q2, q3, #5
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0[0-9a-f]+ <[^>]+> f3bff6b7 vqshlu\.s64 d15, d23, #63.*
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0[0-9a-f]+ <[^>]+> f2b25386 vext\.8 d5, d18, d6, #3
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0[0-9a-f]+ <[^>]+> ee000b10 vmov(\.32)? d0\[0\], r0
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0[0-9a-f]+ <[^>]+> ee100b10 vmov(\.32)? r0, d0\[0\]
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0[0-9a-f]+ <[^>]+> f3020d54 vmul\.f32 q0, q1, q2
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@ -96,5 +96,10 @@
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vqshlu.s64 d15,d23,#63
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vext.8 d5,d18,d6,#3
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@ Also test VMOV with omitted suffix:
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vmov d0[0], r0
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vmov r0, d0[0]
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@ PR 11136 - this used to crash the assembler.
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vmul.f32 q0,q1,q2
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