* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
	rts/l and rte/l register lists.

gas/
	* config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register
	lists.  Allow single-register ranges.

testsuite/
	* gas/h8300/h8sx_rtsl.[sd]: New test.
	* gas/h8300/h8300.exp: Run it.
This commit is contained in:
Richard Sandiford 2003-06-10 07:27:56 +00:00
parent 28d7dee9f8
commit 0613284fd4
8 changed files with 48 additions and 15 deletions

View File

@ -1,3 +1,8 @@
2003-06-10 Richard Sandiford <rsandifo@redhat.com>
* config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register
lists. Allow single-register ranges.
2003-06-10 Richard Sandiford <rsandifo@redhat.com>
* config/tc-h8300.c (h8300sxnmode): New.

View File

@ -1091,29 +1091,19 @@ get_rtsl_operands (char *ptr, struct h8_op *operand)
as_bad (_("expected register"));
return;
}
if (type == 1)
ptr += len;
if (*ptr == '-')
{
ptr += len;
if (*ptr++ != '-')
{
as_bad (_("expected register list"));
return;
}
len = parse_reg (ptr, &mode, &num2, SRC);
len = parse_reg (++ptr, &mode, &num2, SRC);
if (len == 0 || (mode & MODE) != REG)
{
as_bad (_("expected register"));
return;
}
ptr += len;
if (*ptr++ != ')')
{
as_bad (_("expected closing paren"));
return;
}
/* CONST_xxx are used as placeholders in the opcode table. */
num = num2 - num;
if (num < 1 || num > 3)
if (num < 0 || num > 3)
{
as_bad (_("invalid register list"));
return;
@ -1121,6 +1111,11 @@ get_rtsl_operands (char *ptr, struct h8_op *operand)
}
else
num2 = num, num = 0;
if (type == 1 && *ptr++ != ')')
{
as_bad (_("expected closing paren"));
return;
}
operand[0].mode = RS32;
operand[1].mode = RD32;
operand[0].reg = num;

View File

@ -1,3 +1,8 @@
2003-06-10 Richard Sandiford <rsandifo@redhat.com>
* gas/h8300/h8sx_rtsl.[sd]: New test.
* gas/h8300/h8300.exp: Run it.
2003-06-10 Richard Sandiford <rsandifo@redhat.com>
* gas/h8300/h8sx_disp2.[sd]: New test.

View File

@ -2168,6 +2168,7 @@ if [istarget h8300*-*-*] then {
do_h8300h_mov32bug
run_dump_test h8sx_disp2
run_dump_test h8sx_rtsl
# Now some random tests
set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] ]

View File

@ -0,0 +1,14 @@
# objdump: -dr
.*: *file format elf32-h8300
Disassembly of section \.text:
0+00 <\.text>:
*0: 54 00 * 54 00 * rts/l er0
*2: 54 01 * 54 01 * rts/l er1
*4: 54 03 * 54 03 * rts/l er3
*6: 54 05 * 54 05 * rts/l er5
*8: 54 16 * 54 16 * rts/l er5-er6
*a: 54 25 * 54 25 * rts/l er3-er5
*c: 54 34 * 54 34 * rts/l er1-er4

View File

@ -0,0 +1,8 @@
.h8300sx
rts/l er0
rts/l er1-er1
rts/l (er3)
rts/l (er5-er5)
rts/l er5-er6
rts/l er3-er5
rts/l (er1-er4)

View File

@ -1,3 +1,8 @@
2003-06-10 Richard Sandiford <rsandifo@redhat.com>
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
rts/l and rte/l register lists.
2003-06-03 Nick Clifton <nickc@redhat.com>
* frv-desc.c: Regenerate.

View File

@ -698,7 +698,7 @@ bfd_h8_disassemble (addr, info, mach)
outfn (stream, "er%d", regno[1]);
else
{
outfn (stream, "(er%d-er%d)", regno[1] - regno[0],
outfn (stream, "er%d-er%d", regno[1] - regno[0],
regno[1]);
}
return qi->length;