Fix accumulator shifts
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517078c1b3
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069398aaff
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@ -1,3 +1,9 @@
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Mon Sep 9 13:27:26 1996 Michael Meissner <meissner@tiktok.cygnus.com>
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* simops.c (trace_output): Properly align accumulator output.
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(OP_3{0,2,4}00): Properly parenthesize test expression. Add error
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if shift count is too high.
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Fri Sep 6 17:56:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
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* simops.c (OP_2600, OP_2601): Changed min and max comparisons
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@ -325,14 +325,14 @@ trace_output (result)
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case OP_ACCUM:
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case OP_ACCUM_OUTPUT:
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(*d10v_callback->printf_filtered) (d10v_callback, " :: %*s0x%.2x%.8lx F0=%d F1=%d C=%d\n", SIZE_VALUES-10, "",
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(*d10v_callback->printf_filtered) (d10v_callback, " :: %*s0x%.2x%.8lx F0=%d F1=%d C=%d\n", SIZE_VALUES-12, "",
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((int)(State.a[OP[0]] >> 32) & 0xff),
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((unsigned long)State.a[OP[0]]) & 0xffffffff,
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State.F0 != 0, State.F1 != 0, State.C != 0);
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break;
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case OP_ACCUM_REVERSE:
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(*d10v_callback->printf_filtered) (d10v_callback, " :: %*s0x%.2x%.8lx F0=%d F1=%d C=%d\n", SIZE_VALUES-10, "",
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(*d10v_callback->printf_filtered) (d10v_callback, " :: %*s0x%.2x%.8lx F0=%d F1=%d C=%d\n", SIZE_VALUES-12, "",
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((int)(State.a[OP[1]] >> 32) & 0xff),
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((unsigned long)State.a[OP[1]]) & 0xffffffff,
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State.F0 != 0, State.F1 != 0, State.C != 0);
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@ -1913,8 +1913,14 @@ OP_3200 ()
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{
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int64 tmp;
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trace_input ("sll", OP_ACCUM, OP_REG, OP_VOID);
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if (State.regs[OP[1]] & 31 <= 16)
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if ((State.regs[OP[1]] & 31) <= 16)
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tmp = SEXT40 (State.a[OP[0]]) << (State.regs[OP[1]] & 31);
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else
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{
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(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", State.regs[OP[1]] & 31);
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State.exception = SIGILL;
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return;
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}
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if (State.ST)
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{
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@ -1990,8 +1996,15 @@ void
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OP_3400 ()
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{
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trace_input ("sra", OP_ACCUM, OP_REG, OP_VOID);
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if (State.regs[OP[1]] & 31 <= 16)
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if ((State.regs[OP[1]] & 31) <= 16)
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State.a[OP[0]] >>= (State.regs[OP[1]] & 31);
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else
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{
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(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", State.regs[OP[1]] & 31);
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State.exception = SIGILL;
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return;
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}
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trace_output (OP_ACCUM);
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}
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@ -2030,8 +2043,15 @@ void
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OP_3000 ()
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{
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trace_input ("srl", OP_ACCUM, OP_REG, OP_VOID);
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if (State.regs[OP[1]] & 31 <= 16)
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if ((State.regs[OP[1]] & 31) <= 16)
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State.a[OP[0]] >>= (State.regs[OP[1]] & 31);
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else
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{
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(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", State.regs[OP[1]] & 31);
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State.exception = SIGILL;
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return;
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}
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trace_output (OP_ACCUM);
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}
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