opcodes/microblaze: Rename 'or', 'and', 'xor' to avoid C++ conflict
Building GDB as a C++ program, we see: In file included from gdb/microblaze-tdep.c:37:0: gdb/../opcodes/../opcodes/microblaze-opcm.h: At global scope: gdb/../opcodes/../opcodes/microblaze-opcm.h:32:51: error: expected identifier before ‘or’ token ncget, ncput, muli, bslli, bsrai, bsrli, mului, or, and, xor, ^ gdb/../opcodes/../opcodes/microblaze-opcm.h:32:51: error: expected ‘}’ before ‘or’ token gdb/../opcodes/../opcodes/microblaze-opcm.h:32:51: error: expected unqualified-id before ‘or’ token gdb/../opcodes/../opcodes/microblaze-opcm.h:60:1: error: expected declaration before ‘}’ token }; ^ opcodes/ChangeLog: 2015-02-10 Pedro Alves <palves@redhat.com> Tom Tromey <tromey@redhat.com> * microblaze-opcm.h (or, and, xor): Rename to microblaze_or, microblaze_and, microblaze_xor. * microblaze-opc.h (opcodes): Adjust.
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@ -1,3 +1,10 @@
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2015-02-10 Pedro Alves <palves@redhat.com>
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Tom Tromey <tromey@redhat.com>
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* microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
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microblaze_and, microblaze_xor.
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* microblaze-opc.h (opcodes): Adjust.
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2015-01-28 James Bowman <james.bowman@ftdichip.com>
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* Makefile.am: Add FT32 files.
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@ -158,9 +158,9 @@ struct op_code_struct
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{"bslli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3, bslli, barrel_shift_inst },
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{"bsrai", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3, bsrai, barrel_shift_inst },
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{"bsrli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3, bsrli, barrel_shift_inst },
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{"or", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, or, logical_inst },
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{"and", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000000, OPCODE_MASK_H4, and, logical_inst },
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{"xor", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000000, OPCODE_MASK_H4, xor, logical_inst },
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{"or", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, microblaze_or, logical_inst },
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{"and", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000000, OPCODE_MASK_H4, microblaze_and, logical_inst },
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{"xor", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000000, OPCODE_MASK_H4, microblaze_xor, logical_inst },
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{"andn", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000000, OPCODE_MASK_H4, andn, logical_inst },
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{"pcmpbf",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000400, OPCODE_MASK_H4, pcmpbf, logical_inst },
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{"pcmpbc",INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000400, OPCODE_MASK_H4, pcmpbc, logical_inst },
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@ -29,7 +29,9 @@ enum microblaze_instr
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addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul,
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mulh, mulhu, mulhsu,swapb,swaph,
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idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput,
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ncget, ncput, muli, bslli, bsrai, bsrli, mului, or, and, xor,
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ncget, ncput, muli, bslli, bsrai, bsrli, mului,
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/* 'or/and/xor' are C++ keywords. */
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microblaze_or, microblaze_and, microblaze_xor,
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andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16,
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wic, wdc, wdcclear, wdcflush, mts, mfs, mbar, br, brd,
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brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt,
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