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* gas/mips/at-1.d: Handle ECOFF relocations. 

* gas/mips/eret-1.d: Handle ECOFF.
	* gas/mips/eret-2.d: Likewise.
	* gas/mips/eret-3.d: Likewise.
	* gas/mips/mips.exp: Only run "aent" for ELF.
This commit is contained in:
Maciej W. Rozycki 2010-10-24 10:43:40 +00:00
parent 17f828b35d
commit 08ddc2802f
6 changed files with 152 additions and 144 deletions
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8
gas/testsuite/ChangeLog
View File

@ -1,3 +1,11 @@
2010-10-24 Maciej W. Rozycki <macro@linux-mips.org>
* gas/mips/at-1.d: Handle ECOFF relocations.
* gas/mips/eret-1.d: Handle ECOFF.
* gas/mips/eret-2.d: Likewise.
* gas/mips/eret-3.d: Likewise.
* gas/mips/mips.exp: Only run "aent" for ELF.
2010-10-24 Maciej W. Rozycki <macro@linux-mips.org>
* gas/mips/ld.s: Adjust to let SD, L.D, S.D, LDC1 and SDC1

256
gas/testsuite/gas/mips/at-1.d
View File

@ -26,16 +26,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu at,at,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu at,at,k1
[0-9a-f]+ <[^>]*> lw k1,0\(at\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu at,at,k1
[0-9a-f]+ <[^>]*> sw k1,0\(at\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -55,16 +55,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu v0,v0,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(v0\)
[0-9a-f]+ <[^>]*> lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu v0,v0,k1
[0-9a-f]+ <[^>]*> lw k1,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui v0,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu v0,v0,k1
[0-9a-f]+ <[^>]*> sw k1,0\(v0\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -84,16 +84,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu v1,v1,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(v1\)
[0-9a-f]+ <[^>]*> lui v1,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu v1,v1,k1
[0-9a-f]+ <[^>]*> lw k1,0\(v1\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui v1,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu v1,v1,k1
[0-9a-f]+ <[^>]*> sw k1,0\(v1\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -113,16 +113,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu a0,a0,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(a0\)
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu a0,a0,k1
[0-9a-f]+ <[^>]*> lw k1,0\(a0\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui a0,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu a0,a0,k1
[0-9a-f]+ <[^>]*> sw k1,0\(a0\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -142,16 +142,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu a1,a1,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(a1\)
[0-9a-f]+ <[^>]*> lui a1,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu a1,a1,k1
[0-9a-f]+ <[^>]*> lw k1,0\(a1\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui a1,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu a1,a1,k1
[0-9a-f]+ <[^>]*> sw k1,0\(a1\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -171,16 +171,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu a2,a2,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(a2\)
[0-9a-f]+ <[^>]*> lui a2,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu a2,a2,k1
[0-9a-f]+ <[^>]*> lw k1,0\(a2\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui a2,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu a2,a2,k1
[0-9a-f]+ <[^>]*> sw k1,0\(a2\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -200,16 +200,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu a3,a3,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(a3\)
[0-9a-f]+ <[^>]*> lui a3,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu a3,a3,k1
[0-9a-f]+ <[^>]*> lw k1,0\(a3\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui a3,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu a3,a3,k1
[0-9a-f]+ <[^>]*> sw k1,0\(a3\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -229,16 +229,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu t0,t0,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(t0\)
[0-9a-f]+ <[^>]*> lui t0,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t0,t0,k1
[0-9a-f]+ <[^>]*> lw k1,0\(t0\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui t0,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t0,t0,k1
[0-9a-f]+ <[^>]*> sw k1,0\(t0\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -258,16 +258,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu t1,t1,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(t1\)
[0-9a-f]+ <[^>]*> lui t1,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t1,t1,k1
[0-9a-f]+ <[^>]*> lw k1,0\(t1\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui t1,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t1,t1,k1
[0-9a-f]+ <[^>]*> sw k1,0\(t1\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -287,16 +287,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu t2,t2,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(t2\)
[0-9a-f]+ <[^>]*> lui t2,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t2,t2,k1
[0-9a-f]+ <[^>]*> lw k1,0\(t2\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui t2,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t2,t2,k1
[0-9a-f]+ <[^>]*> sw k1,0\(t2\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -316,16 +316,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu t3,t3,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(t3\)
[0-9a-f]+ <[^>]*> lui t3,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t3,t3,k1
[0-9a-f]+ <[^>]*> lw k1,0\(t3\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui t3,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t3,t3,k1
[0-9a-f]+ <[^>]*> sw k1,0\(t3\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -345,16 +345,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu t4,t4,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(t4\)
[0-9a-f]+ <[^>]*> lui t4,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t4,t4,k1
[0-9a-f]+ <[^>]*> lw k1,0\(t4\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui t4,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t4,t4,k1
[0-9a-f]+ <[^>]*> sw k1,0\(t4\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -374,16 +374,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu t5,t5,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(t5\)
[0-9a-f]+ <[^>]*> lui t5,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t5,t5,k1
[0-9a-f]+ <[^>]*> lw k1,0\(t5\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui t5,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t5,t5,k1
[0-9a-f]+ <[^>]*> sw k1,0\(t5\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -403,16 +403,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu t6,t6,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(t6\)
[0-9a-f]+ <[^>]*> lui t6,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t6,t6,k1
[0-9a-f]+ <[^>]*> lw k1,0\(t6\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui t6,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t6,t6,k1
[0-9a-f]+ <[^>]*> sw k1,0\(t6\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -432,16 +432,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu t7,t7,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(t7\)
[0-9a-f]+ <[^>]*> lui t7,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t7,t7,k1
[0-9a-f]+ <[^>]*> lw k1,0\(t7\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui t7,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t7,t7,k1
[0-9a-f]+ <[^>]*> sw k1,0\(t7\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -461,16 +461,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu s0,s0,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(s0\)
[0-9a-f]+ <[^>]*> lui s0,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s0,s0,k1
[0-9a-f]+ <[^>]*> lw k1,0\(s0\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui s0,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s0,s0,k1
[0-9a-f]+ <[^>]*> sw k1,0\(s0\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -490,16 +490,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu s1,s1,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(s1\)
[0-9a-f]+ <[^>]*> lui s1,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s1,s1,k1
[0-9a-f]+ <[^>]*> lw k1,0\(s1\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui s1,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s1,s1,k1
[0-9a-f]+ <[^>]*> sw k1,0\(s1\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -519,16 +519,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu s2,s2,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(s2\)
[0-9a-f]+ <[^>]*> lui s2,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s2,s2,k1
[0-9a-f]+ <[^>]*> lw k1,0\(s2\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui s2,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s2,s2,k1
[0-9a-f]+ <[^>]*> sw k1,0\(s2\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -548,16 +548,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu s3,s3,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(s3\)
[0-9a-f]+ <[^>]*> lui s3,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s3,s3,k1
[0-9a-f]+ <[^>]*> lw k1,0\(s3\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui s3,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s3,s3,k1
[0-9a-f]+ <[^>]*> sw k1,0\(s3\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -577,16 +577,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu s4,s4,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(s4\)
[0-9a-f]+ <[^>]*> lui s4,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s4,s4,k1
[0-9a-f]+ <[^>]*> lw k1,0\(s4\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui s4,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s4,s4,k1
[0-9a-f]+ <[^>]*> sw k1,0\(s4\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -606,16 +606,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu s5,s5,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(s5\)
[0-9a-f]+ <[^>]*> lui s5,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s5,s5,k1
[0-9a-f]+ <[^>]*> lw k1,0\(s5\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui s5,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s5,s5,k1
[0-9a-f]+ <[^>]*> sw k1,0\(s5\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -635,16 +635,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu s6,s6,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(s6\)
[0-9a-f]+ <[^>]*> lui s6,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s6,s6,k1
[0-9a-f]+ <[^>]*> lw k1,0\(s6\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui s6,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s6,s6,k1
[0-9a-f]+ <[^>]*> sw k1,0\(s6\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -664,16 +664,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu s7,s7,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(s7\)
[0-9a-f]+ <[^>]*> lui s7,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s7,s7,k1
[0-9a-f]+ <[^>]*> lw k1,0\(s7\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui s7,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s7,s7,k1
[0-9a-f]+ <[^>]*> sw k1,0\(s7\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -693,16 +693,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu t8,t8,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(t8\)
[0-9a-f]+ <[^>]*> lui t8,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t8,t8,k1
[0-9a-f]+ <[^>]*> lw k1,0\(t8\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui t8,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t8,t8,k1
[0-9a-f]+ <[^>]*> sw k1,0\(t8\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -722,16 +722,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu t9,t9,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(t9\)
[0-9a-f]+ <[^>]*> lui t9,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t9,t9,k1
[0-9a-f]+ <[^>]*> lw k1,0\(t9\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui t9,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu t9,t9,k1
[0-9a-f]+ <[^>]*> sw k1,0\(t9\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -751,16 +751,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu k0,k0,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(k0\)
[0-9a-f]+ <[^>]*> lui k0,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu k0,k0,k1
[0-9a-f]+ <[^>]*> lw k1,0\(k0\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui k0,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu k0,k0,k1
[0-9a-f]+ <[^>]*> sw k1,0\(k0\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k0,32767\(k0\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k0,32767\(k0\)
@ -780,16 +780,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu k1,k1,k0
[0-9a-f]+ <[^>]*> sw k0,32767\(k1\)
[0-9a-f]+ <[^>]*> lui k1,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu k1,k1,k0
[0-9a-f]+ <[^>]*> lw k0,0\(k1\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui k1,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu k1,k1,k0
[0-9a-f]+ <[^>]*> sw k0,0\(k1\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -809,16 +809,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu gp,gp,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(gp\)
[0-9a-f]+ <[^>]*> lui gp,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu gp,gp,k1
[0-9a-f]+ <[^>]*> lw k1,0\(gp\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui gp,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu gp,gp,k1
[0-9a-f]+ <[^>]*> sw k1,0\(gp\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -838,16 +838,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu s8,s8,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(s8\)
[0-9a-f]+ <[^>]*> lui s8,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s8,s8,k1
[0-9a-f]+ <[^>]*> lw k1,0\(s8\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui s8,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu s8,s8,k1
[0-9a-f]+ <[^>]*> sw k1,0\(s8\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -867,16 +867,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu sp,sp,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(sp\)
[0-9a-f]+ <[^>]*> lui sp,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu sp,sp,k1
[0-9a-f]+ <[^>]*> lw k1,0\(sp\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui sp,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu sp,sp,k1
[0-9a-f]+ <[^>]*> sw k1,0\(sp\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -896,16 +896,16 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu ra,ra,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(ra\)
[0-9a-f]+ <[^>]*> lui ra,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu ra,ra,k1
[0-9a-f]+ <[^>]*> lw k1,0\(ra\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui ra,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu ra,ra,k1
[0-9a-f]+ <[^>]*> sw k1,0\(ra\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> lw k1,32767\(k1\)
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> sw k1,32767\(k1\)
@ -925,14 +925,14 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> addu at,at,k1
[0-9a-f]+ <[^>]*> sw k1,32767\(at\)
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu at,at,k1
[0-9a-f]+ <[^>]*> lw k1,0\(at\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
[0-9a-f]+ <[^>]*> nop
[0-9a-f]+ <[^>]*> lui at,0x0
[ ]*[0-9a-f]+: R_MIPS_HI16 symbol
[ ]*[0-9a-f]+: (R_MIPS_HI16|REFHI) symbol
[0-9a-f]+ <[^>]*> addu at,at,k1
[0-9a-f]+ <[^>]*> sw k1,0\(at\)
[ ]*[0-9a-f]+: R_MIPS_LO16 symbol
[ ]*[0-9a-f]+: (R_MIPS_LO16|REFLO) symbol
\.\.\.

10
gas/testsuite/gas/mips/eret-1.d
View File

@ -1,12 +1,12 @@
#objdump: -d
#name: MIPS eret-1 disassembly
#as: -mabi=32 -mfix-24k -march=24kc --no-warn
#objdump: -d -mmips:isa32r2
#name: MIPS eret-1
#as: -32 -mfix-24k -march=24kc --no-warn
.*\.o: file format .*mips.*
.*\.o: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <foo>:
[0-9a-f]+ <.*>:
[ 0-9a-f]+: 240c0000 li t4,0
[ 0-9a-f]+: 42000018 eret
[ 0-9a-f]+: 00000000 nop

10
gas/testsuite/gas/mips/eret-2.d
View File

@ -1,12 +1,12 @@
#objdump: -d
#name: MIPS eret-2 disassembly
#as: -mabi=32 -mfix-24k -march=24kc --no-warn
#objdump: -d -mmips:isa32r2
#name: MIPS eret-2
#as: -32 -mfix-24k -march=24kc --no-warn
.*\.o: file format .*mips.*
.*\.o: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <foo>:
[0-9a-f]+ <.*>:
[ 0-9a-f]+: 42000018 eret
[ 0-9a-f]+: 00000000 nop
[ 0-9a-f]+: 1000fffd b [0-9a-f]+ <foo>

8
gas/testsuite/gas/mips/eret-3.d
View File

@ -1,8 +1,8 @@
#objdump: -d
#name: MIPS eret-3 disassembly
#as: -mabi=32 -mfix-24k -march=24kc --no-warn
#objdump: -d -mmips:isa32r2
#name: MIPS eret-3
#as: -32 -mfix-24k -march=24kc --no-warn
.*\.o: file format .*mips.*
.*\.o: +file format .*mips.*
Disassembly of section \.text:

4
gas/testsuite/gas/mips/mips.exp
View File

@ -823,6 +823,8 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test "tls-ill" "-32"
run_dump_test "tls-o32"
run_dump_test "jalr2"
run_dump_test_arches "aent" [mips_arch_list_matching mips1]
}
if $has_newabi {
@ -962,6 +964,4 @@ if { [istarget mips*-*-vxworks*] } {
[mips_arch_list_matching mips32r2]
if $has_newabi { run_dump_test "cfi-n64-1" }
run_dump_test_arches "aent" [mips_arch_list_matching mips1]
}