Make RL78 disassembler and simulator respect ISA for mul/div
[gas] * config/rl78-defs.h (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. * config/rl78-parse.y (ISA_G10): New. (ISA_G13): New. (ISA_G14): New. (MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them. * config/tc-rl78.c (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. [gdb] * rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to rl78_decode_opcode [include] * dis-asm.h (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. * opcode/rl78.h (RL78_Dis_Isa): New. (rl78_decode_opcode): Add ISA parameter. [opcodes] * disassemble.c (disassembler): Choose suitable disassembler based on E_ABI. * rl78-decode.opc (rl78_decode_opcode): Take ISA parameter. Use it to decode mul/div insns. * rl78-decode.c: Regenerate. * rl78-dis.c (print_insn_rl78): Rename to... (print_insn_rl78_common): ...this, take ISA parameter. (print_insn_rl78): New. (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. [sim] * rl78/cpu.c (g14_multiply): New. * rl78/cpu.h (g14_multiply): New. * rl78/load.c (rl78_load): Decode ISA completely. * rl78/main.c (main): Expand -M to include other ISAs. * rl78/rl78.c (decode_opcode): Decode based on ISA. * rl78/trace.c (rl78_disasm_fn): New. (sim_disasm_init): Reset it. (sim_disasm_one): Get correct disassembler for ISA.
This commit is contained in:
parent
b49f93f699
commit
0952813b0b
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@ -1,3 +1,16 @@
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2015-04-30 DJ Delorie <dj@redhat.com>
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* config/rl78-defs.h (rl78_isa_g10): New.
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(rl78_isa_g13): New.
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(rl78_isa_g14): New.
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* config/rl78-parse.y (ISA_G10): New.
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(ISA_G13): New.
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(ISA_G14): New.
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(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
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* config/tc-rl78.c (rl78_isa_g10): New.
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(rl78_isa_g13): New.
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(rl78_isa_g14): New.
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2015-04-30 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (i386_target_format): Use "else if" on
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@ -47,6 +47,10 @@ extern void rl78_linkrelax_branch (void);
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extern int rl78_parse (void);
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extern int rl78_wrap (void);
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extern int rl78_isa_g10 (void);
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extern int rl78_isa_g13 (void);
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extern int rl78_isa_g14 (void);
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extern char * rl78_lex_start;
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extern char * rl78_lex_end;
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#endif
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@ -105,6 +105,10 @@ static int rl78_bit_insn = 0;
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#define WA(x) if (!expr_is_word_aligned (x)) rl78_error ("Expression not word-aligned");
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#define ISA_G10(s) if (!rl78_isa_g10()) rl78_error (s " is only supported on the G10")
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#define ISA_G13(s) if (!rl78_isa_g13()) rl78_error (s " is only supported on the G13")
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#define ISA_G14(s) if (!rl78_isa_g14()) rl78_error (s " is only supported on the G14")
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static void check_expr_is_bit_index (expressionS);
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#define Bit(e) check_expr_is_bit_index (e);
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@ -500,16 +504,16 @@ statement :
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/* ---------------------------------------------------------------------- */
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| MULHU
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| MULHU { ISA_G14 ("MULHU"); }
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{ B3 (0xce, 0xfb, 0x01); }
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| MULH
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| MULH { ISA_G14 ("MULHU"); }
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{ B3 (0xce, 0xfb, 0x02); }
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| MULU X
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| MULU X { ISA_G14 ("MULHU"); }
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{ B1 (0xd6); }
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| DIVHU
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| DIVHU { ISA_G14 ("MULHU"); }
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{ B3 (0xce, 0xfb, 0x03); }
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/* Note that the DIVWU encoding was changed from [0xce,0xfb,0x04] to
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@ -517,13 +521,13 @@ statement :
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with the same version number, but varying encodings. The version
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here matches the hardware. */
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| DIVWU
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| DIVWU { ISA_G14 ("MULHU"); }
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{ B3 (0xce, 0xfb, 0x0b); }
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| MACHU
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| MACHU { ISA_G14 ("MULHU"); }
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{ B3 (0xce, 0xfb, 0x05); }
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| MACH
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| MACH { ISA_G14 ("MULHU"); }
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{ B3 (0xce, 0xfb, 0x06); }
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/* ---------------------------------------------------------------------- */
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@ -339,6 +339,24 @@ md_parse_option (int c, char * arg ATTRIBUTE_UNUSED)
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return 0;
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}
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int
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rl78_isa_g10 (void)
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{
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return (elf_flags & E_FLAG_RL78_CPU_MASK) == E_FLAG_RL78_G10;
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}
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int
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rl78_isa_g13 (void)
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{
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return (elf_flags & E_FLAG_RL78_CPU_MASK) == E_FLAG_RL78_G13;
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}
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int
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rl78_isa_g14 (void)
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{
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return (elf_flags & E_FLAG_RL78_CPU_MASK) == E_FLAG_RL78_G14;
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}
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void
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md_show_usage (FILE * stream)
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{
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@ -1,3 +1,8 @@
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2015-04-30 DJ Delorie <dj@redhat.com>
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* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
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rl78_decode_opcode
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2015-04-29 Doug Evans <dje@google.com>
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PR python/18285
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@ -921,7 +921,7 @@ rl78_analyze_prologue (CORE_ADDR start_pc,
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opcode_handle.pc = pc;
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bytes_read = rl78_decode_opcode (pc, &opc, rl78_get_opcode_byte,
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&opcode_handle);
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&opcode_handle, RL78_ISA_DEFAULT);
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next_pc = pc + bytes_read;
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if (opc.id == RLO_sel)
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@ -1,3 +1,10 @@
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2015-04-30 DJ Delorie <dj@redhat.com>
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* dis-asm.h (print_insn_rl78_g10): New.
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(print_insn_rl78_g13): New.
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(print_insn_rl78_g14): New.
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(rl78_get_disassembler): New.
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2015-04-17 Richard Earnshaw <rearnsha@arm.com>
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Merge from gcc:
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@ -307,9 +307,13 @@ extern int print_insn_z8001 (bfd_vma, disassemble_info *);
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extern int print_insn_z8002 (bfd_vma, disassemble_info *);
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extern int print_insn_rx (bfd_vma, disassemble_info *);
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extern int print_insn_rl78 (bfd_vma, disassemble_info *);
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extern int print_insn_rl78_g10 (bfd_vma, disassemble_info *);
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extern int print_insn_rl78_g13 (bfd_vma, disassemble_info *);
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extern int print_insn_rl78_g14 (bfd_vma, disassemble_info *);
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extern disassembler_ftype arc_get_disassembler (void *);
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extern disassembler_ftype cris_get_disassembler (bfd *);
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extern disassembler_ftype rl78_get_disassembler (bfd *);
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extern void print_aarch64_disassembler_options (FILE *);
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extern void print_i386_disassembler_options (FILE *);
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@ -1,3 +1,8 @@
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2015-04-30 DJ Delorie <dj@redhat.com>
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* rl78.h (RL78_Dis_Isa): New.
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(rl78_decode_opcode): Add ISA parameter.
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2015-03-24 Terry Guo <terry.guo@arm.com>
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* arm.h (arm_feature_set): Extended to provide more available bits.
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@ -30,6 +30,13 @@
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extern "C" {
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#endif
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typedef enum {
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RL78_ISA_DEFAULT,
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RL78_ISA_G10,
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RL78_ISA_G13,
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RL78_ISA_G14,
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} RL78_Dis_Isa;
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/* For the purposes of these structures, the RL78 registers are as
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follows, despite most of these being memory-mapped and
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bank-switched: */
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RL78_Opcode_Operand op[2];
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} RL78_Opcode_Decoded;
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int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *);
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int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *, RL78_Dis_Isa);
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#ifdef __cplusplus
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}
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@ -1,3 +1,18 @@
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2015-04-30 DJ Delorie <dj@redhat.com>
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* disassemble.c (disassembler): Choose suitable disassembler based
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on E_ABI.
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* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter. Use
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it to decode mul/div insns.
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* rl78-decode.c: Regenerate.
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* rl78-dis.c (print_insn_rl78): Rename to...
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(print_insn_rl78_common): ...this, take ISA parameter.
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(print_insn_rl78): New.
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(print_insn_rl78_g10): New.
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(print_insn_rl78_g13): New.
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(print_insn_rl78_g14): New.
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(rl78_get_disassembler): New.
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2015-04-29 Nick Clifton <nickc@redhat.com>
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* po/fr.po: Updated French translation.
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@ -385,7 +385,7 @@ disassembler (abfd)
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#endif
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#ifdef ARCH_rl78
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case bfd_arch_rl78:
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disassemble = print_insn_rl78;
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disassemble = rl78_get_disassembler (abfd);
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break;
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#endif
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#ifdef ARCH_rx
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File diff suppressed because it is too large
Load Diff
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rl78_decode_opcode (unsigned long pc AU,
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RL78_Opcode_Decoded * rl78,
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int (* getbyte)(void *),
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void * ptr)
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void * ptr,
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RL78_Dis_Isa isa)
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{
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LocalData lds, * ld = &lds;
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unsigned char op_buf[20] = {0};
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op0 = SFR;
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op1 = IMMU(1);
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ID(mov); DM(None, op0); SC(op1);
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if (op0 == 0xffffb)
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if (op0 == 0xffffb && isa == RL78_ISA_G14)
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switch (op1)
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{
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case 0x01:
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/*----------------------------------------------------------------------*/
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/** 1101 0110 mulu x */
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ID(mulu);
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if (isa == RL78_ISA_G14)
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ID(mulu);
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/*----------------------------------------------------------------------*/
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#include <stdio.h>
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#include "bfd.h"
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#include "elf-bfd.h"
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#include "dis-asm.h"
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#include "opcode/rl78.h"
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#include "elf/rl78.h"
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#define DEBUG_SEMANTICS 0
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}
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}
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int
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print_insn_rl78 (bfd_vma addr, disassemble_info * dis)
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static int
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print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
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{
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int rv;
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RL78_Data rl78_data;
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rl78_data.pc = addr;
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rl78_data.dis = dis;
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rv = rl78_decode_opcode (addr, &opcode, rl78_get_byte, &rl78_data);
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rv = rl78_decode_opcode (addr, &opcode, rl78_get_byte, &rl78_data, isa);
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dis->bytes_per_line = 10;
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return rv;
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}
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int
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print_insn_rl78 (bfd_vma addr, disassemble_info * dis)
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{
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return print_insn_rl78_common (addr, dis, RL78_ISA_DEFAULT);
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}
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int
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print_insn_rl78_g10 (bfd_vma addr, disassemble_info * dis)
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{
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return print_insn_rl78_common (addr, dis, RL78_ISA_G10);
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}
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int
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print_insn_rl78_g13 (bfd_vma addr, disassemble_info * dis)
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{
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return print_insn_rl78_common (addr, dis, RL78_ISA_G13);
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}
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int
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print_insn_rl78_g14 (bfd_vma addr, disassemble_info * dis)
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{
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return print_insn_rl78_common (addr, dis, RL78_ISA_G14);
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}
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disassembler_ftype
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rl78_get_disassembler (bfd *abfd)
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{
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int cpu = abfd->tdata.elf_obj_data->elf_header->e_flags & E_FLAG_RL78_CPU_MASK;
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switch (cpu)
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{
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case E_FLAG_RL78_G10:
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return print_insn_rl78_g10;
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case E_FLAG_RL78_G13:
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return print_insn_rl78_g13;
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case E_FLAG_RL78_G14:
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return print_insn_rl78_g14;
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default:
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return print_insn_rl78;
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}
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}
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@ -1,3 +1,14 @@
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2015-04-30 DJ Delorie <dj@redhat.com>
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* cpu.c (g14_multiply): New.
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* cpu.h (g14_multiply): New.
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* load.c (rl78_load): Decode ISA completely.
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* main.c (main): Expand -M to include other ISAs.
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* rl78.c (decode_opcode): Decode based on ISA.
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* trace.c (rl78_disasm_fn): New.
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(sim_disasm_init): Reset it.
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(sim_disasm_one): Get correct disassembler for ISA.
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2015-04-13 Mike Frysinger <vapier@gentoo.org>
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* configure: Regenerate.
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int timer_enabled = 2;
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int rl78_g10_mode = 0;
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int g13_multiply = 0;
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int g14_multiply = 0;
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#define REGISTER_ADDRESS 0xffee0
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extern int rl78_g10_mode;
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extern int g13_multiply;
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extern int g14_multiply;
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#endif
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@ -86,6 +86,37 @@ sim_open (SIM_OPEN_KIND kind,
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sim_disasm_init (abfd);
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open = 1;
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while (argv != NULL && *argv != NULL)
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{
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if (strcmp (*argv, "g10") == 0 || strcmp (*argv, "-Mg10") == 0)
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{
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fprintf (stderr, "rl78 g10 support enabled.\n");
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rl78_g10_mode = 1;
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g13_multiply = 0;
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g14_multiply = 0;
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mem_set_mirror (0, 0xf8000, 4096);
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break;
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}
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if (strcmp (*argv, "g13") == 0 || strcmp (*argv, "-Mg13") == 0)
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{
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fprintf (stderr, "rl78 g13 support enabled.\n");
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rl78_g10_mode = 0;
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g13_multiply = 1;
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g14_multiply = 0;
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break;
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}
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if (strcmp (*argv, "g14") == 0 || strcmp (*argv, "-Mg14") == 0)
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{
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fprintf (stderr, "rl78 g14 support enabled.\n");
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rl78_g10_mode = 0;
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g13_multiply = 0;
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g14_multiply = 1;
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break;
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}
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argv++;
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}
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return &the_minisim;
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}
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@ -92,13 +92,26 @@ rl78_load (bfd *prog, host_callback *callbacks, const char * const simname)
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return;
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}
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rl78_g10_mode = 0;
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switch (elf_elfheader (prog)->e_flags & E_FLAG_RL78_CPU_MASK)
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{
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case E_FLAG_RL78_G10: rl78_g10_mode = 1; break;
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case E_FLAG_RL78_G13: g13_multiply = 1; break;
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case E_FLAG_RL78_G10:
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rl78_g10_mode = 1;
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g13_multiply = 0;
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g14_multiply = 0;
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mem_set_mirror (0, 0xf8000, 4096);
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break;
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case E_FLAG_RL78_G13:
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rl78_g10_mode = 0;
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g13_multiply = 1;
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g14_multiply = 0;
|
||||
break;
|
||||
case E_FLAG_RL78_G14:
|
||||
rl78_g10_mode = 0;
|
||||
g13_multiply = 0;
|
||||
g14_multiply = 1;
|
||||
break;
|
||||
default:
|
||||
/* Keep whatever was manually specified. */
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
@ -68,7 +68,7 @@ main (int argc, char **argv)
|
|||
|
||||
xmalloc_set_program_name (argv[0]);
|
||||
|
||||
while ((o = getopt (argc, argv, "tvdr:D:")) != -1)
|
||||
while ((o = getopt (argc, argv, "tvdr:D:M:")) != -1)
|
||||
{
|
||||
switch (o)
|
||||
{
|
||||
|
@ -87,6 +87,27 @@ main (int argc, char **argv)
|
|||
case 'D':
|
||||
dump_counts_filename = optarg;
|
||||
break;
|
||||
case 'M':
|
||||
if (strcmp (optarg, "g10") == 0)
|
||||
{
|
||||
rl78_g10_mode = 1;
|
||||
g13_multiply = 0;
|
||||
g14_multiply = 0;
|
||||
mem_set_mirror (0, 0xf8000, 4096);
|
||||
}
|
||||
if (strcmp (optarg, "g13") == 0)
|
||||
{
|
||||
rl78_g10_mode = 0;
|
||||
g13_multiply = 1;
|
||||
g14_multiply = 0;
|
||||
}
|
||||
if (strcmp (optarg, "g14") == 0)
|
||||
{
|
||||
rl78_g10_mode = 0;
|
||||
g13_multiply = 0;
|
||||
g14_multiply = 1;
|
||||
}
|
||||
break;
|
||||
case '?':
|
||||
{
|
||||
fprintf (stderr,
|
||||
|
@ -96,6 +117,7 @@ main (int argc, char **argv)
|
|||
"\t-t\t\t- trace.\n"
|
||||
"\t-d\t\t- disassemble.\n"
|
||||
"\t-r <bytes>\t- ram size.\n"
|
||||
"\t-M <mcu>\t- mcu type, default none, allowed: g10,g13,g14\n"
|
||||
"\t-D <filename>\t- dump cycle count histogram\n");
|
||||
exit (1);
|
||||
}
|
||||
|
|
|
@ -63,6 +63,18 @@ mem_rom_size (int rom_bytes)
|
|||
rom_limit = rom_bytes;
|
||||
}
|
||||
|
||||
int mirror_rom_base = 0x01000;
|
||||
int mirror_ram_base = 0xf1000;
|
||||
int mirror_length = 0x7000;
|
||||
|
||||
void
|
||||
mem_set_mirror (int rom_base, int ram_base, int length)
|
||||
{
|
||||
mirror_rom_base = rom_base;
|
||||
mirror_ram_base = ram_base;
|
||||
mirror_length = length;
|
||||
}
|
||||
|
||||
/* ---------------------------------------------------------------------- */
|
||||
/* Note: the RL78 memory map has a few surprises. For starters, part
|
||||
of the first 64k is mapped to the last 64k, depending on an SFR bit
|
||||
|
@ -92,13 +104,11 @@ static int
|
|||
address_mapping (int address)
|
||||
{
|
||||
address &= MASK;
|
||||
if (address >= 0xf1000 && address < ram_base)
|
||||
if (address >= mirror_ram_base && address < mirror_ram_base + mirror_length)
|
||||
{
|
||||
address &= 0xffff;
|
||||
tprintf ("&");
|
||||
address = address - mirror_ram_base + mirror_rom_base;
|
||||
if (memory[RL78_SFR_PMC] & 1)
|
||||
{
|
||||
tprintf ("|");
|
||||
address |= 0x10000;
|
||||
}
|
||||
last_addr_was_mirror = 1;
|
||||
|
|
|
@ -421,10 +421,16 @@ decode_opcode (void)
|
|||
int a, b, v, v2;
|
||||
unsigned int u, u2;
|
||||
int obits;
|
||||
RL78_Dis_Isa isa;
|
||||
|
||||
isa = (rl78_g10_mode ? RL78_ISA_G10
|
||||
: g14_multiply ? RL78_ISA_G14
|
||||
: g13_multiply ? RL78_ISA_G13
|
||||
: RL78_ISA_DEFAULT);
|
||||
|
||||
rl78_data.dpc = pc;
|
||||
opcode_size = rl78_decode_opcode (pc, &opcode,
|
||||
rl78_get_byte, &rl78_data);
|
||||
rl78_get_byte, &rl78_data, isa);
|
||||
|
||||
opcode_pc = pc;
|
||||
pc += opcode_size;
|
||||
|
@ -851,7 +857,7 @@ decode_opcode (void)
|
|||
|
||||
rl78_data.dpc = pc;
|
||||
opcode_size = rl78_decode_opcode (pc, &opcode,
|
||||
rl78_get_byte, &rl78_data);
|
||||
rl78_get_byte, &rl78_data, isa);
|
||||
pc += opcode_size;
|
||||
tprintf (" skipped: %s\n", opcode.syntax);
|
||||
break;
|
||||
|
|
|
@ -37,6 +37,8 @@
|
|||
#include "mem.h"
|
||||
#include "load.h"
|
||||
|
||||
static disassembler_ftype rl78_disasm_fn = NULL;
|
||||
|
||||
static int
|
||||
sim_dis_read (bfd_vma memaddr, bfd_byte * ptr, unsigned int length,
|
||||
struct disassemble_info *info)
|
||||
|
@ -111,6 +113,7 @@ void
|
|||
sim_disasm_init (bfd *prog)
|
||||
{
|
||||
current_bfd = prog;
|
||||
rl78_disasm_fn = NULL;
|
||||
}
|
||||
|
||||
typedef struct Files
|
||||
|
@ -256,6 +259,18 @@ sim_disasm_one (void)
|
|||
|
||||
trace = 0;
|
||||
|
||||
if (!rl78_disasm_fn)
|
||||
{
|
||||
if (rl78_g10_mode)
|
||||
rl78_disasm_fn = print_insn_rl78_g10;
|
||||
else if (g14_multiply)
|
||||
rl78_disasm_fn = print_insn_rl78_g14;
|
||||
else if (g13_multiply)
|
||||
rl78_disasm_fn = print_insn_rl78_g13;
|
||||
else
|
||||
rl78_disasm_fn = print_insn_rl78;
|
||||
}
|
||||
|
||||
if (filename && functionname && lineno)
|
||||
{
|
||||
if (lineno != prev_lineno || strcmp (prev_filename, filename))
|
||||
|
@ -323,7 +338,7 @@ sim_disasm_one (void)
|
|||
printf ("\033[33m %08llx %06x: ", total_clocks, mypc);
|
||||
#endif
|
||||
|
||||
max = print_insn_rl78 (mypc, & info);
|
||||
max = rl78_disasm_fn (mypc, & info);
|
||||
|
||||
for (i = 0; i < max; i ++)
|
||||
printf ("%02x", mem_get_qi (mypc + i));
|
||||
|
|
Loading…
Reference in New Issue