RISC-V: Fix relocation failure with zero address sections.
bfd/ * elfnn-riscv.c (_bfd_riscv_relax_section): Ifdef out check to ignore symbols whose section address is zero.
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2018-02-15 Jim Wilson <jimw@sifive.com>
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* elfnn-riscv.c (_bfd_riscv_relax_section): Ifdef out check to ignore
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symbols whose section address is zero.
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* elfnn-riscv.c (riscv_elf_relocate_section): Use bfd_reloc_dangerous
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when pcrel_lo reloc has an addend. Use reloc_dangerous callback for
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bfd_reloc_dangerous. Use einfo instead of warning callback for errors.
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@ -3399,8 +3399,14 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec,
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{
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BFD_ASSERT (isym->st_shndx < elf_numsections (abfd));
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sym_sec = elf_elfsections (abfd)[isym->st_shndx]->bfd_section;
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#if 0
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/* The purpose of this code is unknown. It breaks linker scripts
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for embedded development that place sections at address zero.
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This code is believed to be unnecessary. Disabling it but not
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yet removing it, in case something breaks. */
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if (sec_addr (sym_sec) == 0)
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continue;
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#endif
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symval = sec_addr (sym_sec) + isym->st_value;
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}
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}
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