RISC-V: Fix relocation failure with zero address sections.

bfd/
	* elfnn-riscv.c (_bfd_riscv_relax_section): Ifdef out check to ignore
	symbols whose section address is zero.
This commit is contained in:
Jim Wilson 2018-02-15 13:48:38 -08:00
parent 2a0d985349
commit 09ca4b9d9b
2 changed files with 9 additions and 0 deletions

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@ -1,5 +1,8 @@
2018-02-15 Jim Wilson <jimw@sifive.com>
* elfnn-riscv.c (_bfd_riscv_relax_section): Ifdef out check to ignore
symbols whose section address is zero.
* elfnn-riscv.c (riscv_elf_relocate_section): Use bfd_reloc_dangerous
when pcrel_lo reloc has an addend. Use reloc_dangerous callback for
bfd_reloc_dangerous. Use einfo instead of warning callback for errors.

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@ -3399,8 +3399,14 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec,
{
BFD_ASSERT (isym->st_shndx < elf_numsections (abfd));
sym_sec = elf_elfsections (abfd)[isym->st_shndx]->bfd_section;
#if 0
/* The purpose of this code is unknown. It breaks linker scripts
for embedded development that place sections at address zero.
This code is believed to be unnecessary. Disabling it but not
yet removing it, in case something breaks. */
if (sec_addr (sym_sec) == 0)
continue;
#endif
symval = sec_addr (sym_sec) + isym->st_value;
}
}