* gas/cris/addi.d: Tweak for 64-bit BFD.
* gas/cris/binop-cmpmove.d, gas/cris/binop-cmpmovx.d, gas/cris/binop-extx.d, gas/cris/binop.d, gas/cris/bork.d, gas/cris/branch.d, gas/cris/break.d, gas/cris/brokw-1.d, gas/cris/brokw-2.d, gas/cris/brokw-3.d, gas/cris/ccr.d, gas/cris/clear.d, gas/cris/continue.d, gas/cris/fragtest.d, gas/cris/jump-type.d, gas/cris/labfloat.d, gas/cris/macroat.d, gas/cris/movem-to-reg.d, gas/cris/nosep.d, gas/cris/oneop-type.d, gas/cris/prefix.d, gas/cris/pushpop-byte-sreg.d, gas/cris/pushpop-dword-sreg.d, gas/cris/pushpop-word-sreg.d, gas/cris/pushpop.d, gas/cris/quick-s6.d, gas/cris/quick-u5.d, gas/cris/quick-u6.d, gas/cris/range-err-1.s, gas/cris/rd-pic-1.d, gas/cris/rd-regprefix-1.d, gas/cris/rd-regprefix-1b.d, gas/cris/reg-to-mem.d, gas/cris/regreg.d, gas/cris/return.d, gas/cris/scc.d, gas/cris/separator.d, gas/cris/shexpr-1.d, gas/cris/sreg-to-x.d, gas/cris/test.d, gas/cris/unimplemented.d, gas/cris/unop-mem.d, gas/cris/x-to-byte-sreg.d, gas/cris/x-to-dcr1-sreg.d, gas/cris/x-to-dword-sreg.d, gas/cris/x-to-word-sreg.d: Ditto. * gas/cris/shexpr-1.d: Ditto. Correct format.
This commit is contained in:
Hans-Peter Nilsson
parent
54d3cad90d
commit
0b171357e6
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@ -1,3 +1,26 @@
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2001-05-27 Hans-Peter Nilsson <hp@axis.com>
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* gas/cris/addi.d: Tweak for 64-bit BFD.
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* gas/cris/binop-cmpmove.d, gas/cris/binop-cmpmovx.d,
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gas/cris/binop-extx.d, gas/cris/binop.d, gas/cris/bork.d,
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gas/cris/branch.d, gas/cris/break.d, gas/cris/brokw-1.d,
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gas/cris/brokw-2.d, gas/cris/brokw-3.d, gas/cris/ccr.d,
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gas/cris/clear.d, gas/cris/continue.d, gas/cris/fragtest.d,
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gas/cris/jump-type.d, gas/cris/labfloat.d, gas/cris/macroat.d,
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gas/cris/movem-to-reg.d, gas/cris/nosep.d, gas/cris/oneop-type.d,
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gas/cris/prefix.d, gas/cris/pushpop-byte-sreg.d,
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gas/cris/pushpop-dword-sreg.d, gas/cris/pushpop-word-sreg.d,
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gas/cris/pushpop.d, gas/cris/quick-s6.d, gas/cris/quick-u5.d,
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gas/cris/quick-u6.d, gas/cris/range-err-1.s, gas/cris/rd-pic-1.d,
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gas/cris/rd-regprefix-1.d, gas/cris/rd-regprefix-1b.d,
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gas/cris/reg-to-mem.d, gas/cris/regreg.d, gas/cris/return.d,
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gas/cris/scc.d, gas/cris/separator.d, gas/cris/shexpr-1.d,
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gas/cris/sreg-to-x.d, gas/cris/test.d, gas/cris/unimplemented.d,
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gas/cris/unop-mem.d, gas/cris/x-to-byte-sreg.d,
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gas/cris/x-to-dcr1-sreg.d, gas/cris/x-to-dword-sreg.d,
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gas/cris/x-to-word-sreg.d: Ditto.
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* gas/cris/shexpr-1.d: Ditto. Correct format.
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2001-05-25 H.J. Lu <hjl@gnu.org>
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* gas/mips/e32el-rel2.d: New for little endian mips.
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@ -4,7 +4,7 @@
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.*: file format .*-cris
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Disassembly of section \.text:
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00000000 <start>:
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0+ <start>:
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[ ]+0:[ ]+0105[ ]+addi[ ]+r0.b,r1
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[ ]+2:[ ]+1105[ ]+addi[ ]+r0.w,r1
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[ ]+4:[ ]+2105[ ]+addi[ ]+r0.d,r1
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|
|
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@ -6,11 +6,11 @@
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.*: file format .*-cris
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Disassembly of section \.text:
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00000000 <notstart>:
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0+ <notstart>:
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0: 0000[ ]+ bcc ( 0x2|\.\+2)
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\.\.\.
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00000004 <start>:
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0+4 <start>:
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[ ]+4:[ ]+@IR+4356@[ ]+@OC@\.b r3,r5
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[ ]+6:[ ]+@IR+55d6@[ ]+@OC@\.w r5,r13
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[ ]+8:[ ]+@IR+6a16@[ ]+@OC@\.d r10,r1
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@ -77,8 +77,8 @@ Disassembly of section \.text:
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|||
[ ]+fc:[ ]+@IM+6f1e@ 9822 0000[ ]+@OC@\.d (0x2298|2298 <end\+0x1b20>),r1
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||||
[ ]+102:[ ]+@IM+6f1e@ ac72 2a00[ ]+@OC@\.d (0x2a72ac|2a72ac <two701867\+0x13881>),r1
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||||
[ ]+108:[ ]+@IM+6f1e@ d5c5 d6ff[ ]+@OC@\.d 0xffd6c5d5,r1
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||||
[ ]+10e:[ ]+@IM+6f1e@ acce c09e[ ]+@OC@\.d (0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>),r1
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[ ]+114:[ ]+@IM+6f1e@ 5331 3f81[ ]+@OC@\.d (0x813f3153|813f3153 <const_int_m32\+0x52a6819e>),r1
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[ ]+10e:[ ]+@IM+6f1e@ acce c09e[ ]+@OC@\.d [^,]+,r1
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[ ]+114:[ ]+@IM+6f1e@ 5331 3f81[ ]+@OC@\.d [^,]+,r1
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[ ]+11a:[ ]+@IM+6f1e@ b5af 982e[ ]+@OC@\.d (0x2e98afb5|2e98afb5 <const_int_m32>),r1
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[ ]+120:[ ]+@IM+6f1e@ 2b45 941b[ ]+@OC@\.d (0x1b94452b|1b94452b <const_int_32>),r1
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[ ]+126:[ ]+@IM+6fde@ 2a00 0000[ ]+@OC@\.d (0x2a|2a <start\+0x26>),r13
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@ -184,10 +184,10 @@ Disassembly of section \.text:
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[ ]+2f4:[ ]+6f2d 0180 0000 @IM+5dda@[ ]+@OC@\.w \[r2\+(32769|8001 <three2767\+0x2>)\],r13
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||||
[ ]+2fc:[ ]+5f2d 0180 @IM+5dda@[ ]+@OC@\.w \[r2-32767\],r13
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||||
[ ]+302:[ ]+5f2d 0080 @IM+5dda@[ ]+@OC@\.w \[r2-32768\],r13
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||||
[ ]+308:[ ]+6f2d ff7f ffff @IM+555a@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
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[ ]+308:[ ]+6f2d ff7f ffff @IM+555a@[ ]+@OC@\.w \[r2\+[^]]+\],r5
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||||
[ ]+310:[ ]+5f2d 0180 @IM+5dda@[ ]+@OC@\.w \[r2-32767\],r13
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||||
[ ]+316:[ ]+5f2d 0080 @IM+5dda@[ ]+@OC@\.w \[r2-32768\],r13
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||||
[ ]+31c:[ ]+6f2d ff7f ffff @IM+555a@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
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[ ]+31c:[ ]+6f2d ff7f ffff @IM+555a@[ ]+@OC@\.w \[r2\+[^]]+\],r5
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||||
[ ]+324:[ ]+6f2d ffff 0000 @IM+555a@[ ]+@OC@\.w \[r2\+(65535|ffff <six5535>)\],r5
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||||
[ ]+32c:[ ]+6f2d 0000 0000 @IM+555a@[ ]+@OC@\.w \[r2\+0( <notstart>)?\],r5
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[ ]+32e:[ ]+(R_CRIS_)?32[ ]+externalsym
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@ -211,10 +211,10 @@ Disassembly of section \.text:
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|||
[ ]+388:[ ]+5f2d 68dd @IM+611a@[ ]+@OC@\.d \[r2-8856\],r1
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||||
[ ]+38e:[ ]+5f2d 9822 @IM+611a@[ ]+@OC@\.d \[r2\+8856\],r1
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||||
[ ]+394:[ ]+6f2d ac72 2a00 @IM+611a@[ ]+@OC@\.d \[r2\+(2781868|2a72ac <two701867\+0x13881>)\],r1
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[ ]+39c:[ ]+6f2d d5c5 d6ff @IM+611a@[ ]+@OC@\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r1
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[ ]+3a4:[ ]+6f2d acce c09e @IM+611a@[ ]+@OC@\.d \[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\],r1
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[ ]+3ac:[ ]+6f2d 5331 3f81 @IM+611a@[ ]+@OC@\.d \[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
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||||
[ ]+3b4:[ ]+6f2d 5331 3f81 @IM+611a@[ ]+@OC@\.d \[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
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||||
[ ]+39c:[ ]+6f2d d5c5 d6ff @IM+611a@[ ]+@OC@\.d \[r2\+[^]]+\],r1
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||||
[ ]+3a4:[ ]+6f2d acce c09e @IM+611a@[ ]+@OC@\.d \[r2\+[^]]+\],r1
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||||
[ ]+3ac:[ ]+6f2d 5331 3f81 @IM+611a@[ ]+@OC@\.d \[r2\+[^]]+\],r1
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||||
[ ]+3b4:[ ]+6f2d 5331 3f81 @IM+611a@[ ]+@OC@\.d \[r2\+[^]]+\],r1
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||||
[ ]+3bc:[ ]+6f2d b5af 982e @IM+611a@[ ]+@OC@\.d \[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\],r1
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||||
[ ]+3c4:[ ]+6f2d 2b45 941b @IM+611a@[ ]+@OC@\.d \[r2\+(0x1b94452b|1b94452b <const_int_32>)\],r1
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[ ]+3cc:[ ]+2a21 @IM+6dda@[ ]+@OC@\.d \[r2\+42\],r13
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@ -231,15 +231,15 @@ Disassembly of section \.text:
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|||
[ ]+3fe:[ ]+6f2d 0180 0000 @IM+655a@[ ]+@OC@\.d \[r2\+(32769|8001 <three2767\+0x2>)\],r5
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||||
[ ]+406:[ ]+5f2d 0180 @IM+655a@[ ]+@OC@\.d \[r2-32767\],r5
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||||
[ ]+40c:[ ]+5f2d 0080 @IM+6dda@[ ]+@OC@\.d \[r2-32768\],r13
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||||
[ ]+412:[ ]+6f2d ff7f ffff @IM+6dda@[ ]+@OC@\.d \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
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||||
[ ]+412:[ ]+6f2d ff7f ffff @IM+6dda@[ ]+@OC@\.d \[r2\+[^]]+\],r13
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||||
[ ]+41a:[ ]+5f2d 0180 @IM+655a@[ ]+@OC@\.d \[r2-32767\],r5
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||||
[ ]+420:[ ]+5f2d 0080 @IM+6dda@[ ]+@OC@\.d \[r2-32768\],r13
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||||
[ ]+426:[ ]+6f2d ff7f ffff @IM+6dda@[ ]+@OC@\.d \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
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||||
[ ]+426:[ ]+6f2d ff7f ffff @IM+6dda@[ ]+@OC@\.d \[r2\+[^]]+\],r13
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||||
[ ]+42e:[ ]+6f2d ffff 0000 @IM+655a@[ ]+@OC@\.d \[r2\+(65535|ffff <six5535>)\],r5
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||||
[ ]+436:[ ]+6f2d 0000 0100 @IM+6dda@[ ]+@OC@\.d \[r2\+(65536|10000 <six5535\+0x1>)\],r13
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||||
[ ]+43e:[ ]+6f2d 2b3a 2900 @IM+655a@[ ]+@OC@\.d \[r2\+(2701867|293a2b <two701867>)\],r5
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||||
[ ]+446:[ ]+6f2d d5c5 d6ff @IM+655a@[ ]+@OC@\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
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||||
[ ]+44e:[ ]+6f2d d5c5 d6ff @IM+655a@[ ]+@OC@\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
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||||
[ ]+446:[ ]+6f2d d5c5 d6ff @IM+655a@[ ]+@OC@\.d \[r2\+[^]]+\],r5
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||||
[ ]+44e:[ ]+6f2d d5c5 d6ff @IM+655a@[ ]+@OC@\.d \[r2\+[^]]+\],r5
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||||
[ ]+456:[ ]+6f2d 0000 0000 @IM+655a@[ ]+@OC@\.d \[r2\+0( <notstart>)?\],r5
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||||
[ ]+458:[ ]+(R_CRIS_)?32[ ]+externalsym
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||||
[ ]+45e:[ ]+4205 @IM+4c5e@[ ]+@OC@.b \[r12=r2\+r0.b\],r5
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@ -327,10 +327,10 @@ Disassembly of section \.text:
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|||
[ ]+5c6:[ ]+6f2d 0180 0000 @IM+5cde@[ ]+@OC@.w \[r12=r2\+(32769|8001 <three2767\+0x2>)\],r13
|
||||
[ ]+5ce:[ ]+5f2d 0180 @IM+5cde@[ ]+@OC@.w \[r12=r2-32767\],r13
|
||||
[ ]+5d4:[ ]+5f2d 0080 @IM+5cde@[ ]+@OC@.w \[r12=r2-32768\],r13
|
||||
[ ]+5da:[ ]+6f2d ff7f ffff @IM+5c5e@[ ]+@OC@.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+5da:[ ]+6f2d ff7f ffff @IM+5c5e@[ ]+@OC@.w \[r12=r2\+[^]]+\],r5
|
||||
[ ]+5e2:[ ]+5f2d 0180 @IM+5cde@[ ]+@OC@.w \[r12=r2-32767\],r13
|
||||
[ ]+5e8:[ ]+5f2d 0080 @IM+5cde@[ ]+@OC@.w \[r12=r2-32768\],r13
|
||||
[ ]+5ee:[ ]+6f2d ff7f ffff @IM+5c5e@[ ]+@OC@.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
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||||
[ ]+5ee:[ ]+6f2d ff7f ffff @IM+5c5e@[ ]+@OC@.w \[r12=r2\+[^]]+\],r5
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||||
[ ]+5f6:[ ]+6f2d ffff 0000 @IM+5c5e@[ ]+@OC@.w \[r12=r2\+(65535|ffff <six5535>)\],r5
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||||
[ ]+5fe:[ ]+6f2d 0000 0000 @IM+5c5e@[ ]+@OC@.w \[r12=r2\+0( <notstart>)?\],r5
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||||
[ ]+600:[ ]+(R_CRIS_)?32[ ]+externalsym
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@ -354,10 +354,10 @@ Disassembly of section \.text:
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|||
[ ]+65a:[ ]+5f2d 68dd @IM+6c1e@[ ]+@OC@.d \[r12=r2-8856\],r1
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||||
[ ]+660:[ ]+5f2d 9822 @IM+6c1e@[ ]+@OC@.d \[r12=r2\+8856\],r1
|
||||
[ ]+666:[ ]+6f2d ac72 2a00 @IM+6c1e@[ ]+@OC@.d \[r12=r2\+(2781868|2a72ac <two701867\+0x13881>)\],r1
|
||||
[ ]+66e:[ ]+6f2d d5c5 d6ff @IM+6c1e@[ ]+@OC@.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r1
|
||||
[ ]+676:[ ]+6f2d acce c09e @IM+6c1e@[ ]+@OC@.d \[r12=r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\],r1
|
||||
[ ]+67e:[ ]+6f2d 5331 3f81 @IM+6c1e@[ ]+@OC@.d \[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
|
||||
[ ]+686:[ ]+6f2d 5331 3f81 @IM+6c1e@[ ]+@OC@.d \[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
|
||||
[ ]+66e:[ ]+6f2d d5c5 d6ff @IM+6c1e@[ ]+@OC@.d \[r12=r2\+[^]]+\],r1
|
||||
[ ]+676:[ ]+6f2d acce c09e @IM+6c1e@[ ]+@OC@.d \[r12=r2\+[^]]+\],r1
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||||
[ ]+67e:[ ]+6f2d 5331 3f81 @IM+6c1e@[ ]+@OC@.d \[r12=r2\+[^]]+\],r1
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||||
[ ]+686:[ ]+6f2d 5331 3f81 @IM+6c1e@[ ]+@OC@.d \[r12=r2\+[^]]+\],r1
|
||||
[ ]+68e:[ ]+6f2d b5af 982e @IM+6c1e@[ ]+@OC@.d \[r12=r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\],r1
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[ ]+696:[ ]+6f2d 2b45 941b @IM+6c1e@[ ]+@OC@.d \[r12=r2\+(0x1b94452b|1b94452b <const_int_32>)\],r1
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[ ]+69e:[ ]+2a21 @IM+6cde@[ ]+@OC@.d \[r12=r2\+42\],r13
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@ -374,15 +374,15 @@ Disassembly of section \.text:
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|||
[ ]+6d0:[ ]+6f2d 0180 0000 @IM+6c5e@[ ]+@OC@.d \[r12=r2\+(32769|8001 <three2767\+0x2>)\],r5
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||||
[ ]+6d8:[ ]+5f2d 0180 @IM+6c5e@[ ]+@OC@.d \[r12=r2-32767\],r5
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||||
[ ]+6de:[ ]+5f2d 0080 @IM+6cde@[ ]+@OC@.d \[r12=r2-32768\],r13
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||||
[ ]+6e4:[ ]+6f2d ff7f ffff @IM+6cde@[ ]+@OC@.d \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
|
||||
[ ]+6e4:[ ]+6f2d ff7f ffff @IM+6cde@[ ]+@OC@.d \[r12=r2\+[^]]+\],r13
|
||||
[ ]+6ec:[ ]+5f2d 0180 @IM+6c5e@[ ]+@OC@.d \[r12=r2-32767\],r5
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||||
[ ]+6f2:[ ]+5f2d 0080 @IM+6cde@[ ]+@OC@.d \[r12=r2-32768\],r13
|
||||
[ ]+6f8:[ ]+6f2d ff7f ffff @IM+6cde@[ ]+@OC@.d \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
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||||
[ ]+6f8:[ ]+6f2d ff7f ffff @IM+6cde@[ ]+@OC@.d \[r12=r2\+[^]]+\],r13
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||||
[ ]+700:[ ]+6f2d ffff 0000 @IM+6c5e@[ ]+@OC@.d \[r12=r2\+(65535|ffff <six5535>)\],r5
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||||
[ ]+708:[ ]+6f2d 0000 0100 @IM+6cde@[ ]+@OC@.d \[r12=r2\+(65536|10000 <six5535\+0x1>)\],r13
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||||
[ ]+710:[ ]+6f2d 2b3a 2900 @IM+6c5e@[ ]+@OC@.d \[r12=r2\+(2701867|293a2b <two701867>)\],r5
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[ ]+718:[ ]+6f2d d5c5 d6ff @IM+6c5e@[ ]+@OC@.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
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||||
[ ]+720:[ ]+6f2d d5c5 d6ff @IM+6c5e@[ ]+@OC@.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
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||||
[ ]+718:[ ]+6f2d d5c5 d6ff @IM+6c5e@[ ]+@OC@.d \[r12=r2\+[^]]+\],r5
|
||||
[ ]+720:[ ]+6f2d d5c5 d6ff @IM+6c5e@[ ]+@OC@.d \[r12=r2\+[^]]+\],r5
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||||
[ ]+728:[ ]+6f2d 0000 0000 @IM+6c5e@[ ]+@OC@.d \[r12=r2\+0( <notstart>)?\],r5
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||||
[ ]+72a:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+730:[ ]+7309 @IM+455a@[ ]+@OC@.b \[\[r3\]\],r5
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@ -6,11 +6,11 @@
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.*: file format .*-cris
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Disassembly of section \.text:
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00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
0: 0000[ ]+ bcc ( 0x2|\.\+2)
|
||||
\.\.\.
|
||||
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+@IM+4058@[ ]+@OC@\.b \[r0\],r5
|
||||
[ ]+6:[ ]+@IM+55d8@[ ]+@OC@\.w \[r5\],r13
|
||||
[ ]+8:[ ]+@IM+405c@[ ]+@OC@\.b \[r0\+\],r5
|
||||
|
|
@ -131,10 +131,10 @@ Disassembly of section \.text:
|
|||
[ ]+1e8:[ ]+6f2d 0180 0000 @IM+5dd8@[ ]+@OC@\.w \[r2\+(32769|8001 <three2767\+0x2>)\],r13
|
||||
[ ]+1f0:[ ]+5f2d 0180 @IM+5dd8@[ ]+@OC@\.w \[r2-32767\],r13
|
||||
[ ]+1f6:[ ]+5f2d 0080 @IM+5dd8@[ ]+@OC@\.w \[r2-32768\],r13
|
||||
[ ]+1fc:[ ]+6f2d ff7f ffff @IM+5558@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+1fc:[ ]+6f2d ff7f ffff @IM+5558@[ ]+@OC@\.w \[r2\+[^]]+\],r5
|
||||
[ ]+204:[ ]+5f2d 0180 @IM+5dd8@[ ]+@OC@\.w \[r2-32767\],r13
|
||||
[ ]+20a:[ ]+5f2d 0080 @IM+5dd8@[ ]+@OC@\.w \[r2-32768\],r13
|
||||
[ ]+210:[ ]+6f2d ff7f ffff @IM+5558@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+210:[ ]+6f2d ff7f ffff @IM+5558@[ ]+@OC@\.w \[r2\+[^]]+\],r5
|
||||
[ ]+218:[ ]+6f2d ffff 0000 @IM+5558@[ ]+@OC@\.w \[r2\+(65535|ffff <six5535>)\],r5
|
||||
[ ]+220:[ ]+6f2d 0000 0000 @IM+5558@[ ]+@OC@\.w \[r2\+0( <notstart>)?\],r5
|
||||
[ ]+222:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -211,10 +211,10 @@ Disassembly of section \.text:
|
|||
[ ]+360:[ ]+6f2d 0180 0000 @IM+5cdc@[ ]+@OC@\.w \[r12=r2\+(32769|8001 <three2767\+0x2>)\],r13
|
||||
[ ]+368:[ ]+5f2d 0180 @IM+5cdc@[ ]+@OC@\.w \[r12=r2-32767\],r13
|
||||
[ ]+36e:[ ]+5f2d 0080 @IM+5cdc@[ ]+@OC@\.w \[r12=r2-32768\],r13
|
||||
[ ]+374:[ ]+6f2d ff7f ffff @IM+5c5c@[ ]+@OC@\.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+374:[ ]+6f2d ff7f ffff @IM+5c5c@[ ]+@OC@\.w \[r12=r2\+[^]]+\],r5
|
||||
[ ]+37c:[ ]+5f2d 0180 @IM+5cdc@[ ]+@OC@\.w \[r12=r2-32767\],r13
|
||||
[ ]+382:[ ]+5f2d 0080 @IM+5cdc@[ ]+@OC@\.w \[r12=r2-32768\],r13
|
||||
[ ]+388:[ ]+6f2d ff7f ffff @IM+5c5c@[ ]+@OC@\.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+388:[ ]+6f2d ff7f ffff @IM+5c5c@[ ]+@OC@\.w \[r12=r2\+[^]]+\],r5
|
||||
[ ]+390:[ ]+6f2d ffff 0000 @IM+5c5c@[ ]+@OC@\.w \[r12=r2\+(65535|ffff <six5535>)\],r5
|
||||
[ ]+398:[ ]+6f2d 0000 0000 @IM+5c5c@[ ]+@OC@\.w \[r12=r2\+0( <notstart>)?\],r5
|
||||
[ ]+39a:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
|
|||
|
|
@ -7,11 +7,11 @@
|
|||
.*:[ ]+file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
[ ]+0: 0000[ ]+ bcc ( 0x2|\.\+2)
|
||||
\.\.\.
|
||||
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+@IR+0354@[ ]+@OC@\.b r3,r5
|
||||
[ ]+6:[ ]+@IR+15d4@[ ]+@OC@\.w r5,r13
|
||||
[ ]+8:[ ]+@IM+0058@[ ]+@OC@\.b \[r0\],r5
|
||||
|
|
@ -134,10 +134,10 @@ Disassembly of section \.text:
|
|||
[ ]+1ec:[ ]+6f2d 0180 0000 @IM+1dd8@[ ]+@OC@\.w \[r2\+(32769|8001 <three2767\+0x2>)\],r13
|
||||
[ ]+1f4:[ ]+5f2d 0180 @IM+1dd8@[ ]+@OC@\.w \[r2-32767\],r13
|
||||
[ ]+1fa:[ ]+5f2d 0080 @IM+1dd8@[ ]+@OC@\.w \[r2-32768\],r13
|
||||
[ ]+200:[ ]+6f2d ff7f ffff @IM+1558@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+200:[ ]+6f2d ff7f ffff @IM+1558@[ ]+@OC@\.w \[r2\+[^]]+\],r5
|
||||
[ ]+208:[ ]+5f2d 0180 @IM+1dd8@[ ]+@OC@\.w \[r2-32767\],r13
|
||||
[ ]+20e:[ ]+5f2d 0080 @IM+1dd8@[ ]+@OC@\.w \[r2-32768\],r13
|
||||
[ ]+214:[ ]+6f2d ff7f ffff @IM+1558@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+214:[ ]+6f2d ff7f ffff @IM+1558@[ ]+@OC@\.w \[r2\+[^]]+\],r5
|
||||
[ ]+21c:[ ]+6f2d ffff 0000 @IM+1558@[ ]+@OC@\.w \[r2\+(65535|ffff <six5535>)\],r5
|
||||
[ ]+224:[ ]+6f2d 0000 0000 @IM+1558@[ ]+@OC@\.w \[r2\+0( <notstart>)?\],r5
|
||||
[ ]+226:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -214,10 +214,10 @@ Disassembly of section \.text:
|
|||
[ ]+364:[ ]+6f2d 0180 0000 @IM+18d8@[ ]+@OC@\.w \[r2\+(32769|8001 <three2767\+0x2>)\],r13,r8
|
||||
[ ]+36c:[ ]+5f2d 0180 @IM+18d8@[ ]+@OC@\.w \[r2-32767\],r13,r8
|
||||
[ ]+372:[ ]+5f2d 0080 @IM+18d8@[ ]+@OC@\.w \[r2-32768\],r13,r8
|
||||
[ ]+378:[ ]+6f2d ff7f ffff @IM+1858@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5,r8
|
||||
[ ]+378:[ ]+6f2d ff7f ffff @IM+1858@[ ]+@OC@\.w \[r2\+[^]]+\],r5,r8
|
||||
[ ]+380:[ ]+5f2d 0180 @IM+18d8@[ ]+@OC@\.w \[r2-32767\],r13,r8
|
||||
[ ]+386:[ ]+5f2d 0080 @IM+18d8@[ ]+@OC@\.w \[r2-32768\],r13,r8
|
||||
[ ]+38c:[ ]+6f2d ff7f ffff @IM+1858@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5,r8
|
||||
[ ]+38c:[ ]+6f2d ff7f ffff @IM+1858@[ ]+@OC@\.w \[r2\+[^]]+\],r5,r8
|
||||
[ ]+394:[ ]+6f2d ffff 0000 @IM+1858@[ ]+@OC@\.w \[r2\+(65535|ffff <six5535>)\],r5,r8
|
||||
[ ]+39c:[ ]+6f2d 0000 0000 @IM+1858@[ ]+@OC@\.w \[r2\+0( <notstart>)?\],r5,r8
|
||||
[ ]+39e:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -294,10 +294,10 @@ Disassembly of section \.text:
|
|||
[ ]+4dc:[ ]+6f2d 0180 0000 @IM+1cdc@[ ]+@OC@\.w \[r12=r2\+(32769|8001 <three2767\+0x2>)\],r13
|
||||
[ ]+4e4:[ ]+5f2d 0180 @IM+1cdc@[ ]+@OC@\.w \[r12=r2-32767\],r13
|
||||
[ ]+4ea:[ ]+5f2d 0080 @IM+1cdc@[ ]+@OC@\.w \[r12=r2-32768\],r13
|
||||
[ ]+4f0:[ ]+6f2d ff7f ffff @IM+1c5c@[ ]+@OC@\.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+4f0:[ ]+6f2d ff7f ffff @IM+1c5c@[ ]+@OC@\.w \[r12=r2\+[^]]+\],r5
|
||||
[ ]+4f8:[ ]+5f2d 0180 @IM+1cdc@[ ]+@OC@\.w \[r12=r2-32767\],r13
|
||||
[ ]+4fe:[ ]+5f2d 0080 @IM+1cdc@[ ]+@OC@\.w \[r12=r2-32768\],r13
|
||||
[ ]+504:[ ]+6f2d ff7f ffff @IM+1c5c@[ ]+@OC@\.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+504:[ ]+6f2d ff7f ffff @IM+1c5c@[ ]+@OC@\.w \[r12=r2\+[^]]+\],r5
|
||||
[ ]+50c:[ ]+6f2d ffff 0000 @IM+1c5c@[ ]+@OC@\.w \[r12=r2\+(65535|ffff <six5535>)\],r5
|
||||
[ ]+514:[ ]+6f2d 0000 0000 @IM+1c5c@[ ]+@OC@\.w \[r12=r2\+0( <notstart>)?\],r5
|
||||
[ ]+516:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
|
|||
|
|
@ -6,11 +6,11 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
0: 0000[ ]+ bcc ( 0x2|\.\+2)
|
||||
\.\.\.
|
||||
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+@IR+0356@[ ]+@OC@\.b r3,r5
|
||||
[ ]+6:[ ]+@IR+15d6@[ ]+@OC@\.w r5,r13
|
||||
[ ]+8:[ ]+@IR+2a16@[ ]+@OC@\.d r10,r1
|
||||
|
|
@ -77,8 +77,8 @@ Disassembly of section \.text:
|
|||
[ ]+fc:[ ]+@IM+2f1e@ 9822 0000[ ]+@OC@\.d (0x2298|2298 <end\+0x1806>),r1
|
||||
[ ]+102:[ ]+@IM+2f1e@ ac72 2a00[ ]+@OC@\.d (0x2a72ac|2a72ac <two701867\+0x13881>),r1
|
||||
[ ]+108:[ ]+@IM+2f1e@ d5c5 d6ff[ ]+@OC@\.d 0xffd6c5d5,r1
|
||||
[ ]+10e:[ ]+@IM+2f1e@ acce c09e[ ]+@OC@\.d (0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>),r1
|
||||
[ ]+114:[ ]+@IM+2f1e@ 5331 3f81[ ]+@OC@\.d (0x813f3153|813f3153 <const_int_m32\+0x52a6819e>),r1
|
||||
[ ]+10e:[ ]+@IM+2f1e@ acce c09e[ ]+@OC@\.d [^,]+,r1
|
||||
[ ]+114:[ ]+@IM+2f1e@ 5331 3f81[ ]+@OC@\.d [^,]+,r1
|
||||
[ ]+11a:[ ]+@IM+2f1e@ b5af 982e[ ]+@OC@\.d (0x2e98afb5|2e98afb5 <const_int_m32>),r1
|
||||
[ ]+120:[ ]+@IM+2f1e@ 2b45 941b[ ]+@OC@\.d (0x1b94452b|1b94452b <const_int_32>),r1
|
||||
[ ]+126:[ ]+@IM+2fde@ 2a00 0000[ ]+@OC@\.d (0x2a|2a <start\+0x26>),r13
|
||||
|
|
@ -184,10 +184,10 @@ Disassembly of section \.text:
|
|||
[ ]+2f4:[ ]+6f2d 0180 0000 @IM+1dda@[ ]+@OC@\.w \[r2\+(32769|8001 <three2767\+0x2>)\],r13
|
||||
[ ]+2fc:[ ]+5f2d 0180 @IM+1dda@[ ]+@OC@\.w \[r2-32767\],r13
|
||||
[ ]+302:[ ]+5f2d 0080 @IM+1dda@[ ]+@OC@\.w \[r2-32768\],r13
|
||||
[ ]+308:[ ]+6f2d ff7f ffff @IM+155a@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+308:[ ]+6f2d ff7f ffff @IM+155a@[ ]+@OC@\.w \[r2\+[^]]+\],r5
|
||||
[ ]+310:[ ]+5f2d 0180 @IM+1dda@[ ]+@OC@\.w \[r2-32767\],r13
|
||||
[ ]+316:[ ]+5f2d 0080 @IM+1dda@[ ]+@OC@\.w \[r2-32768\],r13
|
||||
[ ]+31c:[ ]+6f2d ff7f ffff @IM+155a@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+31c:[ ]+6f2d ff7f ffff @IM+155a@[ ]+@OC@\.w \[r2\+[^]]+\],r5
|
||||
[ ]+324:[ ]+6f2d ffff 0000 @IM+155a@[ ]+@OC@\.w \[r2\+(65535|ffff <six5535>)\],r5
|
||||
[ ]+32c:[ ]+6f2d 0000 0000 @IM+155a@[ ]+@OC@\.w \[r2\+0( <notstart>)?\],r5
|
||||
[ ]+32e:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -211,10 +211,10 @@ Disassembly of section \.text:
|
|||
[ ]+388:[ ]+5f2d 68dd @IM+211a@[ ]+@OC@\.d \[r2-8856\],r1
|
||||
[ ]+38e:[ ]+5f2d 9822 @IM+211a@[ ]+@OC@\.d \[r2\+8856\],r1
|
||||
[ ]+394:[ ]+6f2d ac72 2a00 @IM+211a@[ ]+@OC@\.d \[r2\+(2781868|2a72ac <two701867\+0x13881>)\],r1
|
||||
[ ]+39c:[ ]+6f2d d5c5 d6ff @IM+211a@[ ]+@OC@\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r1
|
||||
[ ]+3a4:[ ]+6f2d acce c09e @IM+211a@[ ]+@OC@\.d \[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\],r1
|
||||
[ ]+3ac:[ ]+6f2d 5331 3f81 @IM+211a@[ ]+@OC@\.d \[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
|
||||
[ ]+3b4:[ ]+6f2d 5331 3f81 @IM+211a@[ ]+@OC@\.d \[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
|
||||
[ ]+39c:[ ]+6f2d d5c5 d6ff @IM+211a@[ ]+@OC@\.d \[r2\+[^]]+\],r1
|
||||
[ ]+3a4:[ ]+6f2d acce c09e @IM+211a@[ ]+@OC@\.d \[r2\+[^]]+\],r1
|
||||
[ ]+3ac:[ ]+6f2d 5331 3f81 @IM+211a@[ ]+@OC@\.d \[r2\+[^]]+\],r1
|
||||
[ ]+3b4:[ ]+6f2d 5331 3f81 @IM+211a@[ ]+@OC@\.d \[r2\+[^]]+\],r1
|
||||
[ ]+3bc:[ ]+6f2d b5af 982e @IM+211a@[ ]+@OC@\.d \[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\],r1
|
||||
[ ]+3c4:[ ]+6f2d 2b45 941b @IM+211a@[ ]+@OC@\.d \[r2\+(0x1b94452b|1b94452b <const_int_32>)\],r1
|
||||
[ ]+3cc:[ ]+2a21 @IM+2dda@[ ]+@OC@\.d \[r2\+42\],r13
|
||||
|
|
@ -231,15 +231,15 @@ Disassembly of section \.text:
|
|||
[ ]+3fe:[ ]+6f2d 0180 0000 @IM+255a@[ ]+@OC@\.d \[r2\+(32769|8001 <three2767\+0x2>)\],r5
|
||||
[ ]+406:[ ]+5f2d 0180 @IM+255a@[ ]+@OC@\.d \[r2-32767\],r5
|
||||
[ ]+40c:[ ]+5f2d 0080 @IM+2dda@[ ]+@OC@\.d \[r2-32768\],r13
|
||||
[ ]+412:[ ]+6f2d ff7f ffff @IM+2dda@[ ]+@OC@\.d \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
|
||||
[ ]+412:[ ]+6f2d ff7f ffff @IM+2dda@[ ]+@OC@\.d \[r2\+[^]]+\],r13
|
||||
[ ]+41a:[ ]+5f2d 0180 @IM+255a@[ ]+@OC@\.d \[r2-32767\],r5
|
||||
[ ]+420:[ ]+5f2d 0080 @IM+2dda@[ ]+@OC@\.d \[r2-32768\],r13
|
||||
[ ]+426:[ ]+6f2d ff7f ffff @IM+2dda@[ ]+@OC@\.d \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
|
||||
[ ]+426:[ ]+6f2d ff7f ffff @IM+2dda@[ ]+@OC@\.d \[r2\+[^]]+\],r13
|
||||
[ ]+42e:[ ]+6f2d ffff 0000 @IM+255a@[ ]+@OC@\.d \[r2\+(65535|ffff <six5535>)\],r5
|
||||
[ ]+436:[ ]+6f2d 0000 0100 @IM+2dda@[ ]+@OC@\.d \[r2\+(65536|10000 <six5535\+0x1>)\],r13
|
||||
[ ]+43e:[ ]+6f2d 2b3a 2900 @IM+255a@[ ]+@OC@\.d \[r2\+(2701867|293a2b <two701867>)\],r5
|
||||
[ ]+446:[ ]+6f2d d5c5 d6ff @IM+255a@[ ]+@OC@\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
|
||||
[ ]+44e:[ ]+6f2d d5c5 d6ff @IM+255a@[ ]+@OC@\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
|
||||
[ ]+446:[ ]+6f2d d5c5 d6ff @IM+255a@[ ]+@OC@\.d \[r2\+[^]]+\],r5
|
||||
[ ]+44e:[ ]+6f2d d5c5 d6ff @IM+255a@[ ]+@OC@\.d \[r2\+[^]]+\],r5
|
||||
[ ]+456:[ ]+6f2d 0000 0000 @IM+255a@[ ]+@OC@\.d \[r2\+0( <notstart>)?\],r5
|
||||
[ ]+458:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+45e:[ ]+4205 @IM+085a@[ ]+@OC@\.b \[r2\+r0\.b\],r5,r8
|
||||
|
|
@ -327,10 +327,10 @@ Disassembly of section \.text:
|
|||
[ ]+5c6:[ ]+6f2d 0180 0000 @IM+18da@[ ]+@OC@\.w \[r2\+(32769|8001 <three2767\+0x2>)\],r13,r8
|
||||
[ ]+5ce:[ ]+5f2d 0180 @IM+18da@[ ]+@OC@\.w \[r2-32767\],r13,r8
|
||||
[ ]+5d4:[ ]+5f2d 0080 @IM+18da@[ ]+@OC@\.w \[r2-32768\],r13,r8
|
||||
[ ]+5da:[ ]+6f2d ff7f ffff @IM+185a@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5,r8
|
||||
[ ]+5da:[ ]+6f2d ff7f ffff @IM+185a@[ ]+@OC@\.w \[r2\+[^]]+\],r5,r8
|
||||
[ ]+5e2:[ ]+5f2d 0180 @IM+18da@[ ]+@OC@\.w \[r2-32767\],r13,r8
|
||||
[ ]+5e8:[ ]+5f2d 0080 @IM+18da@[ ]+@OC@\.w \[r2-32768\],r13,r8
|
||||
[ ]+5ee:[ ]+6f2d ff7f ffff @IM+185a@[ ]+@OC@\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5,r8
|
||||
[ ]+5ee:[ ]+6f2d ff7f ffff @IM+185a@[ ]+@OC@\.w \[r2\+[^]]+\],r5,r8
|
||||
[ ]+5f6:[ ]+6f2d ffff 0000 @IM+185a@[ ]+@OC@\.w \[r2\+(65535|ffff <six5535>)\],r5,r8
|
||||
[ ]+5fe:[ ]+6f2d 0000 0000 @IM+185a@[ ]+@OC@\.w \[r2\+0( <notstart>)?\],r5,r8
|
||||
[ ]+600:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -354,10 +354,10 @@ Disassembly of section \.text:
|
|||
[ ]+65a:[ ]+5f2d 68dd @IM+281a@[ ]+@OC@\.d \[r2-8856\],r1,r8
|
||||
[ ]+660:[ ]+5f2d 9822 @IM+281a@[ ]+@OC@\.d \[r2\+8856\],r1,r8
|
||||
[ ]+666:[ ]+6f2d ac72 2a00 @IM+281a@[ ]+@OC@\.d \[r2\+(2781868|2a72ac <two701867\+0x13881>)\],r1,r8
|
||||
[ ]+66e:[ ]+6f2d d5c5 d6ff @IM+281a@[ ]+@OC@\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r1,r8
|
||||
[ ]+676:[ ]+6f2d acce c09e @IM+281a@[ ]+@OC@\.d \[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\],r1,r8
|
||||
[ ]+67e:[ ]+6f2d 5331 3f81 @IM+281a@[ ]+@OC@\.d \[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1,r8
|
||||
[ ]+686:[ ]+6f2d 5331 3f81 @IM+281a@[ ]+@OC@\.d \[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1,r8
|
||||
[ ]+66e:[ ]+6f2d d5c5 d6ff @IM+281a@[ ]+@OC@\.d \[r2\+[^]]+\],r1,r8
|
||||
[ ]+676:[ ]+6f2d acce c09e @IM+281a@[ ]+@OC@\.d \[r2\+[^]]+\],r1,r8
|
||||
[ ]+67e:[ ]+6f2d 5331 3f81 @IM+281a@[ ]+@OC@\.d \[r2\+[^]]+\],r1,r8
|
||||
[ ]+686:[ ]+6f2d 5331 3f81 @IM+281a@[ ]+@OC@\.d \[r2\+[^]]+\],r1,r8
|
||||
[ ]+68e:[ ]+6f2d b5af 982e @IM+281a@[ ]+@OC@\.d \[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\],r1,r8
|
||||
[ ]+696:[ ]+6f2d 2b45 941b @IM+281a@[ ]+@OC@\.d \[r2\+(0x1b94452b|1b94452b <const_int_32>)\],r1,r8
|
||||
[ ]+69e:[ ]+2a21 @IM+28da@[ ]+@OC@\.d \[r2\+42\],r13,r8
|
||||
|
|
@ -374,15 +374,15 @@ Disassembly of section \.text:
|
|||
[ ]+6d0:[ ]+6f2d 0180 0000 @IM+285a@[ ]+@OC@\.d \[r2\+(32769|8001 <three2767\+0x2>)\],r5,r8
|
||||
[ ]+6d8:[ ]+5f2d 0180 @IM+285a@[ ]+@OC@\.d \[r2-32767\],r5,r8
|
||||
[ ]+6de:[ ]+5f2d 0080 @IM+28da@[ ]+@OC@\.d \[r2-32768\],r13,r8
|
||||
[ ]+6e4:[ ]+6f2d ff7f ffff @IM+28da@[ ]+@OC@\.d \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13,r8
|
||||
[ ]+6e4:[ ]+6f2d ff7f ffff @IM+28da@[ ]+@OC@\.d \[r2\+[^]]+\],r13,r8
|
||||
[ ]+6ec:[ ]+5f2d 0180 @IM+285a@[ ]+@OC@\.d \[r2-32767\],r5,r8
|
||||
[ ]+6f2:[ ]+5f2d 0080 @IM+28da@[ ]+@OC@\.d \[r2-32768\],r13,r8
|
||||
[ ]+6f8:[ ]+6f2d ff7f ffff @IM+28da@[ ]+@OC@\.d \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13,r8
|
||||
[ ]+6f8:[ ]+6f2d ff7f ffff @IM+28da@[ ]+@OC@\.d \[r2\+[^]]+\],r13,r8
|
||||
[ ]+700:[ ]+6f2d ffff 0000 @IM+285a@[ ]+@OC@\.d \[r2\+(65535|ffff <six5535>)\],r5,r8
|
||||
[ ]+708:[ ]+6f2d 0000 0100 @IM+28da@[ ]+@OC@\.d \[r2\+(65536|10000 <six5535\+0x1>)\],r13,r8
|
||||
[ ]+710:[ ]+6f2d 2b3a 2900 @IM+285a@[ ]+@OC@\.d \[r2\+(2701867|293a2b <two701867>)\],r5,r8
|
||||
[ ]+718:[ ]+6f2d d5c5 d6ff @IM+285a@[ ]+@OC@\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5,r8
|
||||
[ ]+720:[ ]+6f2d d5c5 d6ff @IM+285a@[ ]+@OC@\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5,r8
|
||||
[ ]+718:[ ]+6f2d d5c5 d6ff @IM+285a@[ ]+@OC@\.d \[r2\+[^]]+\],r5,r8
|
||||
[ ]+720:[ ]+6f2d d5c5 d6ff @IM+285a@[ ]+@OC@\.d \[r2\+[^]]+\],r5,r8
|
||||
[ ]+728:[ ]+6f2d 0000 0000 @IM+285a@[ ]+@OC@\.d \[r2\+0( <notstart>)?\],r5,r8
|
||||
[ ]+72a:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+730:[ ]+4205 @IM+0c5e@[ ]+@OC@\.b \[r12=r2\+r0\.b\],r5
|
||||
|
|
@ -470,10 +470,10 @@ Disassembly of section \.text:
|
|||
[ ]+898:[ ]+6f2d 0180 0000 @IM+1cde@[ ]+@OC@\.w \[r12=r2\+(32769|8001 <three2767\+0x2>)\],r13
|
||||
[ ]+8a0:[ ]+5f2d 0180 @IM+1cde@[ ]+@OC@\.w \[r12=r2-32767\],r13
|
||||
[ ]+8a6:[ ]+5f2d 0080 @IM+1cde@[ ]+@OC@\.w \[r12=r2-32768\],r13
|
||||
[ ]+8ac:[ ]+6f2d ff7f ffff @IM+1c5e@[ ]+@OC@\.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+8ac:[ ]+6f2d ff7f ffff @IM+1c5e@[ ]+@OC@\.w \[r12=r2\+[^]]+\],r5
|
||||
[ ]+8b4:[ ]+5f2d 0180 @IM+1cde@[ ]+@OC@\.w \[r12=r2-32767\],r13
|
||||
[ ]+8ba:[ ]+5f2d 0080 @IM+1cde@[ ]+@OC@\.w \[r12=r2-32768\],r13
|
||||
[ ]+8c0:[ ]+6f2d ff7f ffff @IM+1c5e@[ ]+@OC@\.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r5
|
||||
[ ]+8c0:[ ]+6f2d ff7f ffff @IM+1c5e@[ ]+@OC@\.w \[r12=r2\+[^]]+\],r5
|
||||
[ ]+8c8:[ ]+6f2d ffff 0000 @IM+1c5e@[ ]+@OC@\.w \[r12=r2\+(65535|ffff <six5535>)\],r5
|
||||
[ ]+8d0:[ ]+6f2d 0000 0000 @IM+1c5e@[ ]+@OC@\.w \[r12=r2\+0( <notstart>)?\],r5
|
||||
[ ]+8d2:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -497,10 +497,10 @@ Disassembly of section \.text:
|
|||
[ ]+92c:[ ]+5f2d 68dd @IM+2c1e@[ ]+@OC@\.d \[r12=r2-8856\],r1
|
||||
[ ]+932:[ ]+5f2d 9822 @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+8856\],r1
|
||||
[ ]+938:[ ]+6f2d ac72 2a00 @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+(2781868|2a72ac <two701867\+0x13881>)\],r1
|
||||
[ ]+940:[ ]+6f2d d5c5 d6ff @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r1
|
||||
[ ]+948:[ ]+6f2d acce c09e @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\],r1
|
||||
[ ]+950:[ ]+6f2d 5331 3f81 @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
|
||||
[ ]+958:[ ]+6f2d 5331 3f81 @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
|
||||
[ ]+940:[ ]+6f2d d5c5 d6ff @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+[^]]+\],r1
|
||||
[ ]+948:[ ]+6f2d acce c09e @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+[^]]+\],r1
|
||||
[ ]+950:[ ]+6f2d 5331 3f81 @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+[^]]+\],r1
|
||||
[ ]+958:[ ]+6f2d 5331 3f81 @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+[^]]+\],r1
|
||||
[ ]+960:[ ]+6f2d b5af 982e @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\],r1
|
||||
[ ]+968:[ ]+6f2d 2b45 941b @IM+2c1e@[ ]+@OC@\.d \[r12=r2\+(0x1b94452b|1b94452b <const_int_32>)\],r1
|
||||
[ ]+970:[ ]+2a21 @IM+2cde@[ ]+@OC@\.d \[r12=r2\+42\],r13
|
||||
|
|
@ -517,15 +517,15 @@ Disassembly of section \.text:
|
|||
[ ]+9a2:[ ]+6f2d 0180 0000 @IM+2c5e@[ ]+@OC@\.d \[r12=r2\+(32769|8001 <three2767\+0x2>)\],r5
|
||||
[ ]+9aa:[ ]+5f2d 0180 @IM+2c5e@[ ]+@OC@\.d \[r12=r2-32767\],r5
|
||||
[ ]+9b0:[ ]+5f2d 0080 @IM+2cde@[ ]+@OC@\.d \[r12=r2-32768\],r13
|
||||
[ ]+9b6:[ ]+6f2d ff7f ffff @IM+2cde@[ ]+@OC@\.d \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
|
||||
[ ]+9b6:[ ]+6f2d ff7f ffff @IM+2cde@[ ]+@OC@\.d \[r12=r2\+[^]]+\],r13
|
||||
[ ]+9be:[ ]+5f2d 0180 @IM+2c5e@[ ]+@OC@\.d \[r12=r2-32767\],r5
|
||||
[ ]+9c4:[ ]+5f2d 0080 @IM+2cde@[ ]+@OC@\.d \[r12=r2-32768\],r13
|
||||
[ ]+9ca:[ ]+6f2d ff7f ffff @IM+2cde@[ ]+@OC@\.d \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
|
||||
[ ]+9ca:[ ]+6f2d ff7f ffff @IM+2cde@[ ]+@OC@\.d \[r12=r2\+[^]]+\],r13
|
||||
[ ]+9d2:[ ]+6f2d ffff 0000 @IM+2c5e@[ ]+@OC@\.d \[r12=r2\+(65535|ffff <six5535>)\],r5
|
||||
[ ]+9da:[ ]+6f2d 0000 0100 @IM+2cde@[ ]+@OC@\.d \[r12=r2\+(65536|10000 <six5535\+0x1>)\],r13
|
||||
[ ]+9e2:[ ]+6f2d 2b3a 2900 @IM+2c5e@[ ]+@OC@\.d \[r12=r2\+(2701867|293a2b <two701867>)\],r5
|
||||
[ ]+9ea:[ ]+6f2d d5c5 d6ff @IM+2c5e@[ ]+@OC@\.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
|
||||
[ ]+9f2:[ ]+6f2d d5c5 d6ff @IM+2c5e@[ ]+@OC@\.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
|
||||
[ ]+9ea:[ ]+6f2d d5c5 d6ff @IM+2c5e@[ ]+@OC@\.d \[r12=r2\+[^]]+\],r5
|
||||
[ ]+9f2:[ ]+6f2d d5c5 d6ff @IM+2c5e@[ ]+@OC@\.d \[r12=r2\+[^]]+\],r5
|
||||
[ ]+9fa:[ ]+6f2d 0000 0000 @IM+2c5e@[ ]+@OC@\.d \[r12=r2\+0( <notstart>)?\],r5
|
||||
[ ]+9fc:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+a02:[ ]+7309 @IM+055a@[ ]+@OC@\.b \[\[r3\]\],r5
|
||||
|
|
@ -565,5 +565,5 @@ Disassembly of section \.text:
|
|||
[ ]+a8a:[ ]+7f0d 0000 0000 @IM+297a@[ ]+@OC@\.d \[(0x0|0 <notstart>)\],r7,r9
|
||||
[ ]+a8c:[ ]+(R_CRIS_)?32[ ]+\.text
|
||||
|
||||
00000a92 <end>:
|
||||
0+a92 <end>:
|
||||
\.\.\.
|
||||
|
|
|
|||
|
|
@ -5,6 +5,6 @@
|
|||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+\.\.\.
|
||||
|
|
|
|||
|
|
@ -4,15 +4,15 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start_original>:
|
||||
0+ <start_original>:
|
||||
[ ]+0:[ ]+0f05[ ]+nop[ ]*
|
||||
00000002 <startm32>:
|
||||
0+2 <startm32>:
|
||||
[ ]+2:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
00007e6a <startm16>:
|
||||
0+7e6a <startm16>:
|
||||
[ ]+7e6a:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
00007f2e <start>:
|
||||
0+7f2e <start>:
|
||||
[ ]+7f2e:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+7f30:[ ]+fde0[ ]+ba[ ]+(0x7f2e|7f2e <start>)
|
||||
[ ]+7f32:[ ]+fb00[ ]+bcc[ ]+(0x7f2e|7f2e <start>)
|
||||
|
|
@ -34,7 +34,7 @@ Disassembly of section \.text:
|
|||
[ ]+7f52:[ ]+db60[ ]+bpl[ ]+(0x7f2e|7f2e <start>)
|
||||
[ ]+7f54:[ ]+d940[ ]+bvc[ ]+(0x7f2e|7f2e <start>)
|
||||
[ ]+7f56:[ ]+d750[ ]+bvs[ ]+(0x7f2e|7f2e <start>)
|
||||
00007f58 <start2>:
|
||||
0+7f58 <start2>:
|
||||
[ ]+7f58:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+7f5a:[ ]+0fe0[ ]+ba[ ]+(0x7e6a|7e6a <startm16>)
|
||||
[ ]+7f5c:[ ]+0d00[ ]+bcc[ ]+(0x7e6a|7e6a <startm16>)
|
||||
|
|
@ -56,7 +56,7 @@ Disassembly of section \.text:
|
|||
[ ]+7f8e:[ ]+ff6d d8fe[ ]+bpl (0x7e6a|7e6a <startm16>)
|
||||
[ ]+7f92:[ ]+ff4d d4fe[ ]+bvc (0x7e6a|7e6a <startm16>)
|
||||
[ ]+7f96:[ ]+ff5d d0fe[ ]+bvs (0x7e6a|7e6a <startm16>)
|
||||
00007f9a <start3>:
|
||||
0+7f9a <start3>:
|
||||
[ ]+7f9a:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+7f9c:[ ]+ffed cafe[ ]+ba (0x7e6a|7e6a <startm16>)
|
||||
[ ]+7fa0:[ ]+ff0d c6fe[ ]+bhs (0x7e6a|7e6a <startm16>)
|
||||
|
|
@ -78,7 +78,7 @@ Disassembly of section \.text:
|
|||
[ ]+7fe0:[ ]+ff6d 86fe[ ]+bpl (0x7e6a|7e6a <startm16>)
|
||||
[ ]+7fe4:[ ]+ff4d 82fe[ ]+bvc (0x7e6a|7e6a <startm16>)
|
||||
[ ]+7fe8:[ ]+ff5d 7efe[ ]+bvs (0x7e6a|7e6a <startm16>)
|
||||
00007fec <start4>:
|
||||
0+7fec <start4>:
|
||||
[ ]+7fec:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+7fee:[ ]+ffed 1080[ ]+ba (0x2|2 <startm32>)
|
||||
[ ]+7ff2:[ ]+ff0d 0c80[ ]+bhs (0x2|2 <startm32>)
|
||||
|
|
@ -160,7 +160,7 @@ Disassembly of section \.text:
|
|||
[ ]+80ae:[ ]+3f0d 0200 0000[ ]+jump[ ]+(0x2|2 <startm32>)
|
||||
[ ]+80b0:[ ]+(R_CRIS_)?32[ ]+\.text\+0x[0]*2
|
||||
[ ]+80b4:[ ]+f950[ ]+bvs[ ]+(0x80ae|80ae <start4\+0x..>)
|
||||
000080b6 <start5>:
|
||||
0+80b6 <start5>:
|
||||
[ ]+80b6:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+80b8:[ ]+08e0[ ]+ba[ ]+(0x80c2|80c2 <start5\+0xc>)
|
||||
[ ]+80ba:[ ]+0f05[ ]+nop[ ]*
|
||||
|
|
@ -262,7 +262,7 @@ Disassembly of section \.text:
|
|||
[ ]+81a0:[ ]+3f0d 0200 0000[ ]+jump[ ]+(0x2|2 <startm32>)
|
||||
[ ]+81a2:[ ]+(R_CRIS_)?32[ ]+\.text\+0x[0]*2
|
||||
[ ]+81a6:[ ]+f950[ ]+bvs[ ]+(0x81a0|81a0 <start5\+0x..>)
|
||||
000081a8 <start6>:
|
||||
0+81a8 <start6>:
|
||||
[ ]+81a8:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+81aa:[ ]+08e0[ ]+ba[ ]+(0x81b4|81b4 <start6\+0xc>)
|
||||
[ ]+81ac:[ ]+0f05[ ]+nop[ ]*
|
||||
|
|
@ -364,7 +364,7 @@ Disassembly of section \.text:
|
|||
[ ]+8292:[ ]+3f0d 4403 0100[ ]+jump[ ]+(0x[0]*10344|10344 <endp32>)
|
||||
[ ]+8294:[ ]+(R_CRIS_)?32[ ]+\.text\+0x[0]*10344
|
||||
[ ]+8298:[ ]+f950[ ]+bvs[ ]+(0x8292|8292 <start6\+0x..>)
|
||||
0000829a <start7>:
|
||||
0+829a <start7>:
|
||||
[ ]+829a:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+829c:[ ]+08e0[ ]+ba[ ]+(0x82a6|82a6 <start7\+0xc>)
|
||||
[ ]+829e:[ ]+0f05[ ]+nop[ ]*
|
||||
|
|
@ -442,7 +442,7 @@ Disassembly of section \.text:
|
|||
[ ]+8350:[ ]+ff6d f07f[ ]+bpl (0x[0]*10344|10344 <endp32>)
|
||||
[ ]+8354:[ ]+ff4d ec7f[ ]+bvc (0x[0]*10344|10344 <endp32>)
|
||||
[ ]+8358:[ ]+ff5d e87f[ ]+bvs (0x[0]*10344|10344 <endp32>)
|
||||
0000835c <start8>:
|
||||
0+835c <start8>:
|
||||
[ ]+835c:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+835e:[ ]+ffed 7a01[ ]+ba (0x84dc|84dc <endp16>)
|
||||
[ ]+8362:[ ]+ff0d 7601[ ]+bhs (0x84dc|84dc <endp16>)
|
||||
|
|
@ -464,7 +464,7 @@ Disassembly of section \.text:
|
|||
[ ]+83a2:[ ]+ff6d 3601[ ]+bpl (0x84dc|84dc <endp16>)
|
||||
[ ]+83a6:[ ]+ff4d 3201[ ]+bvc (0x84dc|84dc <endp16>)
|
||||
[ ]+83aa:[ ]+ff5d 2e01[ ]+bvs (0x84dc|84dc <endp16>)
|
||||
000083ae <start9>:
|
||||
0+83ae <start9>:
|
||||
[ ]+83ae:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+83b0:[ ]+ffed 2801[ ]+ba (0x84dc|84dc <endp16>)
|
||||
[ ]+83b4:[ ]+ff0d 2401[ ]+bhs (0x84dc|84dc <endp16>)
|
||||
|
|
@ -486,7 +486,7 @@ Disassembly of section \.text:
|
|||
[ ]+83e8:[ ]+f260[ ]+bpl[ ]+(0x84dc|84dc <endp16>)
|
||||
[ ]+83ea:[ ]+f040[ ]+bvc[ ]+(0x84dc|84dc <endp16>)
|
||||
[ ]+83ec:[ ]+ee50[ ]+bvs[ ]+(0x84dc|84dc <endp16>)
|
||||
000083ee <start10>:
|
||||
0+83ee <start10>:
|
||||
[ ]+83ee:[ ]+28e0[ ]+ba[ ]+(0x8418|8418 <end>)
|
||||
[ ]+83f0:[ ]+2600[ ]+bcc[ ]+(0x8418|8418 <end>)
|
||||
[ ]+83f2:[ ]+2410[ ]+bcs[ ]+(0x8418|8418 <end>)
|
||||
|
|
@ -508,12 +508,12 @@ Disassembly of section \.text:
|
|||
[ ]+8412:[ ]+0440[ ]+bvc[ ]+(0x8418|8418 <end>)
|
||||
[ ]+8414:[ ]+0250[ ]+bvs[ ]+(0x8418|8418 <end>)
|
||||
[ ]+8416:[ ]+0f05[ ]+nop[ ]*
|
||||
00008418 <end>:
|
||||
0+8418 <end>:
|
||||
[ ]+8418:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
000084dc <endp16>:
|
||||
0+84dc <endp16>:
|
||||
[ ]+84dc:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
00010344 <endp32>:
|
||||
0+10344 <endp32>:
|
||||
[ ]+10344:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*:[ ]+file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+32e9[ ]+break[ ]+2
|
||||
[ ]+2:[ ]+30e9[ ]+break[ ]+0
|
||||
[ ]+4:[ ]+31e9[ ]+break[ ]+1
|
||||
|
|
@ -23,5 +23,5 @@ Disassembly of section \.text:
|
|||
[ ]+1e:[ ]+3ee9[ ]+break[ ]+14
|
||||
[ ]+20:[ ]+3fe9[ ]+break[ ]+15
|
||||
|
||||
00000022 <end>:
|
||||
0+22 <end>:
|
||||
\.\.\.
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <sym2>:
|
||||
0+ <sym2>:
|
||||
[ ]+0:[ ]+4002[ ]+moveq[ ]+0,r0
|
||||
[ ]+2:[ ]+0c00[ ]+bcc[ ]+(0x10|10 <sym2\+0x10>)
|
||||
[ ]+4:[ ]+4102[ ]+moveq[ ]+1,r0
|
||||
|
|
@ -13,8 +13,8 @@ Disassembly of section \.text:
|
|||
[ ]+a:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+c:[ ]+3f0d 1280 0000[ ]+jump[ ]+(0x8012|8012 <sym1>)
|
||||
[ ]+e:[ ]+(R_CRIS_)?32[ ]+\.text\+0x[0]*8012
|
||||
00000012 <next_label>:
|
||||
0+12 <next_label>:
|
||||
[ ]+12:[ ]+4202[ ]+moveq[ ]+2,r0
|
||||
^[ ]+\.\.\.
|
||||
00008012 <sym1>:
|
||||
0+8012 <sym1>:
|
||||
[ ]+8012:[ ]+4302[ ]+moveq[ ]+3,r0
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
|
||||
.*: file format .*-cris
|
||||
Disassembly of section \.text:
|
||||
00000000 <sym2>:
|
||||
0+ <sym2>:
|
||||
[ ]+0:[ ]+4002[ ]+moveq[ ]+0,r0
|
||||
[ ]+2:[ ]+1400[ ]+bcc[ ]+(0x18|18 <sym2\+0x18>)
|
||||
[ ]+4:[ ]+0e00[ ]+bcc[ ]+(0x14|14 <sym2\+0x14>)
|
||||
|
|
@ -15,11 +15,11 @@ Disassembly of section \.text:
|
|||
[ ]+10:[ ]+(R_CRIS_)?32[ ]+\.text\+0x[0]*801c
|
||||
[ ]+14:[ ]+3f0d 1a80 0000[ ]+jump[ ]+(0x801a|801a <sym1>)
|
||||
[ ]+16:[ ]+(R_CRIS_)?32[ ]+\.text\+0x[0]*801a
|
||||
0000001a <next_label>:
|
||||
0+1a <next_label>:
|
||||
[ ]+1a:[ ]+4202[ ]+moveq[ ]+2,r0
|
||||
^[ ]+\.\.\.
|
||||
0000801a <sym1>:
|
||||
0+801a <sym1>:
|
||||
[ ]+801a:[ ]+4302[ ]+moveq[ ]+3,r0
|
||||
0000801c <sym3>:
|
||||
0+801c <sym3>:
|
||||
[ ]+801c:[ ]+4402[ ]+moveq[ ]+4,r0
|
||||
^[ ]+\.\.\.
|
||||
|
|
|
|||
|
|
@ -3,12 +3,12 @@
|
|||
|
||||
.*: file format .*-cris
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+4002[ ]+moveq[ ]+0,r0
|
||||
[ ]+2:[ ]+af0c 5700[ ]+subs\.b 87,r0
|
||||
[ ]+6:[ ]+cf0d 2900[ ]+bound\.b 0x29,r0
|
||||
[ ]+a:[ ]+5f05 3ff8[ ]+adds\.w \[pc\+r0\.w\],pc
|
||||
0000000e <sym2>:
|
||||
0+e <sym2>:
|
||||
[ ]+e:[ ]+6201[ ]+case 87: -> (0x)?170( <.*)?
|
||||
[ ]+10:[ ]+5c01[ ]+case 88: -> (0x)?16a( <.*)?
|
||||
[ ]+12:[ ]+5601[ ]+case 89: -> (0x)?164( <.*)?
|
||||
|
|
@ -139,90 +139,90 @@ Disassembly of section \.text:
|
|||
[ ]+16c:[ ]+(R_CRIS_)?32[ ]+\.text\+0x[0]*817a
|
||||
[ ]+170:[ ]+3f0d 7881 0000[ ]+jump[ ]+(0x8178|8178 <sym1>)
|
||||
[ ]+172:[ ]+(R_CRIS_)?32[ ]+\.text\+0x[0]*8178
|
||||
00000176 <next_label>:
|
||||
0+176 <next_label>:
|
||||
[ ]+176:[ ]+4202[ ]+moveq[ ]+2,r0
|
||||
^[ ]+\.\.\.
|
||||
00008178 <sym1>:
|
||||
0+8178 <sym1>:
|
||||
[ ]+8178:[ ]+7d02[ ]+moveq[ ]+-3,r0
|
||||
0000817a <sym3>:
|
||||
0+817a <sym3>:
|
||||
[ ]+817a:[ ]+4302[ ]+moveq[ ]+3,r0
|
||||
0000817c <sym4>:
|
||||
0+817c <sym4>:
|
||||
[ ]+817c:[ ]+4402[ ]+moveq[ ]+4,r0
|
||||
0000817e <sym5>:
|
||||
0+817e <sym5>:
|
||||
[ ]+817e:[ ]+4502[ ]+moveq[ ]+5,r0
|
||||
00008180 <sym6>:
|
||||
0+8180 <sym6>:
|
||||
[ ]+8180:[ ]+4602[ ]+moveq[ ]+6,r0
|
||||
00008182 <sym7>:
|
||||
0+8182 <sym7>:
|
||||
[ ]+8182:[ ]+4702[ ]+moveq[ ]+7,r0
|
||||
00008184 <sym8>:
|
||||
0+8184 <sym8>:
|
||||
[ ]+8184:[ ]+4802[ ]+moveq[ ]+8,r0
|
||||
00008186 <sym9>:
|
||||
0+8186 <sym9>:
|
||||
[ ]+8186:[ ]+4902[ ]+moveq[ ]+9,r0
|
||||
00008188 <sym10>:
|
||||
0+8188 <sym10>:
|
||||
[ ]+8188:[ ]+4a02[ ]+moveq[ ]+10,r0
|
||||
0000818a <sym11>:
|
||||
0+818a <sym11>:
|
||||
[ ]+818a:[ ]+4b02[ ]+moveq[ ]+11,r0
|
||||
0000818c <sym12>:
|
||||
0+818c <sym12>:
|
||||
[ ]+818c:[ ]+4c02[ ]+moveq[ ]+12,r0
|
||||
0000818e <sym13>:
|
||||
0+818e <sym13>:
|
||||
[ ]+818e:[ ]+4d02[ ]+moveq[ ]+13,r0
|
||||
00008190 <sym14>:
|
||||
0+8190 <sym14>:
|
||||
[ ]+8190:[ ]+4e02[ ]+moveq[ ]+14,r0
|
||||
00008192 <sym15>:
|
||||
0+8192 <sym15>:
|
||||
[ ]+8192:[ ]+4f02[ ]+moveq[ ]+15,r0
|
||||
00008194 <sym16>:
|
||||
0+8194 <sym16>:
|
||||
[ ]+8194:[ ]+5002[ ]+moveq[ ]+16,r0
|
||||
00008196 <sym17>:
|
||||
0+8196 <sym17>:
|
||||
[ ]+8196:[ ]+5102[ ]+moveq[ ]+17,r0
|
||||
00008198 <sym18>:
|
||||
0+8198 <sym18>:
|
||||
[ ]+8198:[ ]+5202[ ]+moveq[ ]+18,r0
|
||||
0000819a <sym19>:
|
||||
0+819a <sym19>:
|
||||
[ ]+819a:[ ]+5302[ ]+moveq[ ]+19,r0
|
||||
0000819c <sym20>:
|
||||
0+819c <sym20>:
|
||||
[ ]+819c:[ ]+5402[ ]+moveq[ ]+20,r0
|
||||
0000819e <sym21>:
|
||||
0+819e <sym21>:
|
||||
[ ]+819e:[ ]+5502[ ]+moveq[ ]+21,r0
|
||||
000081a0 <sym22>:
|
||||
0+81a0 <sym22>:
|
||||
[ ]+81a0:[ ]+5602[ ]+moveq[ ]+22,r0
|
||||
000081a2 <sym23>:
|
||||
0+81a2 <sym23>:
|
||||
[ ]+81a2:[ ]+5702[ ]+moveq[ ]+23,r0
|
||||
000081a4 <sym24>:
|
||||
0+81a4 <sym24>:
|
||||
[ ]+81a4:[ ]+5802[ ]+moveq[ ]+24,r0
|
||||
000081a6 <sym25>:
|
||||
0+81a6 <sym25>:
|
||||
[ ]+81a6:[ ]+5902[ ]+moveq[ ]+25,r0
|
||||
000081a8 <sym26>:
|
||||
0+81a8 <sym26>:
|
||||
[ ]+81a8:[ ]+5a02[ ]+moveq[ ]+26,r0
|
||||
000081aa <sym27>:
|
||||
0+81aa <sym27>:
|
||||
[ ]+81aa:[ ]+5b02[ ]+moveq[ ]+27,r0
|
||||
000081ac <sym28>:
|
||||
0+81ac <sym28>:
|
||||
[ ]+81ac:[ ]+5c02[ ]+moveq[ ]+28,r0
|
||||
000081ae <sym29>:
|
||||
0+81ae <sym29>:
|
||||
[ ]+81ae:[ ]+5d02[ ]+moveq[ ]+29,r0
|
||||
000081b0 <sym30>:
|
||||
0+81b0 <sym30>:
|
||||
[ ]+81b0:[ ]+5e02[ ]+moveq[ ]+30,r0
|
||||
000081b2 <sym31>:
|
||||
0+81b2 <sym31>:
|
||||
[ ]+81b2:[ ]+5f02[ ]+moveq[ ]+31,r0
|
||||
000081b4 <sym32>:
|
||||
0+81b4 <sym32>:
|
||||
[ ]+81b4:[ ]+6002[ ]+moveq[ ]+-32,r0
|
||||
000081b6 <sym33>:
|
||||
0+81b6 <sym33>:
|
||||
[ ]+81b6:[ ]+6102[ ]+moveq[ ]+-31,r0
|
||||
000081b8 <sym34>:
|
||||
0+81b8 <sym34>:
|
||||
[ ]+81b8:[ ]+6202[ ]+moveq[ ]+-30,r0
|
||||
000081ba <sym35>:
|
||||
0+81ba <sym35>:
|
||||
[ ]+81ba:[ ]+6302[ ]+moveq[ ]+-29,r0
|
||||
000081bc <sym36>:
|
||||
0+81bc <sym36>:
|
||||
[ ]+81bc:[ ]+6402[ ]+moveq[ ]+-28,r0
|
||||
000081be <sym37>:
|
||||
0+81be <sym37>:
|
||||
[ ]+81be:[ ]+6502[ ]+moveq[ ]+-27,r0
|
||||
000081c0 <sym38>:
|
||||
0+81c0 <sym38>:
|
||||
[ ]+81c0:[ ]+6602[ ]+moveq[ ]+-26,r0
|
||||
000081c2 <sym39>:
|
||||
0+81c2 <sym39>:
|
||||
[ ]+81c2:[ ]+6702[ ]+moveq[ ]+-25,r0
|
||||
000081c4 <sym40>:
|
||||
0+81c4 <sym40>:
|
||||
[ ]+81c4:[ ]+6802[ ]+moveq[ ]+-24,r0
|
||||
000081c6 <sym41>:
|
||||
0+81c6 <sym41>:
|
||||
[ ]+81c6:[ ]+6902[ ]+moveq[ ]+-23,r0
|
||||
000081c8 <sym42>:
|
||||
0+81c8 <sym42>:
|
||||
[ ]+81c8:[ ]+6a02[ ]+moveq[ ]+-22,r0
|
||||
000081ca <sym43>:
|
||||
0+81ca <sym43>:
|
||||
[ ]+81ca:[ ]+6b02[ ]+moveq[ ]+-21,r0
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+2:[ ]+b015[ ]+ax[ ]*
|
||||
[ ]+4:[ ]+bff5[ ]+setf[ ]+cvznxi[be][dm]
|
||||
|
|
|
|||
|
|
@ -6,11 +6,11 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
[ ]+0: 0000[ ]+ bcc ( 0x2|\.\+2)
|
||||
\.\.\.
|
||||
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+7306[ ]+clear\.b r3
|
||||
[ ]+6:[ ]+7546[ ]+clear\.w r5
|
||||
[ ]+8:[ ]+7a86[ ]+clear\.d r10
|
||||
|
|
@ -99,10 +99,10 @@ Disassembly of section \.text:
|
|||
[ ]+166:[ ]+6f2d 0180 0000 704a[ ]+clear\.w \[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+16e:[ ]+5f2d 0180 704a[ ]+clear\.w \[r2-32767\]
|
||||
[ ]+174:[ ]+5f2d 0080 704a[ ]+clear\.w \[r2-32768\]
|
||||
[ ]+17a:[ ]+6f2d ff7f ffff 704a[ ]+clear\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+17a:[ ]+6f2d ff7f ffff 704a[ ]+clear\.w \[r2\+[^]]+\]
|
||||
[ ]+182:[ ]+5f2d 0180 704a[ ]+clear\.w \[r2-32767\]
|
||||
[ ]+188:[ ]+5f2d 0080 704a[ ]+clear\.w \[r2-32768\]
|
||||
[ ]+18e:[ ]+6f2d ff7f ffff 704a[ ]+clear\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+18e:[ ]+6f2d ff7f ffff 704a[ ]+clear\.w \[r2\+[^]]+\]
|
||||
[ ]+196:[ ]+6f2d ffff 0000 704a[ ]+clear\.w \[r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+19e:[ ]+6f2d 0000 0000 704a[ ]+clear\.w \[r2\+0( <notstart>)?\]
|
||||
[ ]+1a0:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -126,10 +126,10 @@ Disassembly of section \.text:
|
|||
[ ]+1fa:[ ]+5f2d 68dd 708a[ ]+clear\.d \[r2-8856\]
|
||||
[ ]+200:[ ]+5f2d 9822 708a[ ]+clear\.d \[r2\+8856\]
|
||||
[ ]+206:[ ]+6f2d ac72 2a00 708a[ ]+clear\.d \[r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+20e:[ ]+6f2d d5c5 d6ff 708a[ ]+clear\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+216:[ ]+6f2d acce c09e 708a[ ]+clear\.d \[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+21e:[ ]+6f2d 5331 3f81 708a[ ]+clear\.d \[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+226:[ ]+6f2d 5331 3f81 708a[ ]+clear\.d \[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+20e:[ ]+6f2d d5c5 d6ff 708a[ ]+clear\.d \[r2\+[^]]+\]
|
||||
[ ]+216:[ ]+6f2d acce c09e 708a[ ]+clear\.d \[r2\+[^]]+\]
|
||||
[ ]+21e:[ ]+6f2d 5331 3f81 708a[ ]+clear\.d \[r2\+[^]]+\]
|
||||
[ ]+226:[ ]+6f2d 5331 3f81 708a[ ]+clear\.d \[r2\+[^]]+\]
|
||||
[ ]+22e:[ ]+6f2d b5af 982e 708a[ ]+clear\.d \[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+236:[ ]+6f2d 2b45 941b 708a[ ]+clear\.d \[r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+23e:[ ]+2a21 708a[ ]+clear\.d \[r2\+42\]
|
||||
|
|
@ -146,15 +146,15 @@ Disassembly of section \.text:
|
|||
[ ]+270:[ ]+6f2d 0180 0000 708a[ ]+clear\.d \[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+278:[ ]+5f2d 0180 708a[ ]+clear\.d \[r2-32767\]
|
||||
[ ]+27e:[ ]+5f2d 0080 708a[ ]+clear\.d \[r2-32768\]
|
||||
[ ]+284:[ ]+6f2d ff7f ffff 708a[ ]+clear\.d \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+284:[ ]+6f2d ff7f ffff 708a[ ]+clear\.d \[r2\+[^]]+\]
|
||||
[ ]+28c:[ ]+5f2d 0180 708a[ ]+clear\.d \[r2-32767\]
|
||||
[ ]+292:[ ]+5f2d 0080 708a[ ]+clear\.d \[r2-32768\]
|
||||
[ ]+298:[ ]+6f2d ff7f ffff 708a[ ]+clear\.d \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+298:[ ]+6f2d ff7f ffff 708a[ ]+clear\.d \[r2\+[^]]+\]
|
||||
[ ]+2a0:[ ]+6f2d ffff 0000 708a[ ]+clear\.d \[r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+2a8:[ ]+6f2d 0000 0100 708a[ ]+clear\.d \[r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+2b0:[ ]+6f2d 2b3a 2900 708a[ ]+clear\.d \[r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+2b8:[ ]+6f2d d5c5 d6ff 708a[ ]+clear\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+2c0:[ ]+6f2d d5c5 d6ff 708a[ ]+clear\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+2b8:[ ]+6f2d d5c5 d6ff 708a[ ]+clear\.d \[r2\+[^]]+\]
|
||||
[ ]+2c0:[ ]+6f2d d5c5 d6ff 708a[ ]+clear\.d \[r2\+[^]]+\]
|
||||
[ ]+2c8:[ ]+6f2d 0000 0000 708a[ ]+clear\.d \[r2\+0( <notstart>)?\]
|
||||
[ ]+2ca:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+2d0:[ ]+4205 7c0e[ ]+clear\.b \[r12=r2\+r0\.b\]
|
||||
|
|
@ -242,10 +242,10 @@ Disassembly of section \.text:
|
|||
[ ]+438:[ ]+6f2d 0180 0000 7c4e[ ]+clear\.w \[r12=r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+440:[ ]+5f2d 0180 7c4e[ ]+clear\.w \[r12=r2-32767\]
|
||||
[ ]+446:[ ]+5f2d 0080 7c4e[ ]+clear\.w \[r12=r2-32768\]
|
||||
[ ]+44c:[ ]+6f2d ff7f ffff 7c4e[ ]+clear\.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+44c:[ ]+6f2d ff7f ffff 7c4e[ ]+clear\.w \[r12=r2\+[^]]+\]
|
||||
[ ]+454:[ ]+5f2d 0180 7c4e[ ]+clear\.w \[r12=r2-32767\]
|
||||
[ ]+45a:[ ]+5f2d 0080 7c4e[ ]+clear\.w \[r12=r2-32768\]
|
||||
[ ]+460:[ ]+6f2d ff7f ffff 7c4e[ ]+clear\.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+460:[ ]+6f2d ff7f ffff 7c4e[ ]+clear\.w \[r12=r2\+[^]]+\]
|
||||
[ ]+468:[ ]+6f2d ffff 0000 7c4e[ ]+clear\.w \[r12=r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+470:[ ]+6f2d 0000 0000 7c4e[ ]+clear\.w \[r12=r2\+0( <notstart>)?\]
|
||||
[ ]+472:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -269,10 +269,10 @@ Disassembly of section \.text:
|
|||
[ ]+4cc:[ ]+5f2d 68dd 7c8e[ ]+clear\.d \[r12=r2-8856\]
|
||||
[ ]+4d2:[ ]+5f2d 9822 7c8e[ ]+clear\.d \[r12=r2\+8856\]
|
||||
[ ]+4d8:[ ]+6f2d ac72 2a00 7c8e[ ]+clear\.d \[r12=r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+4e0:[ ]+6f2d d5c5 d6ff 7c8e[ ]+clear\.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+4e8:[ ]+6f2d acce c09e 7c8e[ ]+clear\.d \[r12=r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+4f0:[ ]+6f2d 5331 3f81 7c8e[ ]+clear\.d \[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+4f8:[ ]+6f2d 5331 3f81 7c8e[ ]+clear\.d \[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+4e0:[ ]+6f2d d5c5 d6ff 7c8e[ ]+clear\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+4e8:[ ]+6f2d acce c09e 7c8e[ ]+clear\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+4f0:[ ]+6f2d 5331 3f81 7c8e[ ]+clear\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+4f8:[ ]+6f2d 5331 3f81 7c8e[ ]+clear\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+500:[ ]+6f2d b5af 982e 7c8e[ ]+clear\.d \[r12=r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+508:[ ]+6f2d 2b45 941b 7c8e[ ]+clear\.d \[r12=r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+510:[ ]+2a21 7c8e[ ]+clear\.d \[r12=r2\+42\]
|
||||
|
|
@ -289,15 +289,15 @@ Disassembly of section \.text:
|
|||
[ ]+542:[ ]+6f2d 0180 0000 7c8e[ ]+clear\.d \[r12=r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+54a:[ ]+5f2d 0180 7c8e[ ]+clear\.d \[r12=r2-32767\]
|
||||
[ ]+550:[ ]+5f2d 0080 7c8e[ ]+clear\.d \[r12=r2-32768\]
|
||||
[ ]+556:[ ]+6f2d ff7f ffff 7c8e[ ]+clear\.d \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+556:[ ]+6f2d ff7f ffff 7c8e[ ]+clear\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+55e:[ ]+5f2d 0180 7c8e[ ]+clear\.d \[r12=r2-32767\]
|
||||
[ ]+564:[ ]+5f2d 0080 7c8e[ ]+clear\.d \[r12=r2-32768\]
|
||||
[ ]+56a:[ ]+6f2d ff7f ffff 7c8e[ ]+clear\.d \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+56a:[ ]+6f2d ff7f ffff 7c8e[ ]+clear\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+572:[ ]+6f2d ffff 0000 7c8e[ ]+clear\.d \[r12=r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+57a:[ ]+6f2d 0000 0100 7c8e[ ]+clear\.d \[r12=r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+582:[ ]+6f2d 2b3a 2900 7c8e[ ]+clear\.d \[r12=r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+58a:[ ]+6f2d d5c5 d6ff 7c8e[ ]+clear\.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+592:[ ]+6f2d d5c5 d6ff 7c8e[ ]+clear\.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+58a:[ ]+6f2d d5c5 d6ff 7c8e[ ]+clear\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+592:[ ]+6f2d d5c5 d6ff 7c8e[ ]+clear\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+59a:[ ]+6f2d 0000 0000 7c8e[ ]+clear\.d \[r12=r2\+0( <notstart>)?\]
|
||||
[ ]+59c:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+5a2:[ ]+7309 700a[ ]+clear\.b \[\[r3\]\]
|
||||
|
|
@ -319,5 +319,5 @@ Disassembly of section \.text:
|
|||
[ ]+5e2:[ ]+7f0d 0000 0000 708a[ ]+clear\.d \[(0x0|0 <notstart>)\]
|
||||
[ ]+5e4:[ ]+(R_CRIS_)?32[ ]+\.text
|
||||
|
||||
000005ea <end>:
|
||||
0+5ea <end>:
|
||||
\.\.\.
|
||||
|
|
|
|||
|
|
@ -5,6 +5,6 @@
|
|||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+e87b[ ]+move.d r7,\[r8\]
|
||||
[ ]+2:[ ]+e89b[ ]+move.d r9,\[r8\]
|
||||
|
|
|
|||
|
|
@ -3,25 +3,25 @@
|
|||
|
||||
.*: file format .*-cris
|
||||
Disassembly of section \.text:
|
||||
00000000 <l1-(0x)?100>:
|
||||
0+ <l1-(0x)?100>:
|
||||
[ ]+0:[ ]+fee0[ ]+ba[ ]+(0x[0]?100|100 <l1>)
|
||||
[ ]+2:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
[ ]+80:[ ]+e2e0[ ]+ba[ ]+(0x[0]?164|164 <l2>)
|
||||
^[ ]+82:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
00000100 <l1>:
|
||||
0+100 <l1>:
|
||||
^[ ]+\.\.\.
|
||||
00000164 <l2>:
|
||||
0+164 <l2>:
|
||||
[ ]+164:[ ]+ffed 0001[ ]+ba (0x[0]?268|268 <l3>)
|
||||
[ ]+168:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
[ ]+1e6:[ ]+ffed 6604[ ]+ba (0x[0]?650|650 <l4>)
|
||||
[ ]+1ea:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
00000268 <l3>:
|
||||
0+268 <l3>:
|
||||
^[ ]+\.\.\.
|
||||
00000650 <l4>:
|
||||
0+650 <l4>:
|
||||
[ ]+650:[ ]+ffed 0801[ ]+ba (0x[0]?75c|75c <l5>)
|
||||
[ ]+654:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
|
|
@ -32,9 +32,9 @@ Disassembly of section \.text:
|
|||
[ ]+6dc:[ ]+f9e0[ ]+ba[ ]+(0x[0]?6d6|6d6 <l4\+0x86>)
|
||||
[ ]+6de:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
0000075c <l5>:
|
||||
0+75c <l5>:
|
||||
^[ ]+\.\.\.
|
||||
00008844 <l6>:
|
||||
0+8844 <l6>:
|
||||
^[ ]+\.\.\.
|
||||
[ ]+88c0:[ ]+fee0[ ]+ba[ ]+(0x89c0|89c0 <l8>)
|
||||
[ ]+88c2:[ ]+0f05[ ]+nop[ ]*
|
||||
|
|
@ -43,7 +43,7 @@ Disassembly of section \.text:
|
|||
[ ]+8942:[ ]+01e0[ ]+ba[ ]+(0x8844|8844 <l6>)
|
||||
[ ]+8944:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
000089c0 <l8>:
|
||||
0+89c0 <l8>:
|
||||
^[ ]+\.\.\.
|
||||
[ ]+8a3c:[ ]+ffed 0201[ ]+ba (0x8b42|8b42 <l10>)
|
||||
[ ]+8a40:[ ]+0f05[ ]+nop[ ]*
|
||||
|
|
@ -52,7 +52,7 @@ Disassembly of section \.text:
|
|||
[ ]+8ac0:[ ]+ffed fcfe[ ]+ba (0x89c0|89c0 <l8>)
|
||||
[ ]+8ac4:[ ]+0f05[ ]+nop[ ]*
|
||||
^[ ]+\.\.\.
|
||||
00008b42 <l10>:
|
||||
0+8b42 <l10>:
|
||||
^[ ]+\.\.\.
|
||||
[ ]+8bbe:[ ]+0000[ ]+bcc[ ]+.*
|
||||
[ ]+8bc0:[ ]+ffed 0001[ ]+ba (0x8cc4|8cc4 <l12>)
|
||||
|
|
|
|||
|
|
@ -6,11 +6,11 @@
|
|||
.*:[ ]+file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
0: 0000[ ]+ bcc ( 0x2|\.\+2)
|
||||
\.\.\.
|
||||
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+@IM+b7b9@[ ]+@OC@[ ]+r7
|
||||
[ ]+6:[ ]+@IM+b6b9@[ ]+@OC@[ ]+r6
|
||||
[ ]+8:[ ]+@IM+30b9@[ ]+@OC@[ ]+\[r0\]
|
||||
|
|
@ -55,10 +55,10 @@ Disassembly of section \.text:
|
|||
[ ]+ac:[ ]+5f2d 68dd @IM+30b9@[ ]+@OC@[ ]+\[r2-8856\]
|
||||
[ ]+b2:[ ]+5f2d 9822 @IM+30b9@[ ]+@OC@[ ]+\[r2\+8856\]
|
||||
[ ]+b8:[ ]+6f2d ac72 2a00 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+c0:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+c8:[ ]+6f2d acce c09e @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+d0:[ ]+6f2d 5331 3f81 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+d8:[ ]+6f2d 5331 3f81 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+c0:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+c8:[ ]+6f2d acce c09e @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+d0:[ ]+6f2d 5331 3f81 @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+d8:[ ]+6f2d 5331 3f81 @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+e0:[ ]+6f2d b5af 982e @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+e8:[ ]+6f2d 2b45 941b @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+f0:[ ]+2a21 @IM+30b9@[ ]+@OC@[ ]+\[r2\+42\]
|
||||
|
|
@ -75,15 +75,15 @@ Disassembly of section \.text:
|
|||
[ ]+122:[ ]+6f2d 0180 0000 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+12a:[ ]+5f2d 0180 @IM+30b9@[ ]+@OC@[ ]+\[r2-32767\]
|
||||
[ ]+130:[ ]+5f2d 0080 @IM+30b9@[ ]+@OC@[ ]+\[r2-32768\]
|
||||
[ ]+136:[ ]+6f2d ff7f ffff @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+136:[ ]+6f2d ff7f ffff @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+13e:[ ]+5f2d 0180 @IM+30b9@[ ]+@OC@[ ]+\[r2-32767\]
|
||||
[ ]+144:[ ]+5f2d 0080 @IM+30b9@[ ]+@OC@[ ]+\[r2-32768\]
|
||||
[ ]+14a:[ ]+6f2d ff7f ffff @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+14a:[ ]+6f2d ff7f ffff @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+152:[ ]+6f2d ffff 0000 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+15a:[ ]+6f2d 0000 0100 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+162:[ ]+6f2d 2b3a 2900 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+16a:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+172:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+16a:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+172:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+17a:[ ]+6f2d 0000 0000 @IM+30b9@[ ]+@OC@[ ]+\[r2\+0( <notstart>)?\]
|
||||
[ ]+17c:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+182:[ ]+0021 @IM+30b9@[ ]+@OC@[ ]+\[r2\+0\]
|
||||
|
|
@ -106,10 +106,10 @@ Disassembly of section \.text:
|
|||
[ ]+1d6:[ ]+5f2d 68dd @IM+30b9@[ ]+@OC@[ ]+\[r2-8856\]
|
||||
[ ]+1dc:[ ]+5f2d 9822 @IM+30b9@[ ]+@OC@[ ]+\[r2\+8856\]
|
||||
[ ]+1e2:[ ]+6f2d ac72 2a00 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+1ea:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+1f2:[ ]+6f2d acce c09e @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+1fa:[ ]+6f2d 5331 3f81 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+202:[ ]+6f2d 5331 3f81 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+1ea:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+1f2:[ ]+6f2d acce c09e @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+1fa:[ ]+6f2d 5331 3f81 @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+202:[ ]+6f2d 5331 3f81 @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+20a:[ ]+6f2d b5af 982e @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+212:[ ]+6f2d 2b45 941b @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+21a:[ ]+2a21 @IM+30b9@[ ]+@OC@[ ]+\[r2\+42\]
|
||||
|
|
@ -126,15 +126,15 @@ Disassembly of section \.text:
|
|||
[ ]+24c:[ ]+6f2d 0180 0000 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+254:[ ]+5f2d 0180 @IM+30b9@[ ]+@OC@[ ]+\[r2-32767\]
|
||||
[ ]+25a:[ ]+5f2d 0080 @IM+30b9@[ ]+@OC@[ ]+\[r2-32768\]
|
||||
[ ]+260:[ ]+6f2d ff7f ffff @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+260:[ ]+6f2d ff7f ffff @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+268:[ ]+5f2d 0180 @IM+30b9@[ ]+@OC@[ ]+\[r2-32767\]
|
||||
[ ]+26e:[ ]+5f2d 0080 @IM+30b9@[ ]+@OC@[ ]+\[r2-32768\]
|
||||
[ ]+274:[ ]+6f2d ff7f ffff @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+274:[ ]+6f2d ff7f ffff @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+27c:[ ]+6f2d ffff 0000 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+284:[ ]+6f2d 0000 0100 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+28c:[ ]+6f2d 2b3a 2900 @IM+30b9@[ ]+@OC@[ ]+\[r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+294:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+29c:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+294:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+29c:[ ]+6f2d d5c5 d6ff @IM+30b9@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+2a4:[ ]+6f2d 0000 0000 @IM+30b9@[ ]+@OC@[ ]+\[r2\+0( <notstart>)?\]
|
||||
[ ]+2a6:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+2ac:[ ]+4235 @IM+31bd@[ ]+@OC@[ ]+\[r1=r2\+r3\.b\]
|
||||
|
|
@ -175,10 +175,10 @@ Disassembly of section \.text:
|
|||
[ ]+348:[ ]+5f2d 68dd @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2-8856\]
|
||||
[ ]+34e:[ ]+5f2d 9822 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+8856\]
|
||||
[ ]+354:[ ]+6f2d ac72 2a00 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+35c:[ ]+6f2d d5c5 d6ff @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+364:[ ]+6f2d acce c09e @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+36c:[ ]+6f2d 5331 3f81 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+374:[ ]+6f2d 5331 3f81 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+35c:[ ]+6f2d d5c5 d6ff @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+364:[ ]+6f2d acce c09e @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+36c:[ ]+6f2d 5331 3f81 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+374:[ ]+6f2d 5331 3f81 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+37c:[ ]+6f2d b5af 982e @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+384:[ ]+6f2d 2b45 941b @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+38c:[ ]+2a21 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+42\]
|
||||
|
|
@ -195,15 +195,15 @@ Disassembly of section \.text:
|
|||
[ ]+3be:[ ]+6f2d 0180 0000 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+3c6:[ ]+5f2d 0180 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2-32767\]
|
||||
[ ]+3cc:[ ]+5f2d 0080 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2-32768\]
|
||||
[ ]+3d2:[ ]+6f2d ff7f ffff @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+3d2:[ ]+6f2d ff7f ffff @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+3da:[ ]+5f2d 0180 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2-32767\]
|
||||
[ ]+3e0:[ ]+5f2d 0080 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2-32768\]
|
||||
[ ]+3e6:[ ]+6f2d ff7f ffff @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+3e6:[ ]+6f2d ff7f ffff @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+3ee:[ ]+6f2d ffff 0000 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+3f6:[ ]+6f2d 0000 0100 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+3fe:[ ]+6f2d 2b3a 2900 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+406:[ ]+6f2d d5c5 d6ff @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+40e:[ ]+6f2d d5c5 d6ff @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+406:[ ]+6f2d d5c5 d6ff @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+40e:[ ]+6f2d d5c5 d6ff @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+416:[ ]+6f2d 0000 0000 @IM+3cbd@[ ]+@OC@[ ]+\[r12=r2\+0( <notstart>)?\]
|
||||
[ ]+418:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+41e:[ ]+7209 @IM+30b9@[ ]+@OC@[ ]+\[\[r2\]\]
|
||||
|
|
@ -215,5 +215,5 @@ Disassembly of section \.text:
|
|||
[ ]+436:[ ]+7f0d 0000 0000 @IM+30b9@[ ]+@OC@[ ]+\[(0x0|0 <notstart>)\]
|
||||
[ ]+438:[ ]+(R_CRIS_)?32[ ]+\.text
|
||||
|
||||
0000043e <end>:
|
||||
0+43e <end>:
|
||||
\.\.\.
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+6f4e 0600 0000[ ]+move.d 6 <start\+0x6>,r4
|
||||
[ ]+2:[ ]+(R_CRIS_)?32[ ]+\.text\+0x6
|
||||
[ ]+6:[ ]+ef4e 0600 0000[ ]+cmp\.d 6 <start\+0x6>,r4
|
||||
|
|
|
|||
|
|
@ -5,10 +5,10 @@
|
|||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+ef0e 0500 0000[ ]+cmp.d 0x5,r0
|
||||
[ ]+6:[ ]+0230[ ]+beq 0xa
|
||||
[ ]+8:[ ]+0f05[ ]+nop
|
||||
[ ]+8:[ ]+0f05[ ]+nop[ ]*
|
||||
|
||||
0000000a <test_gr00000>:
|
||||
[ ]+a:[ ]+0f05[ ]+nop
|
||||
0+a <test_gr00000>:
|
||||
[ ]+a:[ ]+0f05[ ]+nop[ ]*
|
||||
|
|
|
|||
|
|
@ -6,11 +6,11 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
[ ]+0: 0000[ ]+ bcc ( 0x2|\.\+2)
|
||||
\.\.\.
|
||||
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+b5db[ ]+movem[ ]+\[r5\],r13
|
||||
[ ]+6:[ ]+ba1b[ ]+movem[ ]+\[r10\],r1
|
||||
[ ]+8:[ ]+b5df[ ]+movem[ ]+\[r5\+\],r13
|
||||
|
|
@ -51,10 +51,10 @@ Disassembly of section \.text:
|
|||
[ ]+a0:[ ]+5f2d 68dd b11b[ ]+movem[ ]+\[r2-8856\],r1
|
||||
[ ]+a6:[ ]+5f2d 9822 b11b[ ]+movem[ ]+\[r2\+8856\],r1
|
||||
[ ]+ac:[ ]+6f2d ac72 2a00 b11b[ ]+movem[ ]+\[r2\+(2781868|2a72ac <two701867\+0x13881>)\],r1
|
||||
[ ]+b4:[ ]+6f2d d5c5 d6ff b11b[ ]+movem[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r1
|
||||
[ ]+bc:[ ]+6f2d acce c09e b11b[ ]+movem[ ]+\[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\],r1
|
||||
[ ]+c4:[ ]+6f2d 5331 3f81 b11b[ ]+movem[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
|
||||
[ ]+cc:[ ]+6f2d 5331 3f81 b11b[ ]+movem[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
|
||||
[ ]+b4:[ ]+6f2d d5c5 d6ff b11b[ ]+movem[ ]+\[r2\+[^]]+\],r1
|
||||
[ ]+bc:[ ]+6f2d acce c09e b11b[ ]+movem[ ]+\[r2\+[^]]+\],r1
|
||||
[ ]+c4:[ ]+6f2d 5331 3f81 b11b[ ]+movem[ ]+\[r2\+[^]]+\],r1
|
||||
[ ]+cc:[ ]+6f2d 5331 3f81 b11b[ ]+movem[ ]+\[r2\+[^]]+\],r1
|
||||
[ ]+d4:[ ]+6f2d b5af 982e b11b[ ]+movem[ ]+\[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\],r1
|
||||
[ ]+dc:[ ]+6f2d 2b45 941b b11b[ ]+movem[ ]+\[r2\+(0x1b94452b|1b94452b <const_int_32>)\],r1
|
||||
[ ]+e4:[ ]+2a21 bddb[ ]+movem[ ]+\[r2\+42\],r13
|
||||
|
|
@ -71,15 +71,15 @@ Disassembly of section \.text:
|
|||
[ ]+116:[ ]+6f2d 0180 0000 b55b[ ]+movem[ ]+\[r2\+(32769|8001 <three2767\+0x2>)\],r5
|
||||
[ ]+11e:[ ]+5f2d 0180 b55b[ ]+movem[ ]+\[r2-32767\],r5
|
||||
[ ]+124:[ ]+5f2d 0080 bddb[ ]+movem[ ]+\[r2-32768\],r13
|
||||
[ ]+12a:[ ]+6f2d ff7f ffff bddb[ ]+movem[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
|
||||
[ ]+12a:[ ]+6f2d ff7f ffff bddb[ ]+movem[ ]+\[r2\+[^]]+\],r13
|
||||
[ ]+132:[ ]+5f2d 0180 b55b[ ]+movem[ ]+\[r2-32767\],r5
|
||||
[ ]+138:[ ]+5f2d 0080 bddb[ ]+movem[ ]+\[r2-32768\],r13
|
||||
[ ]+13e:[ ]+6f2d ff7f ffff bddb[ ]+movem[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
|
||||
[ ]+13e:[ ]+6f2d ff7f ffff bddb[ ]+movem[ ]+\[r2\+[^]]+\],r13
|
||||
[ ]+146:[ ]+6f2d ffff 0000 b55b[ ]+movem[ ]+\[r2\+(65535|ffff <six5535>)\],r5
|
||||
[ ]+14e:[ ]+6f2d 0000 0100 bddb[ ]+movem[ ]+\[r2\+(65536|10000 <six5535\+0x1>)\],r13
|
||||
[ ]+156:[ ]+6f2d 2b3a 2900 b55b[ ]+movem[ ]+\[r2\+(2701867|293a2b <two701867>)\],r5
|
||||
[ ]+15e:[ ]+6f2d d5c5 d6ff b55b[ ]+movem[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
|
||||
[ ]+166:[ ]+6f2d d5c5 d6ff b55b[ ]+movem[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
|
||||
[ ]+15e:[ ]+6f2d d5c5 d6ff b55b[ ]+movem[ ]+\[r2\+[^]]+\],r5
|
||||
[ ]+166:[ ]+6f2d d5c5 d6ff b55b[ ]+movem[ ]+\[r2\+[^]]+\],r5
|
||||
[ ]+16e:[ ]+6f2d 0000 0000 b55b[ ]+movem[ ]+\[r2\+0( <notstart>)?\],r5
|
||||
[ ]+170:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+176:[ ]+4255 bcdf[ ]+movem[ ]+\[r12=r2\+r5\.b\],r13
|
||||
|
|
@ -120,10 +120,10 @@ Disassembly of section \.text:
|
|||
[ ]+212:[ ]+5f2d 68dd bc1f[ ]+movem[ ]+\[r12=r2-8856\],r1
|
||||
[ ]+218:[ ]+5f2d 9822 bc1f[ ]+movem[ ]+\[r12=r2\+8856\],r1
|
||||
[ ]+21e:[ ]+6f2d ac72 2a00 bc1f[ ]+movem[ ]+\[r12=r2\+(2781868|2a72ac <two701867\+0x13881>)\],r1
|
||||
[ ]+226:[ ]+6f2d d5c5 d6ff bc1f[ ]+movem[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r1
|
||||
[ ]+22e:[ ]+6f2d acce c09e bc1f[ ]+movem[ ]+\[r12=r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\],r1
|
||||
[ ]+236:[ ]+6f2d 5331 3f81 bc1f[ ]+movem[ ]+\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
|
||||
[ ]+23e:[ ]+6f2d 5331 3f81 bc1f[ ]+movem[ ]+\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],r1
|
||||
[ ]+226:[ ]+6f2d d5c5 d6ff bc1f[ ]+movem[ ]+\[r12=r2\+[^]]+\],r1
|
||||
[ ]+22e:[ ]+6f2d acce c09e bc1f[ ]+movem[ ]+\[r12=r2\+[^]]+\],r1
|
||||
[ ]+236:[ ]+6f2d 5331 3f81 bc1f[ ]+movem[ ]+\[r12=r2\+[^]]+\],r1
|
||||
[ ]+23e:[ ]+6f2d 5331 3f81 bc1f[ ]+movem[ ]+\[r12=r2\+[^]]+\],r1
|
||||
[ ]+246:[ ]+6f2d b5af 982e bc1f[ ]+movem[ ]+\[r12=r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\],r1
|
||||
[ ]+24e:[ ]+6f2d 2b45 941b bc1f[ ]+movem[ ]+\[r12=r2\+(0x1b94452b|1b94452b <const_int_32>)\],r1
|
||||
[ ]+256:[ ]+2a21 bcdf[ ]+movem[ ]+\[r12=r2\+42\],r13
|
||||
|
|
@ -140,15 +140,15 @@ Disassembly of section \.text:
|
|||
[ ]+288:[ ]+6f2d 0180 0000 bc5f[ ]+movem[ ]+\[r12=r2\+(32769|8001 <three2767\+0x2>)\],r5
|
||||
[ ]+290:[ ]+5f2d 0180 bc5f[ ]+movem[ ]+\[r12=r2-32767\],r5
|
||||
[ ]+296:[ ]+5f2d 0080 bcdf[ ]+movem[ ]+\[r12=r2-32768\],r13
|
||||
[ ]+29c:[ ]+6f2d ff7f ffff bcdf[ ]+movem[ ]+\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
|
||||
[ ]+29c:[ ]+6f2d ff7f ffff bcdf[ ]+movem[ ]+\[r12=r2\+[^]]+\],r13
|
||||
[ ]+2a4:[ ]+5f2d 0180 bc5f[ ]+movem[ ]+\[r12=r2-32767\],r5
|
||||
[ ]+2aa:[ ]+5f2d 0080 bcdf[ ]+movem[ ]+\[r12=r2-32768\],r13
|
||||
[ ]+2b0:[ ]+6f2d ff7f ffff bcdf[ ]+movem[ ]+\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],r13
|
||||
[ ]+2b0:[ ]+6f2d ff7f ffff bcdf[ ]+movem[ ]+\[r12=r2\+[^]]+\],r13
|
||||
[ ]+2b8:[ ]+6f2d ffff 0000 bc5f[ ]+movem[ ]+\[r12=r2\+(65535|ffff <six5535>)\],r5
|
||||
[ ]+2c0:[ ]+6f2d 0000 0100 bcdf[ ]+movem[ ]+\[r12=r2\+(65536|10000 <six5535\+0x1>)\],r13
|
||||
[ ]+2c8:[ ]+6f2d 2b3a 2900 bc5f[ ]+movem[ ]+\[r12=r2\+(2701867|293a2b <two701867>)\],r5
|
||||
[ ]+2d0:[ ]+6f2d d5c5 d6ff bc5f[ ]+movem[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
|
||||
[ ]+2d8:[ ]+6f2d d5c5 d6ff bc5f[ ]+movem[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],r5
|
||||
[ ]+2d0:[ ]+6f2d d5c5 d6ff bc5f[ ]+movem[ ]+\[r12=r2\+[^]]+\],r5
|
||||
[ ]+2d8:[ ]+6f2d d5c5 d6ff bc5f[ ]+movem[ ]+\[r12=r2\+[^]]+\],r5
|
||||
[ ]+2e0:[ ]+6f2d 0000 0000 bc5f[ ]+movem[ ]+\[r12=r2\+0( <notstart>)?\],r5
|
||||
[ ]+2e2:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+2e8:[ ]+7209 b44b[ ]+movem[ ]+\[\[r2\]\],r4
|
||||
|
|
|
|||
|
|
@ -5,6 +5,6 @@
|
|||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+4022[ ]+moveq[ ]+0,r2
|
||||
[ ]+2:[ ]+f025[ ]+di[ ]*
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+@IR+7187@[ ]+@OR@[ ]+r1
|
||||
[ ]+2:[ ]+@IR+7087@[ ]+@OR@[ ]+r0
|
||||
[ ]+4:[ ]+@IR+7087@[ ]+@OR@[ ]+r0
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+0001 454a[ ]+move\.b \[r0\+0\],r4
|
||||
[ ]+4:[ ]+0031 564e[ ]+move\.w \[r6=r3\+0\],r4
|
||||
[ ]+8:[ ]+ff11 454a[ ]+move\.b \[r1-1\],r4
|
||||
|
|
@ -29,18 +29,18 @@ Disassembly of section \.text:
|
|||
[ ]+6e:[ ]+5f6d ff7f 555e[ ]+move\.w \[r5=r6\+32767\],r5
|
||||
[ ]+74:[ ]+6f4d 0000 0000 679e[ ]+move\.d \[r7=r4\+0( <start>)?\],r9
|
||||
[ ]+7c:[ ]+6f5d 0100 0000 454a[ ]+move\.b \[r5\+1( <start\+0x1>)?\],r4
|
||||
[ ]+84:[ ]+6f6d ffff ffff 679e[ ]+move\.d \[r7=r6\+(0xffffffff|ffffffff <end\+0xfffffe33>)\],r9
|
||||
[ ]+8c:[ ]+6f6d 80ff ffff 679a[ ]+move\.d \[r6\+(0xffffff80|ffffff80 <end\+0xfffffdb4>)\],r9
|
||||
[ ]+84:[ ]+6f6d ffff ffff 679e[ ]+move\.d \[r7=r6\+[^]]+\],r9
|
||||
[ ]+8c:[ ]+6f6d 80ff ffff 679a[ ]+move\.d \[r6\+[^]]+\],r9
|
||||
[ ]+94:[ ]+6f6d 7f00 0000 564e[ ]+move\.w \[r6=r6\+(127|7f <start\+0x7f>)\],r4
|
||||
[ ]+9c:[ ]+6f6d 7fff ffff 679a[ ]+move\.d \[r6\+(0xffffff7f|ffffff7f <end\+0xfffffdb3>)\],r9
|
||||
[ ]+9c:[ ]+6f6d 7fff ffff 679a[ ]+move\.d \[r6\+[^]]+\],r9
|
||||
[ ]+a4:[ ]+6f6d 8000 0000 679a[ ]+move\.d \[r6\+(128|80 <start\+0x80>)\],r9
|
||||
[ ]+ac:[ ]+6f6d 0080 ffff 454a[ ]+move\.b \[r6\+(0xffff8000|ffff8000 <end\+0xffff7e34>)\],r4
|
||||
[ ]+ac:[ ]+6f6d 0080 ffff 454a[ ]+move\.b \[r6\+[^]]+\],r4
|
||||
[ ]+b4:[ ]+6f6d ff7f 0000 555e[ ]+move\.w \[r5=r6\+(32767|7fff <end\+0x7e33>)\],r5
|
||||
[ ]+bc:[ ]+6f6d ff7f ffff 564e[ ]+move\.w \[r6=r6\+(0xffff7fff|ffff7fff <end\+0xffff7e33>)\],r4
|
||||
[ ]+bc:[ ]+6f6d ff7f ffff 564e[ ]+move\.w \[r6=r6\+[^]]+\],r4
|
||||
[ ]+c4:[ ]+6f6d 0080 0000 564a[ ]+move\.w \[r6\+(32768|8000 <end\+0x7e34>)\],r4
|
||||
[ ]+cc:[ ]+6f6d 0000 fbff 454a[ ]+move\.b \[r6\+(0xfffb0000|fffb0000 <end\+0xfffafe34>)\],r4
|
||||
[ ]+cc:[ ]+6f6d 0000 fbff 454a[ ]+move\.b \[r6\+[^]]+\],r4
|
||||
[ ]+d4:[ ]+6f6d f5ad 4701 555e[ ]+move\.w \[r5=r6\+(0x[0]?147adf5|147adf5 <end\+0x147ac29>)\],r5
|
||||
[ ]+dc:[ ]+6f6d 0000 0080 679a[ ]+move\.d \[r6\+(0x80000000|80000000 <end\+0x7ffffe34>)\],r9
|
||||
[ ]+dc:[ ]+6f6d 0000 0080 679a[ ]+move\.d \[r6\+[^]]+\],r9
|
||||
[ ]+e4:[ ]+6f6d ffff ff7f 454a[ ]+move\.b \[r6\+(0x7fffffff|7fffffff <end\+0x7ffffe33>)\],r4
|
||||
[ ]+ec:[ ]+6f6d 0000 0000 555e[ ]+move\.w \[r5=r6\+0( <start>)?\],r5
|
||||
[ ]+ee:[ ]+(R_CRIS_)?32[ ]+external_symbol
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*:[ ]+file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+ffe1 @IM+7e0e@[ ]+push[ ]+[a-z].*
|
||||
[ ]+4:[ ]+ffe1 @IM+7e0e@[ ]+push[ ]+[a-z].*
|
||||
[ ]+8:[ ]+ffe1 @IM+7e0e@[ ]+push[ ]+[a-z].*
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
^[ ]+0:[ ]+fce1 @IM+7e0e@[ ]+push[ ]+[a-z].*
|
||||
^[ ]+4:[ ]+fce1 @IM+7e0e@[ ]+push[ ]+[a-z].*
|
||||
^[ ]+8:[ ]+fce1 @IM+7e0e@[ ]+push[ ]+[a-z].*
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
^[ ]+0:[ ]+fee1 @IM+7e0e@[ ]+push[ ]+[a-z].*
|
||||
^[ ]+4:[ ]+fee1 @IM+7e0e@[ ]+push[ ]+[a-z].*
|
||||
^[ ]+8:[ ]+fee1 @IM+7e0e@[ ]+push[ ]+[a-z].*
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*:[ ]+file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+fce1 ee1f[ ]+push[ ]+r1
|
||||
[ ]+4:[ ]+fce1 ee0f[ ]+push[ ]+r0
|
||||
[ ]+8:[ ]+fce1 ee4f[ ]+push[ ]+r4
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+@IR+5632@[ ]+@OC@[ ]+22,r3
|
||||
[ ]+2:[ ]+@IR+4b52@[ ]+@OC@[ ]+11,r5
|
||||
[ ]+4:[ ]+@IR+40a2@[ ]+@OC@[ ]+0,r10
|
||||
|
|
@ -15,7 +15,7 @@ Disassembly of section \.text:
|
|||
[ ]+a:[ ]+@IR+40b2@[ ]+@OC@[ ]+0,r11
|
||||
[ ]+c:[ ]+@IR+4ab2@[ ]+@OC@[ ]+10,r11
|
||||
[ ]+e:[ ]+@IR+40c2@[ ]+@OC@[ ]+0,r12
|
||||
00000010 <signed6>:
|
||||
0+10 <signed6>:
|
||||
[ ]+10:[ ]+@IR+6132@[ ]+@OC@[ ]+-31,r3
|
||||
[ ]+12:[ ]+@IR+6a32@[ ]+@OC@[ ]+-22,r3
|
||||
[ ]+14:[ ]+@IR+6232@[ ]+@OC@[ ]+-30,r3
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+@IR+9633@[ ]+@OC@[ ]+22,r3
|
||||
[ ]+2:[ ]+@IR+8b53@[ ]+@OC@[ ]+11,r5
|
||||
[ ]+4:[ ]+@IR+80a3@[ ]+@OC@[ ]+0,r10
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+@IR+1632@[ ]+@OC@[ ]+22,r3
|
||||
[ ]+2:[ ]+@IR+0b52@[ ]+@OC@[ ]+11,r5
|
||||
[ ]+4:[ ]+@IR+00a2@[ ]+@OC@[ ]+0,r10
|
||||
|
|
@ -15,7 +15,7 @@ Disassembly of section \.text:
|
|||
[ ]+a:[ ]+@IR+00b2@[ ]+@OC@[ ]+0,r11
|
||||
[ ]+c:[ ]+@IR+0ab2@[ ]+@OC@[ ]+10,r11
|
||||
[ ]+e:[ ]+@IR+00c2@[ ]+@OC@[ ]+0,r12
|
||||
00000010 <unsigned6>:
|
||||
0+10 <unsigned6>:
|
||||
[ ]+10:[ ]+@IR+2c32@[ ]+@OC@[ ]+44,r3
|
||||
[ ]+12:[ ]+@IR+3952@[ ]+@OC@[ ]+57,r5
|
||||
[ ]+14:[ ]+@IR+00a2@[ ]+@OC@[ ]+0,r10
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@ start:
|
|||
movs.b -129,r0 ; { dg-error "Immediate value not in 8 bit range: -129" }
|
||||
movs.b 128,r0 ; { dg-error "Immediate value not in 8 bit range: 128" "" { xfail *-*-* } }
|
||||
movs.b -32769,r0 ; { dg-error "Immediate value not in (8|16) bit range: -32769" }
|
||||
movs.b 0xffffffff,r0 ; { dg-error "Immediate value not in 8 bit range: 4294967295" "" { xfail *-*-* } }
|
||||
movs.b 0xffffffff,r0 ; { dg-error "Immediate value not in (8|16) bit range: (4294967295|-1)" "" { xfail *-*-* } }
|
||||
|
||||
movs.w 32768,r0 ; { dg-error "Immediate value not in 16 bit range: 32768" "" { xfail *-*-* } }
|
||||
movs.w 0x8000,r0 ; { dg-error "Immediate value not in 16 bit range: 32768" "" { xfail *-*-* } }
|
||||
|
|
@ -34,7 +34,7 @@ start:
|
|||
movs.w -32769,r0 ; { dg-error "Immediate value not in 16 bit range: -32769" }
|
||||
movs.w 65536,r0 ; { dg-error "Immediate value not in 16 bit range: 65536" }
|
||||
movs.w -32769,r0 ; { dg-error "Immediate value not in 16 bit range: -32769" }
|
||||
movs.w 0xffffffff,r0 ; { dg-error "Immediate value not in 16 bit range: 4294967295" "" { xfail *-*-* } }
|
||||
movs.w 0xffffffff,r0 ; { dg-error "Immediate value not in 16 bit range: (4294967295|-1)" "" { xfail *-*-* } }
|
||||
|
||||
movu.b 256,r0 ; { dg-error "Immediate value not in 8 bit range: 256" }
|
||||
movu.b 0x100,r0 ; { dg-error "Immediate value not in 8 bit range: 256" }
|
||||
|
|
@ -46,7 +46,7 @@ start:
|
|||
movu.w 65536,r0 ; { dg-error "Immediate value not in 16 bit range: 65536" }
|
||||
movu.w -32769,r0 ; { dg-error "Immediate value not in 16 bit range: -32769" }
|
||||
movu.w -1,r0 ; { dg-error "Immediate value not in 16 bit unsigned range: -1" "" { xfail *-*-* } }
|
||||
movu.w 0xffffffff,r0 ; { dg-error "Immediate value not in 16 bit unsigned range: 4294967295" "" { xfail *-*-* } }
|
||||
movu.w 0xffffffff,r0 ; { dg-error "Immediate value not in 16 bit (unsigned )?range: (4294967295|-1)" "" { xfail *-*-* } }
|
||||
|
||||
add.b -129,r5 ; { dg-error "Immediate value not in 8 bit range: -129" }
|
||||
add.b -255,r5 ; { dg-error "Immediate value not in 8 bit range: -255" }
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+af1e 0000 0000[ ]+sub\.d 0 <start>,r1
|
||||
[ ]+2:[ ]+R_CRIS_32_GOTREL \.text
|
||||
[ ]+6:[ ]+6f3d 0000 0000 6aaa[ ]+move\.d \[r3\+0 <start>\],r10
|
||||
|
|
@ -28,31 +28,31 @@ Disassembly of section \.text:
|
|||
[ ]+3a:[ ]+af9e 0000 0000[ ]+sub\.d 0 <start>,r9
|
||||
[ ]+3c:[ ]+R_CRIS_32_GOTREL extsym4\+0x2a
|
||||
[ ]+40:[ ]+af3e 0000 0000[ ]+sub\.d 0 <start>,r3
|
||||
[ ]+42:[ ]+R_CRIS_32_GOTREL extsym4\+0xffffffa0
|
||||
[ ]+42:[ ]+R_CRIS_32_GOTREL extsym4\+0x[f]+fffffa0
|
||||
[ ]+46:[ ]+6fad 0000 0000 287a[ ]+add\.d \[r10\+0 <start>\],r7,r8
|
||||
[ ]+48:[ ]+R_CRIS_32_GOT extsym3\+0x38
|
||||
[ ]+4e:[ ]+6f5d 0000 0000 611a[ ]+move\.d \[r5\+0 <start>\],r1
|
||||
[ ]+50:[ ]+R_CRIS_32_GOT extsym6\+0xa
|
||||
[ ]+56:[ ]+6fad 0000 0000 284a[ ]+add\.d \[r10\+0 <start>\],r4,r8
|
||||
[ ]+58:[ ]+R_CRIS_32_GOT extsym3\+0xfffffdd0
|
||||
[ ]+58:[ ]+R_CRIS_32_GOT extsym3\+0x[f]+ffffdd0
|
||||
[ ]+5e:[ ]+6f5d 0000 0000 6cca[ ]+move\.d \[r5\+0 <start>\],r12
|
||||
[ ]+60:[ ]+R_CRIS_32_GOT extsym6\+0xffffff92
|
||||
[ ]+60:[ ]+R_CRIS_32_GOT extsym6\+0x[f]+fffff92
|
||||
[ ]+66:[ ]+6f5d 0000 0000 69ce[ ]+move\.d \[r9=r5\+0 <start>\],r12
|
||||
[ ]+68:[ ]+R_CRIS_32_GOT extsym6\+0xffffff24
|
||||
[ ]+68:[ ]+R_CRIS_32_GOT extsym6\+0x[f]+fffff24
|
||||
[ ]+6e:[ ]+6f3d 0000 0000 67de[ ]+move\.d \[r7=r3\+0 <start>\],r13
|
||||
[ ]+70:[ ]+R_CRIS_32_GOTREL extsym10\+0xfffffeb6
|
||||
[ ]+70:[ ]+R_CRIS_32_GOTREL extsym10\+0x[f]+ffffeb6
|
||||
[ ]+76:[ ]+6f5e 0000 0000[ ]+move\.d 0 <start>,r5
|
||||
[ ]+78:[ ]+R_CRIS_32_PLT_PCREL extsym7\+0x4
|
||||
[ ]+7c:[ ]+6f9e 0000 0000[ ]+move\.d 0 <start>,r9
|
||||
[ ]+7e:[ ]+R_CRIS_32_PLT_PCREL extsym7\+0xffffffd8
|
||||
[ ]+7e:[ ]+R_CRIS_32_PLT_PCREL extsym7\+0x[f]+fffffd8
|
||||
[ ]+82:[ ]+6f5e 0000 0000[ ]+move\.d 0 <start>,r5
|
||||
[ ]+84:[ ]+R_CRIS_32_PLT_GOTREL extsym11\+0x10
|
||||
[ ]+88:[ ]+6f9e 0000 0000[ ]+move\.d 0 <start>,r9
|
||||
[ ]+8a:[ ]+R_CRIS_32_PLT_GOTREL extsym12\+0xffffffc4
|
||||
[ ]+8a:[ ]+R_CRIS_32_PLT_GOTREL extsym12\+0x[f]+fffffc4
|
||||
[ ]+8e:[ ]+5fcd 0000 a89a[ ]+sub\.d \[r12\+0\],r9,r8
|
||||
[ ]+90:[ ]+R_CRIS_16_GOT extsym3\+0xffffff64
|
||||
[ ]+90:[ ]+R_CRIS_16_GOT extsym3\+0x[f]+fffff64
|
||||
[ ]+94:[ ]+5fbd 0000 699a[ ]+move\.d \[r11\+0\],r9
|
||||
[ ]+96:[ ]+R_CRIS_16_GOTPLT extsym14\+0xffffff00
|
||||
[ ]+96:[ ]+R_CRIS_16_GOTPLT extsym14\+0x[f]+fffff00
|
||||
[ ]+9a:[ ]+6fad 0000 0000 287a[ ]+add\.d \[r10\+0 <start>\],r7,r8
|
||||
[ ]+9c:[ ]+R_CRIS_32_GOTPLT extsym3\+0x38
|
||||
[ ]+\.\.\.
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
|
||||
.*:[ ]+file format .*-cris
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+6556[ ]+test\.d[ ]+r5
|
||||
[ ]+2:[ ]+3496[ ]+move[ ]+r4,ibr
|
||||
[ ]+4:[ ]+01a1 e44b[ ]+move\.d[ ]+r4,\[r10\+1\]
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@
|
|||
|
||||
.*:[ ]+file format elf32-cris
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+6f5e 0000 0000[ ]+move\.d[ ]+0[ ]+<start>,\$r5
|
||||
[ ]+2:[ ]+(R_CRIS_)?32[ ]+r5
|
||||
[ ]+6:[ ]+3f9e 0000 0000[ ]+move[ ]+0[ ]+<start>,\$ibr
|
||||
|
|
|
|||
|
|
@ -6,11 +6,11 @@
|
|||
.*:[ ]+file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
[ ]+0: 0000[ ]+ bcc ( 0x2|\.\+2)
|
||||
\.\.\.
|
||||
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+@IM+c5db@[ ]+@OC@[ ]+r13,\[r5\]
|
||||
[ ]+6:[ ]+@IM+ca1b@[ ]+@OC@[ ]+r1,\[r10\]
|
||||
[ ]+8:[ ]+@IM+c5df@[ ]+@OC@[ ]+r13,\[r5\+\]
|
||||
|
|
@ -51,10 +51,10 @@ Disassembly of section \.text:
|
|||
[ ]+a0:[ ]+5f2d 68dd @IM+c11b@[ ]+@OC@[ ]+r1,\[r2-8856\]
|
||||
[ ]+a6:[ ]+5f2d 9822 @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+8856\]
|
||||
[ ]+ac:[ ]+6f2d ac72 2a00 @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+b4:[ ]+6f2d d5c5 d6ff @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+bc:[ ]+6f2d acce c09e @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+c4:[ ]+6f2d 5331 3f81 @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+cc:[ ]+6f2d 5331 3f81 @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+b4:[ ]+6f2d d5c5 d6ff @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+[^]]+\]
|
||||
[ ]+bc:[ ]+6f2d acce c09e @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+[^]]+\]
|
||||
[ ]+c4:[ ]+6f2d 5331 3f81 @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+[^]]+\]
|
||||
[ ]+cc:[ ]+6f2d 5331 3f81 @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+[^]]+\]
|
||||
[ ]+d4:[ ]+6f2d b5af 982e @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+dc:[ ]+6f2d 2b45 941b @IM+c11b@[ ]+@OC@[ ]+r1,\[r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+e4:[ ]+2a21 @IM+cddb@[ ]+@OC@[ ]+r13,\[r2\+42\]
|
||||
|
|
@ -71,15 +71,15 @@ Disassembly of section \.text:
|
|||
[ ]+116:[ ]+6f2d 0180 0000 @IM+c55b@[ ]+@OC@[ ]+r5,\[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+11e:[ ]+5f2d 0180 @IM+c55b@[ ]+@OC@[ ]+r5,\[r2-32767\]
|
||||
[ ]+124:[ ]+5f2d 0080 @IM+cddb@[ ]+@OC@[ ]+r13,\[r2-32768\]
|
||||
[ ]+12a:[ ]+6f2d ff7f ffff @IM+cddb@[ ]+@OC@[ ]+r13,\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+12a:[ ]+6f2d ff7f ffff @IM+cddb@[ ]+@OC@[ ]+r13,\[r2\+[^]]+\]
|
||||
[ ]+132:[ ]+5f2d 0180 @IM+c55b@[ ]+@OC@[ ]+r5,\[r2-32767\]
|
||||
[ ]+138:[ ]+5f2d 0080 @IM+cddb@[ ]+@OC@[ ]+r13,\[r2-32768\]
|
||||
[ ]+13e:[ ]+6f2d ff7f ffff @IM+cddb@[ ]+@OC@[ ]+r13,\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+13e:[ ]+6f2d ff7f ffff @IM+cddb@[ ]+@OC@[ ]+r13,\[r2\+[^]]+\]
|
||||
[ ]+146:[ ]+6f2d ffff 0000 @IM+c55b@[ ]+@OC@[ ]+r5,\[r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+14e:[ ]+6f2d 0000 0100 @IM+cddb@[ ]+@OC@[ ]+r13,\[r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+156:[ ]+6f2d 2b3a 2900 @IM+c55b@[ ]+@OC@[ ]+r5,\[r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+15e:[ ]+6f2d d5c5 d6ff @IM+c55b@[ ]+@OC@[ ]+r5,\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+166:[ ]+6f2d d5c5 d6ff @IM+c55b@[ ]+@OC@[ ]+r5,\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+15e:[ ]+6f2d d5c5 d6ff @IM+c55b@[ ]+@OC@[ ]+r5,\[r2\+[^]]+\]
|
||||
[ ]+166:[ ]+6f2d d5c5 d6ff @IM+c55b@[ ]+@OC@[ ]+r5,\[r2\+[^]]+\]
|
||||
[ ]+16e:[ ]+6f2d 0000 0000 @IM+c55b@[ ]+@OC@[ ]+r5,\[r2\+(0|0 <notstart>)?\]
|
||||
[ ]+170:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+176:[ ]+4255 @IM+ccdf@[ ]+@OC@[ ]+r13,\[r12=r2\+r5.b\]
|
||||
|
|
@ -120,10 +120,10 @@ Disassembly of section \.text:
|
|||
[ ]+212:[ ]+5f2d 68dd @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2-8856\]
|
||||
[ ]+218:[ ]+5f2d 9822 @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+8856\]
|
||||
[ ]+21e:[ ]+6f2d ac72 2a00 @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+226:[ ]+6f2d d5c5 d6ff @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+22e:[ ]+6f2d acce c09e @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+236:[ ]+6f2d 5331 3f81 @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+23e:[ ]+6f2d 5331 3f81 @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+226:[ ]+6f2d d5c5 d6ff @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+[^]]+\]
|
||||
[ ]+22e:[ ]+6f2d acce c09e @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+[^]]+\]
|
||||
[ ]+236:[ ]+6f2d 5331 3f81 @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+[^]]+\]
|
||||
[ ]+23e:[ ]+6f2d 5331 3f81 @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+[^]]+\]
|
||||
[ ]+246:[ ]+6f2d b5af 982e @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+24e:[ ]+6f2d 2b45 941b @IM+cc1f@[ ]+@OC@[ ]+r1,\[r12=r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+256:[ ]+2a21 @IM+ccdf@[ ]+@OC@[ ]+r13,\[r12=r2\+42\]
|
||||
|
|
@ -140,15 +140,15 @@ Disassembly of section \.text:
|
|||
[ ]+288:[ ]+6f2d 0180 0000 @IM+cc5f@[ ]+@OC@[ ]+r5,\[r12=r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+290:[ ]+5f2d 0180 @IM+cc5f@[ ]+@OC@[ ]+r5,\[r12=r2-32767\]
|
||||
[ ]+296:[ ]+5f2d 0080 @IM+ccdf@[ ]+@OC@[ ]+r13,\[r12=r2-32768\]
|
||||
[ ]+29c:[ ]+6f2d ff7f ffff @IM+ccdf@[ ]+@OC@[ ]+r13,\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+29c:[ ]+6f2d ff7f ffff @IM+ccdf@[ ]+@OC@[ ]+r13,\[r12=r2\+[^]]+\]
|
||||
[ ]+2a4:[ ]+5f2d 0180 @IM+cc5f@[ ]+@OC@[ ]+r5,\[r12=r2-32767\]
|
||||
[ ]+2aa:[ ]+5f2d 0080 @IM+ccdf@[ ]+@OC@[ ]+r13,\[r12=r2-32768\]
|
||||
[ ]+2b0:[ ]+6f2d ff7f ffff @IM+ccdf@[ ]+@OC@[ ]+r13,\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+2b0:[ ]+6f2d ff7f ffff @IM+ccdf@[ ]+@OC@[ ]+r13,\[r12=r2\+[^]]+\]
|
||||
[ ]+2b8:[ ]+6f2d ffff 0000 @IM+cc5f@[ ]+@OC@[ ]+r5,\[r12=r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+2c0:[ ]+6f2d 0000 0100 @IM+ccdf@[ ]+@OC@[ ]+r13,\[r12=r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+2c8:[ ]+6f2d 2b3a 2900 @IM+cc5f@[ ]+@OC@[ ]+r5,\[r12=r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+2d0:[ ]+6f2d d5c5 d6ff @IM+cc5f@[ ]+@OC@[ ]+r5,\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+2d8:[ ]+6f2d d5c5 d6ff @IM+cc5f@[ ]+@OC@[ ]+r5,\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+2d0:[ ]+6f2d d5c5 d6ff @IM+cc5f@[ ]+@OC@[ ]+r5,\[r12=r2\+[^]]+\]
|
||||
[ ]+2d8:[ ]+6f2d d5c5 d6ff @IM+cc5f@[ ]+@OC@[ ]+r5,\[r12=r2\+[^]]+\]
|
||||
[ ]+2e0:[ ]+6f2d 0000 0000 @IM+cc5f@[ ]+@OC@[ ]+r5,\[r12=r2\+0( <notstart>)?\]
|
||||
[ ]+2e2:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+2e8:[ ]+7209 @IM+c44b@[ ]+@OC@[ ]+r4,\[\[r2\]\]
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+@IR+4134@[ ]+@OC@[ ]+r1,r3
|
||||
[ ]+2:[ ]+@IR+4004@[ ]+@OC@[ ]+r0,r0
|
||||
[ ]+4:[ ]+@IR+40d4@[ ]+@OC@[ ]+r0,r13
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+7fb6[ ]+ret[ ]*
|
||||
[ ]+2:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+4:[ ]+7fa6[ ]+reti[ ]*
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+3105[ ]+scc[ ]+r1
|
||||
[ ]+2:[ ]+3005[ ]+scc[ ]+r0
|
||||
[ ]+4:[ ]+3515[ ]+scs[ ]+r5
|
||||
|
|
@ -24,5 +24,5 @@ Disassembly of section \.text:
|
|||
[ ]+20:[ ]+31e5[ ]+sa[ ]+r1
|
||||
[ ]+22:[ ]+3bf5[ ]+swf[ ]+r11
|
||||
[ ]+24:[ ]+38f5[ ]+swf[ ]+r8
|
||||
00000026 <end>:
|
||||
0+26 <end>:
|
||||
[ ]+\.\.\.
|
||||
|
|
|
|||
|
|
@ -3,6 +3,6 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+0f05[ ]+nop[ ]*
|
||||
[ ]+2:[ ]+0f05[ ]+nop[ ]*
|
||||
|
|
|
|||
|
|
@ -3,6 +3,6 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
[ ]+0:[ ]+6f6e 286f ff0b[ ]+move\.d 0x0bff6f28,r6
|
||||
[ ]+6:[ ]+0f05[ ]+nop
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+6f6e 286f ff0b[ ]+move\.d bff6f28 <start\+0xbff6f28>,r6
|
||||
[ ]+6:[ ]+0f05[ ]+nop[ ]*
|
||||
|
|
|
|||
|
|
@ -4,10 +4,10 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
[ ]+0:[ ]+0000[ ]+bcc ( 0x2|\.\+2)
|
||||
^[ ]+\.\.\.
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
^[ ]+4:[ ]+@IR+7706@[ ]+[^ ]+[ ]+([^,]+,)?r7
|
||||
^[ ]+6:[ ]+@IR+7606@[ ]+[^ ]+[ ]+([^,]+,)?r6
|
||||
^[ ]+8:[ ]+@IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r0\]
|
||||
|
|
@ -52,10 +52,10 @@ Disassembly of section \.text:
|
|||
^[ ]+ac:[ ]+5f2d 68dd @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2-8856\]
|
||||
^[ ]+b2:[ ]+5f2d 9822 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+8856\]
|
||||
^[ ]+b8:[ ]+6f2d ac72 2a00 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
^[ ]+c0:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
^[ ]+c8:[ ]+6f2d acce c09e @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
^[ ]+d0:[ ]+6f2d 5331 3f81 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
^[ ]+d8:[ ]+6f2d 5331 3f81 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
^[ ]+c0:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+c8:[ ]+6f2d acce c09e @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+d0:[ ]+6f2d 5331 3f81 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+d8:[ ]+6f2d 5331 3f81 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+e0:[ ]+6f2d b5af 982e @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
^[ ]+e8:[ ]+6f2d 2b45 941b @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
^[ ]+f0:[ ]+2a21 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+42\]
|
||||
|
|
@ -72,15 +72,15 @@ Disassembly of section \.text:
|
|||
^[ ]+122:[ ]+6f2d 0180 0000 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
^[ ]+12a:[ ]+5f2d 0180 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2-32767\]
|
||||
^[ ]+130:[ ]+5f2d 0080 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2-32768\]
|
||||
^[ ]+136:[ ]+6f2d ff7f ffff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
^[ ]+136:[ ]+6f2d ff7f ffff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+13e:[ ]+5f2d 0180 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2-32767\]
|
||||
^[ ]+144:[ ]+5f2d 0080 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2-32768\]
|
||||
^[ ]+14a:[ ]+6f2d ff7f ffff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
^[ ]+14a:[ ]+6f2d ff7f ffff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+152:[ ]+6f2d ffff 0000 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(65535|ffff <six5535>)\]
|
||||
^[ ]+15a:[ ]+6f2d 0000 0100 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
^[ ]+162:[ ]+6f2d 2b3a 2900 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(2701867|293a2b <two701867>)\]
|
||||
^[ ]+16a:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
^[ ]+172:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
^[ ]+16a:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+172:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+17a:[ ]+6f2d 0000 0000 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+0( <notstart>)?\]
|
||||
[ ]+17c:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
^[ ]+182:[ ]+0021 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+0\]
|
||||
|
|
@ -103,10 +103,10 @@ Disassembly of section \.text:
|
|||
^[ ]+1d6:[ ]+5f2d 68dd @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2-8856\]
|
||||
^[ ]+1dc:[ ]+5f2d 9822 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+8856\]
|
||||
^[ ]+1e2:[ ]+6f2d ac72 2a00 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
^[ ]+1ea:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
^[ ]+1f2:[ ]+6f2d acce c09e @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
^[ ]+1fa:[ ]+6f2d 5331 3f81 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
^[ ]+202:[ ]+6f2d 5331 3f81 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
^[ ]+1ea:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+1f2:[ ]+6f2d acce c09e @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+1fa:[ ]+6f2d 5331 3f81 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+202:[ ]+6f2d 5331 3f81 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+20a:[ ]+6f2d b5af 982e @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
^[ ]+212:[ ]+6f2d 2b45 941b @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
^[ ]+21a:[ ]+2a21 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+42\]
|
||||
|
|
@ -123,15 +123,15 @@ Disassembly of section \.text:
|
|||
^[ ]+24c:[ ]+6f2d 0180 0000 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
^[ ]+254:[ ]+5f2d 0180 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2-32767\]
|
||||
^[ ]+25a:[ ]+5f2d 0080 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2-32768\]
|
||||
^[ ]+260:[ ]+6f2d ff7f ffff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
^[ ]+260:[ ]+6f2d ff7f ffff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+268:[ ]+5f2d 0180 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2-32767\]
|
||||
^[ ]+26e:[ ]+5f2d 0080 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2-32768\]
|
||||
^[ ]+274:[ ]+6f2d ff7f ffff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
^[ ]+274:[ ]+6f2d ff7f ffff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+27c:[ ]+6f2d ffff 0000 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(65535|ffff <six5535>)\]
|
||||
^[ ]+284:[ ]+6f2d 0000 0100 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
^[ ]+28c:[ ]+6f2d 2b3a 2900 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(2701867|293a2b <two701867>)\]
|
||||
^[ ]+294:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
^[ ]+29c:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
^[ ]+294:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+29c:[ ]+6f2d d5c5 d6ff @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+[^]]+\]
|
||||
^[ ]+2a4:[ ]+6f2d 0000 0000 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[r2\+0( <notstart>)?\]
|
||||
[ ]+2a6:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
^[ ]+2ac:[ ]+4235 @IM+710e@[ ]+[^ ]+[ ]+([^,]+,)?\[r1=r2\+r3.b\]
|
||||
|
|
@ -172,10 +172,10 @@ Disassembly of section \.text:
|
|||
^[ ]+348:[ ]+5f2d 68dd @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2-8856\]
|
||||
^[ ]+34e:[ ]+5f2d 9822 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+8856\]
|
||||
^[ ]+354:[ ]+6f2d ac72 2a00 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
^[ ]+35c:[ ]+6f2d d5c5 d6ff @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
^[ ]+364:[ ]+6f2d acce c09e @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
^[ ]+36c:[ ]+6f2d 5331 3f81 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
^[ ]+374:[ ]+6f2d 5331 3f81 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
^[ ]+35c:[ ]+6f2d d5c5 d6ff @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+[^]]+\]
|
||||
^[ ]+364:[ ]+6f2d acce c09e @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+[^]]+\]
|
||||
^[ ]+36c:[ ]+6f2d 5331 3f81 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+[^]]+\]
|
||||
^[ ]+374:[ ]+6f2d 5331 3f81 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+[^]]+\]
|
||||
^[ ]+37c:[ ]+6f2d b5af 982e @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
^[ ]+384:[ ]+6f2d 2b45 941b @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
^[ ]+38c:[ ]+2a21 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+42\]
|
||||
|
|
@ -192,15 +192,15 @@ Disassembly of section \.text:
|
|||
^[ ]+3be:[ ]+6f2d 0180 0000 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
^[ ]+3c6:[ ]+5f2d 0180 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2-32767\]
|
||||
^[ ]+3cc:[ ]+5f2d 0080 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2-32768\]
|
||||
^[ ]+3d2:[ ]+6f2d ff7f ffff @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
^[ ]+3d2:[ ]+6f2d ff7f ffff @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+[^]]+\]
|
||||
^[ ]+3da:[ ]+5f2d 0180 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2-32767\]
|
||||
^[ ]+3e0:[ ]+5f2d 0080 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2-32768\]
|
||||
^[ ]+3e6:[ ]+6f2d ff7f ffff @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
^[ ]+3e6:[ ]+6f2d ff7f ffff @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+[^]]+\]
|
||||
^[ ]+3ee:[ ]+6f2d ffff 0000 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(65535|ffff <six5535>)\]
|
||||
^[ ]+3f6:[ ]+6f2d 0000 0100 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
^[ ]+3fe:[ ]+6f2d 2b3a 2900 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(2701867|293a2b <two701867>)\]
|
||||
^[ ]+406:[ ]+6f2d d5c5 d6ff @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
^[ ]+40e:[ ]+6f2d d5c5 d6ff @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
^[ ]+406:[ ]+6f2d d5c5 d6ff @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+[^]]+\]
|
||||
^[ ]+40e:[ ]+6f2d d5c5 d6ff @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+[^]]+\]
|
||||
^[ ]+416:[ ]+6f2d 0000 0000 @IM+7c0e@[ ]+[^ ]+[ ]+([^,]+,)?\[r12=r2\+0( <notstart>)?\]
|
||||
[ ]+418:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
^[ ]+41e:[ ]+7209 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[\[r2\]\]
|
||||
|
|
@ -211,5 +211,5 @@ Disassembly of section \.text:
|
|||
[ ]+430:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
^[ ]+436:[ ]+7f0d 0000 0000 @IM+700a@[ ]+[^ ]+[ ]+([^,]+,)?\[(0x0|0 <notstart>)\]
|
||||
[ ]+438:[ ]+(R_CRIS_)?32[ ]+.text
|
||||
0000043e <end>:
|
||||
0+43e <end>:
|
||||
^[ ]+\.\.\.
|
||||
|
|
|
|||
|
|
@ -6,11 +6,11 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
[ ]+0: 0000[ ]+ bcc ( 0x2|\.\+2)
|
||||
\.\.\.
|
||||
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+4336[ ]+test\.b r3
|
||||
[ ]+6:[ ]+5556[ ]+test\.w r5
|
||||
[ ]+8:[ ]+6aa6[ ]+test\.d r10
|
||||
|
|
@ -99,10 +99,10 @@ Disassembly of section \.text:
|
|||
[ ]+166:[ ]+6f2d 0180 0000 900b[ ]+test\.w \[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+16e:[ ]+5f2d 0180 900b[ ]+test\.w \[r2-32767\]
|
||||
[ ]+174:[ ]+5f2d 0080 900b[ ]+test\.w \[r2-32768\]
|
||||
[ ]+17a:[ ]+6f2d ff7f ffff 900b[ ]+test\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+17a:[ ]+6f2d ff7f ffff 900b[ ]+test\.w \[r2\+[^]]+\]
|
||||
[ ]+182:[ ]+5f2d 0180 900b[ ]+test\.w \[r2-32767\]
|
||||
[ ]+188:[ ]+5f2d 0080 900b[ ]+test\.w \[r2-32768\]
|
||||
[ ]+18e:[ ]+6f2d ff7f ffff 900b[ ]+test\.w \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+18e:[ ]+6f2d ff7f ffff 900b[ ]+test\.w \[r2\+[^]]+\]
|
||||
[ ]+196:[ ]+6f2d ffff 0000 900b[ ]+test\.w \[r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+19e:[ ]+6f2d 0000 0000 900b[ ]+test\.w \[r2\+0( <notstart>)?\]
|
||||
[ ]+1a0:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -126,10 +126,10 @@ Disassembly of section \.text:
|
|||
[ ]+1fa:[ ]+5f2d 68dd a00b[ ]+test\.d \[r2-8856\]
|
||||
[ ]+200:[ ]+5f2d 9822 a00b[ ]+test\.d \[r2\+8856\]
|
||||
[ ]+206:[ ]+6f2d ac72 2a00 a00b[ ]+test\.d \[r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+20e:[ ]+6f2d d5c5 d6ff a00b[ ]+test\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+216:[ ]+6f2d acce c09e a00b[ ]+test\.d \[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+21e:[ ]+6f2d 5331 3f81 a00b[ ]+test\.d \[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+226:[ ]+6f2d 5331 3f81 a00b[ ]+test\.d \[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+20e:[ ]+6f2d d5c5 d6ff a00b[ ]+test\.d \[r2\+[^]]+\]
|
||||
[ ]+216:[ ]+6f2d acce c09e a00b[ ]+test\.d \[r2\+[^]]+\]
|
||||
[ ]+21e:[ ]+6f2d 5331 3f81 a00b[ ]+test\.d \[r2\+[^]]+\]
|
||||
[ ]+226:[ ]+6f2d 5331 3f81 a00b[ ]+test\.d \[r2\+[^]]+\]
|
||||
[ ]+22e:[ ]+6f2d b5af 982e a00b[ ]+test\.d \[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+236:[ ]+6f2d 2b45 941b a00b[ ]+test\.d \[r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+23e:[ ]+2a21 a00b[ ]+test\.d \[r2\+42\]
|
||||
|
|
@ -146,15 +146,15 @@ Disassembly of section \.text:
|
|||
[ ]+270:[ ]+6f2d 0180 0000 a00b[ ]+test\.d \[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+278:[ ]+5f2d 0180 a00b[ ]+test\.d \[r2-32767\]
|
||||
[ ]+27e:[ ]+5f2d 0080 a00b[ ]+test\.d \[r2-32768\]
|
||||
[ ]+284:[ ]+6f2d ff7f ffff a00b[ ]+test\.d \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+284:[ ]+6f2d ff7f ffff a00b[ ]+test\.d \[r2\+[^]]+\]
|
||||
[ ]+28c:[ ]+5f2d 0180 a00b[ ]+test\.d \[r2-32767\]
|
||||
[ ]+292:[ ]+5f2d 0080 a00b[ ]+test\.d \[r2-32768\]
|
||||
[ ]+298:[ ]+6f2d ff7f ffff a00b[ ]+test\.d \[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+298:[ ]+6f2d ff7f ffff a00b[ ]+test\.d \[r2\+[^]]+\]
|
||||
[ ]+2a0:[ ]+6f2d ffff 0000 a00b[ ]+test\.d \[r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+2a8:[ ]+6f2d 0000 0100 a00b[ ]+test\.d \[r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+2b0:[ ]+6f2d 2b3a 2900 a00b[ ]+test\.d \[r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+2b8:[ ]+6f2d d5c5 d6ff a00b[ ]+test\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+2c0:[ ]+6f2d d5c5 d6ff a00b[ ]+test\.d \[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+2b8:[ ]+6f2d d5c5 d6ff a00b[ ]+test\.d \[r2\+[^]]+\]
|
||||
[ ]+2c0:[ ]+6f2d d5c5 d6ff a00b[ ]+test\.d \[r2\+[^]]+\]
|
||||
[ ]+2c8:[ ]+6f2d 0000 0000 a00b[ ]+test\.d \[r2\+0( <notstart>)?\]
|
||||
[ ]+2ca:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+2d0:[ ]+4205 8c0f[ ]+test\.b \[r12=r2\+r0\.b\]
|
||||
|
|
@ -242,10 +242,10 @@ Disassembly of section \.text:
|
|||
[ ]+438:[ ]+6f2d 0180 0000 9c0f[ ]+test\.w \[r12=r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+440:[ ]+5f2d 0180 9c0f[ ]+test\.w \[r12=r2-32767\]
|
||||
[ ]+446:[ ]+5f2d 0080 9c0f[ ]+test\.w \[r12=r2-32768\]
|
||||
[ ]+44c:[ ]+6f2d ff7f ffff 9c0f[ ]+test\.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+44c:[ ]+6f2d ff7f ffff 9c0f[ ]+test\.w \[r12=r2\+[^]]+\]
|
||||
[ ]+454:[ ]+5f2d 0180 9c0f[ ]+test\.w \[r12=r2-32767\]
|
||||
[ ]+45a:[ ]+5f2d 0080 9c0f[ ]+test\.w \[r12=r2-32768\]
|
||||
[ ]+460:[ ]+6f2d ff7f ffff 9c0f[ ]+test\.w \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+460:[ ]+6f2d ff7f ffff 9c0f[ ]+test\.w \[r12=r2\+[^]]+\]
|
||||
[ ]+468:[ ]+6f2d ffff 0000 9c0f[ ]+test\.w \[r12=r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+470:[ ]+6f2d 0000 0000 9c0f[ ]+test\.w \[r12=r2\+0( <notstart>)?\]
|
||||
[ ]+472:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -269,10 +269,10 @@ Disassembly of section \.text:
|
|||
[ ]+4cc:[ ]+5f2d 68dd ac0f[ ]+test\.d \[r12=r2-8856\]
|
||||
[ ]+4d2:[ ]+5f2d 9822 ac0f[ ]+test\.d \[r12=r2\+8856\]
|
||||
[ ]+4d8:[ ]+6f2d ac72 2a00 ac0f[ ]+test\.d \[r12=r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+4e0:[ ]+6f2d d5c5 d6ff ac0f[ ]+test\.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+4e8:[ ]+6f2d acce c09e ac0f[ ]+test\.d \[r12=r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+4f0:[ ]+6f2d 5331 3f81 ac0f[ ]+test\.d \[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+4f8:[ ]+6f2d 5331 3f81 ac0f[ ]+test\.d \[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+4e0:[ ]+6f2d d5c5 d6ff ac0f[ ]+test\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+4e8:[ ]+6f2d acce c09e ac0f[ ]+test\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+4f0:[ ]+6f2d 5331 3f81 ac0f[ ]+test\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+4f8:[ ]+6f2d 5331 3f81 ac0f[ ]+test\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+500:[ ]+6f2d b5af 982e ac0f[ ]+test\.d \[r12=r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+508:[ ]+6f2d 2b45 941b ac0f[ ]+test\.d \[r12=r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+510:[ ]+2a21 ac0f[ ]+test\.d \[r12=r2\+42\]
|
||||
|
|
@ -289,15 +289,15 @@ Disassembly of section \.text:
|
|||
[ ]+542:[ ]+6f2d 0180 0000 ac0f[ ]+test\.d \[r12=r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+54a:[ ]+5f2d 0180 ac0f[ ]+test\.d \[r12=r2-32767\]
|
||||
[ ]+550:[ ]+5f2d 0080 ac0f[ ]+test\.d \[r12=r2-32768\]
|
||||
[ ]+556:[ ]+6f2d ff7f ffff ac0f[ ]+test\.d \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+556:[ ]+6f2d ff7f ffff ac0f[ ]+test\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+55e:[ ]+5f2d 0180 ac0f[ ]+test\.d \[r12=r2-32767\]
|
||||
[ ]+564:[ ]+5f2d 0080 ac0f[ ]+test\.d \[r12=r2-32768\]
|
||||
[ ]+56a:[ ]+6f2d ff7f ffff ac0f[ ]+test\.d \[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+56a:[ ]+6f2d ff7f ffff ac0f[ ]+test\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+572:[ ]+6f2d ffff 0000 ac0f[ ]+test\.d \[r12=r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+57a:[ ]+6f2d 0000 0100 ac0f[ ]+test\.d \[r12=r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+582:[ ]+6f2d 2b3a 2900 ac0f[ ]+test\.d \[r12=r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+58a:[ ]+6f2d d5c5 d6ff ac0f[ ]+test\.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+592:[ ]+6f2d d5c5 d6ff ac0f[ ]+test\.d \[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+58a:[ ]+6f2d d5c5 d6ff ac0f[ ]+test\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+592:[ ]+6f2d d5c5 d6ff ac0f[ ]+test\.d \[r12=r2\+[^]]+\]
|
||||
[ ]+59a:[ ]+6f2d 0000 0000 ac0f[ ]+test\.d \[r12=r2\+0( <notstart>)?\]
|
||||
[ ]+59c:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+5a2:[ ]+7309 800b[ ]+test\.b \[\[r3\]\]
|
||||
|
|
@ -319,5 +319,5 @@ Disassembly of section \.text:
|
|||
[ ]+5e2:[ ]+7f0d 0000 0000 a00b[ ]+test\.d \[(0x0|0 <notstart>)\]
|
||||
[ ]+5e4:[ ]+(R_CRIS_)?32[ ]+\.text
|
||||
|
||||
000005ea <end>:
|
||||
0+5ea <end>:
|
||||
\.\.\.
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <start>:
|
||||
0+ <start>:
|
||||
[ ]+0:[ ]+bb2a[ ]+bmod[ ]+\[r11\],r2
|
||||
[ ]+2:[ ]+4b35 b22a[ ]+bmod[ ]+\[r11\+r3\.b\],r2
|
||||
[ ]+6:[ ]+6355 bd2e[ ]+bmod[ ]+\[r13=r3\+r5\.d\],r2
|
||||
|
|
|
|||
|
|
@ -7,11 +7,11 @@
|
|||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
0: 0000[ ]+ bcc ( 0x2|\.\+2)
|
||||
\.\.\.
|
||||
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+@IM+703b@[ ]+@OC@[ ]+\[r0\]
|
||||
[ ]+6:[ ]+@IM+733b@[ ]+@OC@[ ]+\[r3\]
|
||||
[ ]+8:[ ]+@IM+743f@[ ]+@OC@[ ]+\[r4\+\]
|
||||
|
|
@ -54,10 +54,10 @@ Disassembly of section \.text:
|
|||
[ ]+a8:[ ]+5f2d 68dd @IM+703b@[ ]+@OC@[ ]+\[r2-8856\]
|
||||
[ ]+ae:[ ]+5f2d 9822 @IM+703b@[ ]+@OC@[ ]+\[r2\+8856\]
|
||||
[ ]+b4:[ ]+6f2d ac72 2a00 @IM+703b@[ ]+@OC@[ ]+\[r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+bc:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+c4:[ ]+6f2d acce c09e @IM+703b@[ ]+@OC@[ ]+\[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+cc:[ ]+6f2d 5331 3f81 @IM+703b@[ ]+@OC@[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+d4:[ ]+6f2d 5331 3f81 @IM+703b@[ ]+@OC@[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+bc:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+c4:[ ]+6f2d acce c09e @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+cc:[ ]+6f2d 5331 3f81 @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+d4:[ ]+6f2d 5331 3f81 @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+dc:[ ]+6f2d b5af 982e @IM+703b@[ ]+@OC@[ ]+\[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+e4:[ ]+6f2d 2b45 941b @IM+703b@[ ]+@OC@[ ]+\[r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+ec:[ ]+2a21 @IM+703b@[ ]+@OC@[ ]+\[r2\+42\]
|
||||
|
|
@ -74,15 +74,15 @@ Disassembly of section \.text:
|
|||
[ ]+11e:[ ]+6f2d 0180 0000 @IM+703b@[ ]+@OC@[ ]+\[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+126:[ ]+5f2d 0180 @IM+703b@[ ]+@OC@[ ]+\[r2-32767\]
|
||||
[ ]+12c:[ ]+5f2d 0080 @IM+703b@[ ]+@OC@[ ]+\[r2-32768\]
|
||||
[ ]+132:[ ]+6f2d ff7f ffff @IM+703b@[ ]+@OC@[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+132:[ ]+6f2d ff7f ffff @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+13a:[ ]+5f2d 0180 @IM+703b@[ ]+@OC@[ ]+\[r2-32767\]
|
||||
[ ]+140:[ ]+5f2d 0080 @IM+703b@[ ]+@OC@[ ]+\[r2-32768\]
|
||||
[ ]+146:[ ]+6f2d ff7f ffff @IM+703b@[ ]+@OC@[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+146:[ ]+6f2d ff7f ffff @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+14e:[ ]+6f2d ffff 0000 @IM+703b@[ ]+@OC@[ ]+\[r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+156:[ ]+6f2d 0000 0100 @IM+703b@[ ]+@OC@[ ]+\[r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+15e:[ ]+6f2d 2b3a 2900 @IM+703b@[ ]+@OC@[ ]+\[r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+166:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+16e:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+166:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+16e:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+176:[ ]+6f2d 0000 0000 @IM+703b@[ ]+@OC@[ ]+\[r2\+0( <notstart>)?\]
|
||||
[ ]+178:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+17e:[ ]+0021 @IM+703b@[ ]+@OC@[ ]+\[r2\+0\]
|
||||
|
|
@ -105,10 +105,10 @@ Disassembly of section \.text:
|
|||
[ ]+1d2:[ ]+5f2d 68dd @IM+703b@[ ]+@OC@[ ]+\[r2-8856\]
|
||||
[ ]+1d8:[ ]+5f2d 9822 @IM+703b@[ ]+@OC@[ ]+\[r2\+8856\]
|
||||
[ ]+1de:[ ]+6f2d ac72 2a00 @IM+703b@[ ]+@OC@[ ]+\[r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+1e6:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+1ee:[ ]+6f2d acce c09e @IM+703b@[ ]+@OC@[ ]+\[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+1f6:[ ]+6f2d 5331 3f81 @IM+703b@[ ]+@OC@[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+1fe:[ ]+6f2d 5331 3f81 @IM+703b@[ ]+@OC@[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+1e6:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+1ee:[ ]+6f2d acce c09e @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+1f6:[ ]+6f2d 5331 3f81 @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+1fe:[ ]+6f2d 5331 3f81 @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+206:[ ]+6f2d b5af 982e @IM+703b@[ ]+@OC@[ ]+\[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+20e:[ ]+6f2d 2b45 941b @IM+703b@[ ]+@OC@[ ]+\[r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+216:[ ]+2a21 @IM+703b@[ ]+@OC@[ ]+\[r2\+42\]
|
||||
|
|
@ -125,15 +125,15 @@ Disassembly of section \.text:
|
|||
[ ]+248:[ ]+6f2d 0180 0000 @IM+703b@[ ]+@OC@[ ]+\[r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+250:[ ]+5f2d 0180 @IM+703b@[ ]+@OC@[ ]+\[r2-32767\]
|
||||
[ ]+256:[ ]+5f2d 0080 @IM+703b@[ ]+@OC@[ ]+\[r2-32768\]
|
||||
[ ]+25c:[ ]+6f2d ff7f ffff @IM+703b@[ ]+@OC@[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+25c:[ ]+6f2d ff7f ffff @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+264:[ ]+5f2d 0180 @IM+703b@[ ]+@OC@[ ]+\[r2-32767\]
|
||||
[ ]+26a:[ ]+5f2d 0080 @IM+703b@[ ]+@OC@[ ]+\[r2-32768\]
|
||||
[ ]+270:[ ]+6f2d ff7f ffff @IM+703b@[ ]+@OC@[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+270:[ ]+6f2d ff7f ffff @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+278:[ ]+6f2d ffff 0000 @IM+703b@[ ]+@OC@[ ]+\[r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+280:[ ]+6f2d 0000 0100 @IM+703b@[ ]+@OC@[ ]+\[r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+288:[ ]+6f2d 2b3a 2900 @IM+703b@[ ]+@OC@[ ]+\[r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+290:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+298:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+290:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+298:[ ]+6f2d d5c5 d6ff @IM+703b@[ ]+@OC@[ ]+\[r2\+[^]]+\]
|
||||
[ ]+2a0:[ ]+6f2d 0000 0000 @IM+703b@[ ]+@OC@[ ]+\[r2\+0( <notstart>)?\]
|
||||
[ ]+2a2:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+2a8:[ ]+4235 @IM+713f@[ ]+@OC@[ ]+\[r1=r2\+r3\.b\]
|
||||
|
|
@ -174,10 +174,10 @@ Disassembly of section \.text:
|
|||
[ ]+344:[ ]+5f2d 68dd @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2-8856\]
|
||||
[ ]+34a:[ ]+5f2d 9822 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+8856\]
|
||||
[ ]+350:[ ]+6f2d ac72 2a00 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(2781868|2a72ac <two701867\+0x13881>)\]
|
||||
[ ]+358:[ ]+6f2d d5c5 d6ff @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+360:[ ]+6f2d acce c09e @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\]
|
||||
[ ]+368:[ ]+6f2d 5331 3f81 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+370:[ ]+6f2d 5331 3f81 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\]
|
||||
[ ]+358:[ ]+6f2d d5c5 d6ff @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+360:[ ]+6f2d acce c09e @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+368:[ ]+6f2d 5331 3f81 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+370:[ ]+6f2d 5331 3f81 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+378:[ ]+6f2d b5af 982e @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\]
|
||||
[ ]+380:[ ]+6f2d 2b45 941b @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(0x1b94452b|1b94452b <const_int_32>)\]
|
||||
[ ]+388:[ ]+2a21 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+42\]
|
||||
|
|
@ -194,15 +194,15 @@ Disassembly of section \.text:
|
|||
[ ]+3ba:[ ]+6f2d 0180 0000 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(32769|8001 <three2767\+0x2>)\]
|
||||
[ ]+3c2:[ ]+5f2d 0180 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2-32767\]
|
||||
[ ]+3c8:[ ]+5f2d 0080 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2-32768\]
|
||||
[ ]+3ce:[ ]+6f2d ff7f ffff @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+3ce:[ ]+6f2d ff7f ffff @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+3d6:[ ]+5f2d 0180 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2-32767\]
|
||||
[ ]+3dc:[ ]+5f2d 0080 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2-32768\]
|
||||
[ ]+3e2:[ ]+6f2d ff7f ffff @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\]
|
||||
[ ]+3e2:[ ]+6f2d ff7f ffff @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+3ea:[ ]+6f2d ffff 0000 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(65535|ffff <six5535>)\]
|
||||
[ ]+3f2:[ ]+6f2d 0000 0100 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(65536|10000 <six5535\+0x1>)\]
|
||||
[ ]+3fa:[ ]+6f2d 2b3a 2900 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(2701867|293a2b <two701867>)\]
|
||||
[ ]+402:[ ]+6f2d d5c5 d6ff @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+40a:[ ]+6f2d d5c5 d6ff @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\]
|
||||
[ ]+402:[ ]+6f2d d5c5 d6ff @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+40a:[ ]+6f2d d5c5 d6ff @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+[^]]+\]
|
||||
[ ]+412:[ ]+6f2d 0000 0000 @IM+7c3f@[ ]+@OC@[ ]+\[r12=r2\+0( <notstart>)?\]
|
||||
[ ]+414:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+41a:[ ]+7209 @IM+703b@[ ]+@OC@[ ]+\[\[r2\]\]
|
||||
|
|
@ -214,5 +214,5 @@ Disassembly of section \.text:
|
|||
[ ]+432:[ ]+7f0d 0000 0000 @IM+703b@[ ]+@OC@[ ]+\[(0x0|0 <notstart>)\]
|
||||
[ ]+434:[ ]+(R_CRIS_)?32[ ]+\.text
|
||||
|
||||
0000043a <end>:
|
||||
0+43a <end>:
|
||||
\.\.\.
|
||||
|
|
|
|||
|
|
@ -4,10 +4,10 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
[ ]+0:[ ]+0000[ ]+bcc ( 0x2|\.\+2)
|
||||
^[ ]+\.\.\.
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+@IR+3306@[ ]+move[ ]+r3,.*
|
||||
[ ]+6:[ ]+@IM+300a@[ ]+move[ ]+\[r0\],.*
|
||||
[ ]+8:[ ]+@IM+300e@[ ]+move[ ]+\[r0\+\],.*
|
||||
|
|
@ -89,5 +89,5 @@ Disassembly of section \.text:
|
|||
[ ]+138:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+13e:[ ]+7f0d 0000 0000 @IM+300a@[ ]+move[ ]+\[(0x0|0 <notstart>)\],.*
|
||||
[ ]+140:[ ]+(R_CRIS_)?32[ ]+\.text
|
||||
00000146 <end>:
|
||||
0+146 <end>:
|
||||
^[ ]+\.\.\.
|
||||
|
|
|
|||
|
|
@ -4,12 +4,12 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
RELOCATION RECORDS FOR \[\.text\]:
|
||||
OFFSET TYPE VALUE
|
||||
00000070 (R_CRIS_)?16[ ]+externalsym
|
||||
00000284 (R_CRIS_)?32[ ]+externalsym
|
||||
0000028c (R_CRIS_)?32[ ]+\.text
|
||||
00000170 (R_CRIS_)?32[ ]+externalsym
|
||||
00000274 (R_CRIS_)?32[ ]+externalsym
|
||||
OFFSET[ ]+TYPE[ ]+VALUE
|
||||
0+70 (R_CRIS_)?16[ ]+externalsym
|
||||
0+284 (R_CRIS_)?32[ ]+externalsym
|
||||
0+28c (R_CRIS_)?32[ ]+\.text
|
||||
0+170 (R_CRIS_)?32[ ]+externalsym
|
||||
0+274 (R_CRIS_)?32[ ]+externalsym
|
||||
|
||||
|
||||
Contents of section \.text:
|
||||
|
|
|
|||
|
|
@ -4,10 +4,10 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
[ ]+0:[ ]+0000[ ]+bcc ( 0x2|\.\+2)
|
||||
^[ ]+\.\.\.
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+@IR+3a06@[ ]+move[ ]+r10,.*
|
||||
[ ]+6:[ ]+@IM+3a0a@[ ]+move[ ]+\[r10\],.*
|
||||
[ ]+8:[ ]+@IM+3a0e@[ ]+move[ ]+\[r10\+\],.*
|
||||
|
|
@ -25,8 +25,8 @@ Disassembly of section \.text:
|
|||
[ ]+4c:[ ]+@IM+3f0e@ 9822 0000[ ]+move[ ]+(0x2298|2298 <end\+0x1ef0>),.*
|
||||
[ ]+52:[ ]+@IM+3f0e@ ac72 2a00[ ]+move[ ]+(0x2a72ac|2a72ac <two701867\+0x13881>),.*
|
||||
[ ]+58:[ ]+@IM+3f0e@ d5c5 d6ff[ ]+move[ ]+0xffd6c5d5,.*
|
||||
[ ]+5e:[ ]+@IM+3f0e@ acce c09e[ ]+move[ ]+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>),.*
|
||||
[ ]+64:[ ]+@IM+3f0e@ 5331 3f81[ ]+move[ ]+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>),.*
|
||||
[ ]+5e:[ ]+@IM+3f0e@ acce c09e[ ]+move[ ]+[^,]+,.*
|
||||
[ ]+64:[ ]+@IM+3f0e@ 5331 3f81[ ]+move[ ]+[^,]+,.*
|
||||
[ ]+6a:[ ]+@IM+3f0e@ b5af 982e[ ]+move[ ]+(0x2e98afb5|2e98afb5 <const_int_m32>),.*
|
||||
[ ]+70:[ ]+@IM+3f0e@ 2b45 941b[ ]+move[ ]+(0x1b94452b|1b94452b <const_int_32>),.*
|
||||
[ ]+76:[ ]+@IM+3f0e@ 2a00 0000[ ]+move[ ]+(0x2a|2a <start\+0x26>),.*
|
||||
|
|
@ -79,10 +79,10 @@ Disassembly of section \.text:
|
|||
[ ]+160:[ ]+5f2d 68dd @IM+300a@[ ]+move[ ]+\[r2-8856\],.*
|
||||
[ ]+166:[ ]+5f2d 9822 @IM+300a@[ ]+move[ ]+\[r2\+8856\],.*
|
||||
[ ]+16c:[ ]+6f2d ac72 2a00 @IM+300a@[ ]+move[ ]+\[r2\+(2781868|2a72ac <two701867\+0x13881>)\],.*
|
||||
[ ]+174:[ ]+6f2d d5c5 d6ff @IM+300a@[ ]+move[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],.*
|
||||
[ ]+17c:[ ]+6f2d acce c09e @IM+300a@[ ]+move[ ]+\[r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\],.*
|
||||
[ ]+184:[ ]+6f2d 5331 3f81 @IM+300a@[ ]+move[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],.*
|
||||
[ ]+18c:[ ]+6f2d 5331 3f81 @IM+300a@[ ]+move[ ]+\[r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],.*
|
||||
[ ]+174:[ ]+6f2d d5c5 d6ff @IM+300a@[ ]+move[ ]+\[r2\+[^]]+\],.*
|
||||
[ ]+17c:[ ]+6f2d acce c09e @IM+300a@[ ]+move[ ]+\[r2\+[^]]+\],.*
|
||||
[ ]+184:[ ]+6f2d 5331 3f81 @IM+300a@[ ]+move[ ]+\[r2\+[^]]+\],.*
|
||||
[ ]+18c:[ ]+6f2d 5331 3f81 @IM+300a@[ ]+move[ ]+\[r2\+[^]]+\],.*
|
||||
[ ]+194:[ ]+6f2d b5af 982e @IM+300a@[ ]+move[ ]+\[r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\],.*
|
||||
[ ]+19c:[ ]+6f2d 2b45 941b @IM+300a@[ ]+move[ ]+\[r2\+(0x1b94452b|1b94452b <const_int_32>)\],.*
|
||||
[ ]+1a4:[ ]+2a21 @IM+300a@[ ]+move[ ]+\[r2\+42\],.*
|
||||
|
|
@ -99,15 +99,15 @@ Disassembly of section \.text:
|
|||
[ ]+1d6:[ ]+6f2d 0180 0000 @IM+300a@[ ]+move[ ]+\[r2\+(32769|8001 <three2767\+0x2>)\],.*
|
||||
[ ]+1de:[ ]+5f2d 0180 @IM+300a@[ ]+move[ ]+\[r2-32767\],.*
|
||||
[ ]+1e4:[ ]+5f2d 0080 @IM+300a@[ ]+move[ ]+\[r2-32768\],.*
|
||||
[ ]+1ea:[ ]+6f2d ff7f ffff @IM+300a@[ ]+move[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],.*
|
||||
[ ]+1ea:[ ]+6f2d ff7f ffff @IM+300a@[ ]+move[ ]+\[r2\+[^]]+\],.*
|
||||
[ ]+1f2:[ ]+5f2d 0180 @IM+300a@[ ]+move[ ]+\[r2-32767\],.*
|
||||
[ ]+1f8:[ ]+5f2d 0080 @IM+300a@[ ]+move[ ]+\[r2-32768\],.*
|
||||
[ ]+1fe:[ ]+6f2d ff7f ffff @IM+300a@[ ]+move[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],.*
|
||||
[ ]+1fe:[ ]+6f2d ff7f ffff @IM+300a@[ ]+move[ ]+\[r2\+[^]]+\],.*
|
||||
[ ]+206:[ ]+6f2d ffff 0000 @IM+300a@[ ]+move[ ]+\[r2\+(65535|ffff <six5535>)\],.*
|
||||
[ ]+20e:[ ]+6f2d 0000 0100 @IM+300a@[ ]+move[ ]+\[r2\+(65536|10000 <six5535\+0x1>)\],.*
|
||||
[ ]+216:[ ]+6f2d 2b3a 2900 @IM+300a@[ ]+move[ ]+\[r2\+(2701867|293a2b <two701867>)\],.*
|
||||
[ ]+21e:[ ]+6f2d d5c5 d6ff @IM+300a@[ ]+move[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],.*
|
||||
[ ]+226:[ ]+6f2d d5c5 d6ff @IM+300a@[ ]+move[ ]+\[r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],.*
|
||||
[ ]+21e:[ ]+6f2d d5c5 d6ff @IM+300a@[ ]+move[ ]+\[r2\+[^]]+\],.*
|
||||
[ ]+226:[ ]+6f2d d5c5 d6ff @IM+300a@[ ]+move[ ]+\[r2\+[^]]+\],.*
|
||||
[ ]+22e:[ ]+6f2d 0000 0000 @IM+300a@[ ]+move[ ]+\[r2\+0( <notstart>)?\],.*
|
||||
[ ]+230:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+236:[ ]+42a5 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+r10\.b\],.*
|
||||
|
|
@ -142,10 +142,10 @@ Disassembly of section \.text:
|
|||
[ ]+2ba:[ ]+5f2d 68dd @IM+3c0e@[ ]+move[ ]+\[r12=r2-8856\],.*
|
||||
[ ]+2c0:[ ]+5f2d 9822 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+8856\],.*
|
||||
[ ]+2c6:[ ]+6f2d ac72 2a00 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(2781868|2a72ac <two701867\+0x13881>)\],.*
|
||||
[ ]+2ce:[ ]+6f2d d5c5 d6ff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],.*
|
||||
[ ]+2d6:[ ]+6f2d acce c09e @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0x9ec0ceac|9ec0ceac <const_int_m32\+0x70281ef7>)\],.*
|
||||
[ ]+2de:[ ]+6f2d 5331 3f81 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],.*
|
||||
[ ]+2e6:[ ]+6f2d 5331 3f81 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0x813f3153|813f3153 <const_int_m32\+0x52a6819e>)\],.*
|
||||
[ ]+2ce:[ ]+6f2d d5c5 d6ff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+[^]]+\],.*
|
||||
[ ]+2d6:[ ]+6f2d acce c09e @IM+3c0e@[ ]+move[ ]+\[r12=r2\+[^]]+\],.*
|
||||
[ ]+2de:[ ]+6f2d 5331 3f81 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+[^]]+\],.*
|
||||
[ ]+2e6:[ ]+6f2d 5331 3f81 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+[^]]+\],.*
|
||||
[ ]+2ee:[ ]+6f2d b5af 982e @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0x2e98afb5|2e98afb5 <const_int_m32>)\],.*
|
||||
[ ]+2f6:[ ]+6f2d 2b45 941b @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0x1b94452b|1b94452b <const_int_32>)\],.*
|
||||
[ ]+2fe:[ ]+2a21 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+42\],.*
|
||||
|
|
@ -162,15 +162,15 @@ Disassembly of section \.text:
|
|||
[ ]+330:[ ]+6f2d 0180 0000 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(32769|8001 <three2767\+0x2>)\],.*
|
||||
[ ]+338:[ ]+5f2d 0180 @IM+3c0e@[ ]+move[ ]+\[r12=r2-32767\],.*
|
||||
[ ]+33e:[ ]+5f2d 0080 @IM+3c0e@[ ]+move[ ]+\[r12=r2-32768\],.*
|
||||
[ ]+344:[ ]+6f2d ff7f ffff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],.*
|
||||
[ ]+344:[ ]+6f2d ff7f ffff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+[^]]+\],.*
|
||||
[ ]+34c:[ ]+5f2d 0180 @IM+3c0e@[ ]+move[ ]+\[r12=r2-32767\],.*
|
||||
[ ]+352:[ ]+5f2d 0080 @IM+3c0e@[ ]+move[ ]+\[r12=r2-32768\],.*
|
||||
[ ]+358:[ ]+6f2d ff7f ffff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],.*
|
||||
[ ]+358:[ ]+6f2d ff7f ffff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+[^]]+\],.*
|
||||
[ ]+360:[ ]+6f2d ffff 0000 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(65535|ffff <six5535>)\],.*
|
||||
[ ]+368:[ ]+6f2d 0000 0100 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(65536|10000 <six5535\+0x1>)\],.*
|
||||
[ ]+370:[ ]+6f2d 2b3a 2900 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(2701867|293a2b <two701867>)\],.*
|
||||
[ ]+378:[ ]+6f2d d5c5 d6ff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],.*
|
||||
[ ]+380:[ ]+6f2d d5c5 d6ff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0xffd6c5d5|ffd6c5d5 <const_int_m32\+0xd13e1620>)\],.*
|
||||
[ ]+378:[ ]+6f2d d5c5 d6ff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+[^]]+\],.*
|
||||
[ ]+380:[ ]+6f2d d5c5 d6ff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+[^]]+\],.*
|
||||
[ ]+388:[ ]+6f2d 0000 0000 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+0( <notstart>)?\],.*
|
||||
[ ]+38a:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+390:[ ]+7309 @IM+300a@[ ]+move[ ]+\[\[r3\]\],.*
|
||||
|
|
|
|||
|
|
@ -4,10 +4,10 @@
|
|||
.*: file format .*-cris
|
||||
|
||||
Disassembly of section \.text:
|
||||
00000000 <notstart>:
|
||||
0+ <notstart>:
|
||||
[ ]+0:[ ]+0000[ ]+bcc ( 0x2|\.\+2)
|
||||
^[ ]+\.\.\.
|
||||
00000004 <start>:
|
||||
0+4 <start>:
|
||||
[ ]+4:[ ]+@IR+3506@[ ]+move[ ]+r5,.*
|
||||
[ ]+6:[ ]+@IM+350a@[ ]+move[ ]+\[r5\],.*
|
||||
[ ]+8:[ ]+@IM+350e@[ ]+move[ ]+\[r5\+\],.*
|
||||
|
|
@ -83,10 +83,10 @@ Disassembly of section \.text:
|
|||
[ ]+136:[ ]+6f2d 0180 0000 @IM+300a@[ ]+move[ ]+\[r2\+(32769|8001 <three2767\+0x2>)\],.*
|
||||
[ ]+13e:[ ]+5f2d 0180 @IM+300a@[ ]+move[ ]+\[r2-32767\],.*
|
||||
[ ]+144:[ ]+5f2d 0080 @IM+300a@[ ]+move[ ]+\[r2-32768\],.*
|
||||
[ ]+14a:[ ]+6f2d ff7f ffff @IM+300a@[ ]+move[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],.*
|
||||
[ ]+14a:[ ]+6f2d ff7f ffff @IM+300a@[ ]+move[ ]+\[r2\+[^]]+\],.*
|
||||
[ ]+152:[ ]+5f2d 0180 @IM+300a@[ ]+move[ ]+\[r2-32767\],.*
|
||||
[ ]+158:[ ]+5f2d 0080 @IM+300a@[ ]+move[ ]+\[r2-32768\],.*
|
||||
[ ]+15e:[ ]+6f2d ff7f ffff @IM+300a@[ ]+move[ ]+\[r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],.*
|
||||
[ ]+15e:[ ]+6f2d ff7f ffff @IM+300a@[ ]+move[ ]+\[r2\+[^]]+\],.*
|
||||
[ ]+166:[ ]+6f2d ffff 0000 @IM+300a@[ ]+move[ ]+\[r2\+(65535|ffff <six5535>)\],.*
|
||||
[ ]+16e:[ ]+6f2d 0000 0000 @IM+300a@[ ]+move[ ]+\[r2\+0( <notstart>)?\],.*
|
||||
[ ]+170:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -135,10 +135,10 @@ Disassembly of section \.text:
|
|||
[ ]+23a:[ ]+6f2d 0180 0000 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(32769|8001 <three2767\+0x2>)\],.*
|
||||
[ ]+242:[ ]+5f2d 0180 @IM+3c0e@[ ]+move[ ]+\[r12=r2-32767\],.*
|
||||
[ ]+248:[ ]+5f2d 0080 @IM+3c0e@[ ]+move[ ]+\[r12=r2-32768\],.*
|
||||
[ ]+24e:[ ]+6f2d ff7f ffff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],.*
|
||||
[ ]+24e:[ ]+6f2d ff7f ffff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+[^]]+\],.*
|
||||
[ ]+256:[ ]+5f2d 0180 @IM+3c0e@[ ]+move[ ]+\[r12=r2-32767\],.*
|
||||
[ ]+25c:[ ]+5f2d 0080 @IM+3c0e@[ ]+move[ ]+\[r12=r2-32768\],.*
|
||||
[ ]+262:[ ]+6f2d ff7f ffff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(0xffff7fff|ffff7fff <const_int_m32\+0xd166d04a>)\],.*
|
||||
[ ]+262:[ ]+6f2d ff7f ffff @IM+3c0e@[ ]+move[ ]+\[r12=r2\+[^]]+\],.*
|
||||
[ ]+26a:[ ]+6f2d ffff 0000 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+(65535|ffff <six5535>)\],.*
|
||||
[ ]+272:[ ]+6f2d 0000 0000 @IM+3c0e@[ ]+move[ ]+\[r12=r2\+0( <notstart>)?\],.*
|
||||
[ ]+274:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
|
|
@ -148,5 +148,5 @@ Disassembly of section \.text:
|
|||
[ ]+284:[ ]+(R_CRIS_)?32[ ]+externalsym
|
||||
[ ]+28a:[ ]+7f0d 0000 0000 @IM+300a@[ ]+move[ ]+\[(0x0|0 <notstart>)\],.*
|
||||
[ ]+28c:[ ]+(R_CRIS_)?32[ ]+\.text
|
||||
00000292 <end>:
|
||||
0+292 <end>:
|
||||
^[ ]+\.\.\.
|
||||
|
|
|
|||
Loading…
Reference in New Issue