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Arm: Fix disassembler crashing on -b binary when thumb file and thumb not forced.

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The disassembler for Arm has some aborts in it in places it assumes can never
be reached.  Under normal circumstances they indeed cannot be reached because
the right options are selected from the ARM attributes in the ELF file.

However when disassembling with -b binary then if you do not get the options
right the disassembler just aborts.  This changes it so it just prints how it
was trying to interpret the instruction and prints UNKNOWN instructions next to it.

This way the user has an idea of what's going.

gas/ChangeLog:

	* testsuite/gas/arm/undefined-insn-arm.d: New test.
	* testsuite/gas/arm/undefined-insn-thumb.d: New test.
	* testsuite/gas/arm/undefined-insn.s: New test.

opcodes/ChangeLog:

	* arm-dis.c (UNKNOWN_INSTRUCTION_32BIT): Format specifier for arm mode.
	(UNKNOWN_INSTRUCTION_16BIT): Format specifier for thumb mode.
	(print_insn_arm, print_insn_thumb16, print_insn_thumb32): Use them.
This commit is contained in:
Tamar Christina 2018-10-19 10:31:42 +01:00
parent 33d64ca5db
commit 0b347048e7
6 changed files with 31 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
gas/ChangeLog
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@ -1,3 +1,9 @@
2018-10-19 Tamar Christina <tamar.christina@arm.com>
* testsuite/gas/arm/undefined-insn-arm.d: New test.
* testsuite/gas/arm/undefined-insn-thumb.d: New test.
* testsuite/gas/arm/undefined-insn.s: New test.
2018-10-19 Fredrik Noring <noring@nocrew.org>
* testsuite/gas/mips/r5900.s: Extend the R5900 short loop fix

5
gas/testsuite/gas/arm/undefined-insn-arm.d Normal file
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@ -0,0 +1,5 @@
#name: Undefined binary printing in arm mode
#skip: *-unknown-pe *-*-vxworks
#source: undefined-insn.s
#objdump: -D -b binary -m armv7e-m
#...

5
gas/testsuite/gas/arm/undefined-insn-thumb.d Normal file
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@ -0,0 +1,5 @@
#name: Undefined binary printing in thumb mode
#skip: *-unknown-pe *-*-vxworks
#source: undefined-insn.s
#objdump: -D -b binary -m armv7e-m -M force-thumb
#...

1
gas/testsuite/gas/arm/undefined-insn.s Normal file
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@ -0,0 +1 @@
.inst 0xffffffff

6
opcodes/ChangeLog
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@ -1,3 +1,9 @@
2018-10-19 Tamar Christina <tamar.christina@arm.com>
* arm-dis.c (UNKNOWN_INSTRUCTION_32BIT): Format specifier for arm mode.
(UNKNOWN_INSTRUCTION_16BIT): Format specifier for thumb mode.
(print_insn_arm, print_insn_thumb16, print_insn_thumb32): Use them.
2018-10-16 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-opc.c (struct operand_qualifier_data): Change qualifier data

11
opcodes/arm-dis.c
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@ -141,6 +141,8 @@ enum opcode_sentinel_enum
} opcode_sentinels;
#define UNDEFINED_INSTRUCTION "\t\t; <UNDEFINED> instruction: %0-31x"
#define UNKNOWN_INSTRUCTION_32BIT "\t\t; <UNDEFINED> instruction: %08x"
#define UNKNOWN_INSTRUCTION_16BIT "\t\t; <UNDEFINED> instruction: %04x"
#define UNPREDICTABLE_INSTRUCTION "\t; <UNPREDICTABLE>"
/* Common coprocessor opcodes shared between Arm and Thumb-2. */
@ -5194,7 +5196,8 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
return;
}
}
abort ();
func (stream, UNKNOWN_INSTRUCTION_32BIT, (unsigned)given);
return;
}
/* Print one 16-bit Thumb instruction from PC on INFO->STREAM. */
@ -5465,7 +5468,8 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given)
}
/* No match. */
abort ();
func (stream, UNKNOWN_INSTRUCTION_16BIT, (unsigned)given);
return;
}
/* Return the name of an V7M special register. */
@ -6089,7 +6093,8 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
}
/* No match. */
abort ();
func (stream, UNKNOWN_INSTRUCTION_32BIT, (unsigned)given);
return;
}
/* Print data bytes on INFO->STREAM. */