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Update to 1.0.1

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Michael Meissner 1996-02-24 14:36:59 +00:00
parent b5eccf7482
commit 0d02fbb844
4 changed files with 130 additions and 5 deletions
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2
sim/ppc/.Sanitize
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@ -30,6 +30,7 @@ COPYING.LIB
ChangeLog
INSTALL
Makefile.in
NOTES
README
RUN
PROBLEMS
@ -89,6 +90,7 @@ os_emul.h
ppc-cache-rules
ppc-instructions
ppc-opcode-complex
ppc-opcode-flat
ppc-opcode-simple
ppc-opcode-stupid
ppc-opcode-test-1

38
sim/ppc/ChangeLog
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@ -1,3 +1,8 @@
Thu Feb 22 22:48:57 1996 Andrew Cagney <cagney@highland.com.au>
* README, RUN, INSTALL: Update to reflect announcement
* psim: PSIM 1.0.1 released
Thu Feb 22 14:01:56 1996 Michael Meissner <meissner@tiktok.cygnus.com>
* emul_bugapi.c (emul_bugapi_do_read): New function to handle
@ -25,12 +30,35 @@ Wed Feb 21 10:39:35 1996 Michael Meissner <meissner@tiktok.cygnus.com>
Correct implementation of _OUTLN. Add support for _OUTSTR and
_PCRLR system calls.
* psim.c (psim_options): Call device_add_string_property, not
device_tree_add_parsed, since we want to add the model as a
string, and 603/604 look like integers.
Wed Feb 21 17:07:27 1996 Andrew Cagney <cagney@highland.com.au>
* emul_bugapi.c (emul_bugapi_create): Make formats type
compatible.
* NOTES: New file. Ramblings on why things were done they way
they were.
* psim.c (psim_options): Didn't enter the model value into the
device tree as a string.
* cpu.c (cpu_synchronize_context): Wrong test for conditional
flush of cache.
* emul_generic.c (emul_add_tree_hardware): reg value didn't match
bus address.
* ppc-opcode-flat: new file. Generate an instruction decode
function like ppc-opcode-complex but use switch statements.
* INSTALL: document new opcode file, add example configurations.
Tue Feb 20 18:42:31 1996 Andrew Cagney <cagney@highland.com.au>
* main.c (main): rename psim instance (system) to simulation and
make global.
* main.c (error): print out performance even when an error occures.
* emul_bugapi.c (emul_bugapi_create): Fix argument passing.
* emul_generic.c (emul_add_tree_hardware): Move hardware devices
to 0x80000000 from 0x400000.
Mon Feb 19 22:54:40 1996 Andrew Cagney <cagney@highland.com.au>

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sim/ppc/NOTES Normal file
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sim/ppc/ppc-opcode-flat Normal file
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@ -0,0 +1,95 @@
#
# This file is part of the program psim.
#
# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
#
# Instruction decode:
#
# The table that follows is used by gen to construct a decision tree
# that can identify each possible instruction. Gen then outputs this
# decision tree as (according to config) a table or switch statement
# as the function idecode.
#
# In parallel to this, as mentioned above, WITH_EXPANDED_SEMANTICS
# determines of the semantic functions themselves should be expanded
# in a similar way.
#
# The table contains the following entries:
#
# <valid>
#
# Must be 1 for the entry to be considered. The last entry must be
# zero.
#
# <first>
# <last>
#
# Range of bits (within the instruction) that should be searched for
# an instruction field. Within such ranges, gen looks for opcodes
# (constants), registers (strings) and reserved bits (slash) and
# according to the rules that follows includes or excludes them from
# a possible instruction field.
#
# <force_first>
# <force_last>
#
# If an instructioin field was found, enlarge the field size so that
# it is forced to at least include bits starting from <force_first>
# (<force_last>). To stop this occuring, use <force_first> = <last>
# + 1 and <force_last> = <first> - 1.
#
# <force_slash>
#
# Treat `/' fields as a constant instead of variable when looking for
# an instruction field.
#
# <force_expansion>
#
# Treat any contained register (string) fields as constant when
# determining the instruction field. For the instruction decode (and
# controled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
# what would otherwize be non constant bits of an instruction.
#
# <use_switch>
#
# Should this table be expanded using a switch statement (val 1) and
# if so, should it be padded with entries so as to force the compiler
# to generate a jump table (val 2).
#
# <special_mask>
# <special_value>
# <special_rule>
#
# Special rule to fine tune how specific (or groups) of instructions
# are expanded. The applicability of the rule is determined by
#
# <special_mask> != 0 && (instruction> & <special_mask>) == <special_value>
#
# Where <instruction> is obtained by looking only at constant fields
# with in an instructions spec. When determining an expansion, the
# rule is only considered when a node contains a single instruction.
# <special_rule> can be any of:
#
# 0: for this instruction, expand by earlier rules
# 1: expand bits <force_low> .. <force_hi> only
# 2: boolean expansion of only zero/non-zero cases
#
0: 5: 0: 5:0:: 2:0x00000000:0x00000000:0
21:31:32:-1:0:OE,LR,AA,Rc,LK:1:0x00000000:0x00000000:0
6: 9: 6: 9:0:BO: 1:0xfc000000:0x40000000:1
11:15:11:15:0:RA: 1:0xfc000000:0x38000000:2
11:15:11:15:0:RA: 1:0xfc000000:0x3c000000:2