diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 554b85b07b..a1499fe9ab 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,9 @@
+2002-03-01  Chris Demetriou  <cgd@broadcom.com>
+
+	* mips.igen (CACHE): Provide instruction-printing string.
+
+	* interp.c (signal_exception): Comment tokens after #endif.
+
 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 
 	* mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index a032763650..95f0ab63f5 100644
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -1805,7 +1805,7 @@ signal_exception (SIM_DESC sd,
 #ifdef SUBTARGET_3900
 	 /* Exception vector: BEV=0 BFC00000 / BEF=1 BFC00000  */
 	 PC = (signed)0xBFC00000;
-#endif SUBTARGET_3900
+#endif /* SUBTARGET_3900 */
 	 return;
 
        case TLBModification:
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 3c46579c20..946a99a59f 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -4348,6 +4348,7 @@
 
 
 101111,5.BASE,5.OP,16.OFFSET:NORMAL:32::CACHE
+"cache <OP>, <OFFSET>(r<BASE>)"
 *mipsIII:
 *mipsIV:
 *mipsV: