Updates for fixing tic4x arch tagging of its object files.

* bfd/coffcode.h (coff_set_flags): Added get/set arch hooks.
	* include/coff/tic4x.h (TICOFF_TARGET_MACHINE_GET): Fixed define bug
	* include/coff/ti.h (TICOFF_TARGET_MACHINE_GET): Added macros
	* ld/Makefile.am: Added etic3xcoff.o and etic4xcoff_onchip.o
	* ld/Makefile.in: Regenerate
	* ld/configure.tgt: Added extra target emulations
	* ld/emulparams/tic3xcoff.sh: Remove old settings
	* ld/emulparams/tic4xcoff.sh: Ditto
	* ld/emulparams/tic3xcoff-onchip.sh: Added new
	* ld/scripttempl/tic4xcoff.sc: Revise and combine both c3x and c4x
	* ld/scripttempl/tic3xcoff.sc: Remove
This commit is contained in:
Svein Seldal 2003-01-20 22:34:39 +00:00
parent eed2b28c05
commit 0da35f8be8
14 changed files with 180 additions and 164 deletions

View File

@ -1,3 +1,7 @@
2003-01-20 Svein E. Seldal <Svein.Seldal@solidas.com>
* coffcode.h (coff_set_flags): Added get/set arch hooks.
2003-01-20 Fabio Alemagna <falemagn@aros.org>
* elf32-sh.c: Treat elfNN_bed like other macros defined in

View File

@ -2128,6 +2128,7 @@ coff_set_arch_mach_hook (abfd, filehdr)
/* this TI COFF section should be used by all new TI COFF v0 targets */
case TICOFF0MAGIC:
arch = TICOFF_TARGET_ARCH;
machine = TICOFF_TARGET_MACHINE_GET (internal_f->f_flags);
break;
#endif
#endif
@ -2142,6 +2143,7 @@ coff_set_arch_mach_hook (abfd, filehdr)
#ifdef TI_TARGET_ID
case TI_TARGET_ID:
arch = TICOFF_TARGET_ARCH;
machine = TICOFF_TARGET_MACHINE_GET (internal_f->f_flags);
break;
#endif
default:
@ -2612,6 +2614,7 @@ coff_set_flags (abfd, magicp, flagsp)
return FALSE;
}
}
TICOFF_TARGET_MACHINE_SET (flagsp, bfd_get_mach (abfd));
return TRUE;
#endif

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@ -1,3 +1,8 @@
2003-01-20 Svein E. Seldal <Svein.Seldal@solidas.com>
* coff/tic4x.h (TICOFF_TARGET_MACHINE_GET): Fixed define bug
* coff/ti.h (TICOFF_TARGET_MACHINE_GET): Added macros
2002-07-17 Geoffrey Keating <geoffk@redhat.com>
* splay-tree.h (GTY): Define if undefined.

View File

@ -57,6 +57,14 @@ struct external_filehdr
#error "TICOFF_TARGET_ARCH needs to be defined for your CPU"
#endif
#ifndef TICOFF_TARGET_MACHINE_GET
#define TICOFF_TARGET_MACHINE_GET(FLAGS) 0
#endif
#ifndef TICOFF_TARGET_MACHINE_SET
#define TICOFF_TARGET_MACHINE_SET(FLAGSP, MACHINE)
#endif
/* Default to COFF2 for file output */
#ifndef TICOFF_DEFAULT_MAGIC
#define TICOFF_DEFAULT_MAGIC TICOFF2MAGIC

View File

@ -30,14 +30,14 @@
/* We use COFF2. */
#define TICOFF_DEFAULT_MAGIC TICOFF2MAGIC
#define TICOFF_TARGET_MACHINE_GET (FLAGS) \
#define TICOFF_TARGET_MACHINE_GET(FLAGS) \
(((FLAGS) & F_VERS) ? bfd_mach_c4x : bfd_mach_c3x)
#define TICOFF_TARGET_MACHINE_SET (FLAGSP, MACHINE) \
#define TICOFF_TARGET_MACHINE_SET(FLAGSP, MACHINE) \
do \
{ \
if ((MACHINE) == bfd_mach_c4x) \
*(FLAGSP) = F_VERS; \
*(FLAGSP) |= F_VERS; \
} \
while (0)

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@ -1,3 +1,14 @@
2003-01-19 Svein E. Seldal <Svein.Seldal@solidas.com>
* Makefile.am: Added etic3xcoff.o and etic4xcoff_onchip.o
* Makefile.in: Regenerate
* configure.tgt: Added extra target emulations
* emulparams/tic3xcoff.sh: Remove old settings
* emulparams/tic4xcoff.sh: Ditto
* emulparams/tic3xcoff-onchip.sh: Added new
* scripttempl/tic4xcoff.sc: Revise and combine both c3x and c4x
* scripttempl/tic3xcoff.sc: Remove
2003-01-17 Andreas Jaeger <aj@suse.de>
* emultempl/elf32.em (gld${EMULATION_NAME}_add_sysroot): Do not

View File

@ -324,6 +324,8 @@ ALL_EMULATIONS = \
esun4.o \
etic30aout.o \
etic30coff.o \
etic3xcoff.o \
etic3xcoff_onchip.o \
etic4xcoff.o \
etic54xcoff.o \
etic80coff.o \
@ -1299,6 +1301,12 @@ etic30aout.c: $(srcdir)/emulparams/tic30aout.sh \
etic30coff.c: $(srcdir)/emulparams/tic30coff.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/tic30coff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic30coff "$(tdir_tic30coff)"
etic3xcoff.c: $(srcdir)/emulparams/tic3xcoff.sh \
$(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic3xcoff "$(tdir_tic4xcoff)"
etic3xcoff_onchip.c: $(srcdir)/emulparams/tic3xcoff_onchip.sh \
$(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic3xcoff "$(tdir_tic4xcoff)"
etic4xcoff.c: $(srcdir)/emulparams/tic4xcoff.sh \
$(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic4xcoff "$(tdir_tic4xcoff)"

View File

@ -1,6 +1,6 @@
# Makefile.in generated automatically by automake 1.4-p6 from Makefile.am
# Makefile.in generated automatically by automake 1.4 from Makefile.am
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
@ -438,6 +438,8 @@ ALL_EMULATIONS = \
esun4.o \
etic30aout.o \
etic30coff.o \
etic3xcoff.o \
etic3xcoff_onchip.o \
etic4xcoff.o \
etic54xcoff.o \
etic80coff.o \
@ -769,7 +771,7 @@ uninstall-info:
else ii=; fi; \
list='$(INFO_DEPS)'; \
for file in $$list; do \
test -z "$$ii" \
test -z "$ii" \
|| install-info --info-dir=$(DESTDIR)$(infodir) --remove $$file; \
done
@$(NORMAL_UNINSTALL)
@ -882,7 +884,7 @@ maintainer-clean-recursive:
dot_seen=no; \
rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
rev="$$subdir $$rev"; \
test "$$subdir" != "." || dot_seen=yes; \
test "$$subdir" = "." && dot_seen=yes; \
done; \
test "$$dot_seen" = "no" && rev=". $$rev"; \
target=`echo $@ | sed s/-recursive//`; \
@ -1063,7 +1065,7 @@ distclean-generic:
-test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
maintainer-clean-generic:
-test -z "ldlex.cdeffilep.hdeffilep.cldgram.hldgram.c$(MAINTAINERCLEANFILES)" || rm -f ldlex.c deffilep.h deffilep.c ldgram.h ldgram.c $(MAINTAINERCLEANFILES)
-test -z "ldlexldeffilephdeffilepcldgramhldgramc$(MAINTAINERCLEANFILES)" || rm -f ldlexl deffileph deffilepc ldgramh ldgramc $(MAINTAINERCLEANFILES)
mostlyclean-am: mostlyclean-hdr mostlyclean-noinstPROGRAMS \
mostlyclean-compile mostlyclean-libtool \
mostlyclean-aminfo mostlyclean-tags mostlyclean-generic \
@ -2025,6 +2027,12 @@ etic30aout.c: $(srcdir)/emulparams/tic30aout.sh \
etic30coff.c: $(srcdir)/emulparams/tic30coff.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/tic30coff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic30coff "$(tdir_tic30coff)"
etic3xcoff.c: $(srcdir)/emulparams/tic3xcoff.sh \
$(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic3xcoff "$(tdir_tic4xcoff)"
etic3xcoff_onchip.c: $(srcdir)/emulparams/tic3xcoff_onchip.sh \
$(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic3xcoff "$(tdir_tic4xcoff)"
etic4xcoff.c: $(srcdir)/emulparams/tic4xcoff.sh \
$(srcdir)/emultempl/ticoff.em $(srcdir)/scripttempl/tic4xcoff.sc ${GEN_DEPENDS}
${GENSCRIPTS} tic4xcoff "$(tdir_tic4xcoff)"

View File

@ -509,7 +509,7 @@ powerpc-*-windiss*) targ_emul=elf32ppcwindiss ;;
rs6000-*-aix5*) targ_emul=aix5rs6 ;;
rs6000-*-aix*) targ_emul=aixrs6 ;;
tic30-*-*aout*) targ_emul=tic30aout ;;
tic30-*-*coff*) targ_emul=tic30coff ;;
tic30-*-*coff*) targ_emul=tic30coff ; targ_extra_emuls="tic3xcoff tic3xcoff_onchip" ;;
tic4x-*-* | c4x-*-*) targ_emul=tic4xcoff ;;
tic54x-*-* | c54x*-*-*) targ_emul=tic54xcoff ;;
tic80-*-*) targ_emul=tic80coff ;;

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@ -0,0 +1,8 @@
SCRIPT_NAME=tic4xcoff
OUTPUT_FORMAT="coff2-c4x"
OUTPUT_ARCH="c3x"
ARCH=c3x
TEMPLATE_NAME=ticoff
OUTPUT_FORMAT_TEMPLATE=tic4x
ONCHIP=yes

View File

@ -2,8 +2,5 @@ SCRIPT_NAME=tic4xcoff
OUTPUT_FORMAT="coff2-c4x"
OUTPUT_ARCH="c3x"
ARCH=c3x
#ENTRY=_c_int00
TEXT_START_ADDR=0x0080
TARGET_PAGE_SIZE=0x1000
TEMPLATE_NAME=ticoff
OUTPUT_FORMAT_TEMPLATE=tic4x

View File

@ -2,8 +2,5 @@ SCRIPT_NAME=tic4xcoff
OUTPUT_FORMAT="coff2-c4x"
OUTPUT_ARCH="c4x"
ARCH=c4x
#ENTRY=_c_int00
TEXT_START_ADDR=0x0080
TARGET_PAGE_SIZE=0x1000
TEMPLATE_NAME=ticoff
OUTPUT_FORMAT_TEMPLATE=tic4x

View File

@ -1,92 +0,0 @@
# 32 interrupt vectors + 32 trap vectors each of 4 bytes
# The .bss and .data sections need to be contiguous for direct addressing
# The data page pointer gets loaded with the start of .bss
# TI C compiler uses .cinit to initialise variables in .bss
test -z "$ENTRY" && ENTRY=_start
# These are substituted in as variables in order to get '}' in a shell
# conditional expansion.
INIT='.init : { *(.init) }'
FINI='.fini : { *(.fini) }'
cat <<EOF
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH("${OUTPUT_ARCH}")
${LIB_SEARCH_DIRS}
ENTRY(${ENTRY})
${RELOCATING+ __SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;}
${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;}
SECTIONS
{
.comms ${RELOCATING+ 64} : {
*(.comms)
}
.bss ${RELOCATING+ SIZEOF(.comms) + ADDR(.comms)} : {
${RELOCATING+ .bss = .;}
*(.bss)
*(COMMON)
${RELOCATING+ end = .;}
${RELOCATING+ _end = end;}
}
.data ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
{
${RELOCATING+ .data = .;}
*(.data)
${RELOCATING+ edata = .;}
}
.const ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
{
*(.const)
}
.cinit ${RELOCATING+ SIZEOF(.const) + ADDR(.const)} :
{
${RELOCATING+ cinit = .;}
*(.cinit)
LONG(0);
}
.text ${RELOCATING+ SIZEOF(.cinit) + ADDR(.cinit)} : {
${RELOCATING+ .text = .;}
${RELOCATING+ *(.init)}
*(.text)
${CONSTRUCTING+ ___CTOR_LIST__ = .;}
${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)}
${CONSTRUCTING+ *(.ctors)}
${CONSTRUCTING+ LONG(0);}
${CONSTRUCTING+ ___CTOR_END__ = .;}
${CONSTRUCTING+ ___DTOR_LIST__ = .;}
${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)}
${CONSTRUCTING+ *(.dtors)}
${CONSTRUCTING+ LONG(0)}
${CONSTRUCTING+ ___DTOR_END__ = .;}
${RELOCATING+ *(.fini)}
${RELOCATING+ etext = .;}
${RELOCATING+ _etext = etext;}
}
.stack ${RELOCATING+ SIZEOF(.text) + ADDR(.text)} :
{
*(.stack)
${RELOCATING+ . = . + __STACK_SIZE};
}
.sysmem ${RELOCATING+ SIZEOF(.stack) + ADDR(.stack)} :
{
*(.sysmem)
}
.heap ${RELOCATING+ SIZEOF(.sysmem) + ADDR(.sysmem)} :
{
${RELOCATING+ . += __SYSMEM_SIZE - SIZEOF(.sysmem)};
}
${RELOCATING- ${INIT}}
${RELOCATING- ${FINI}}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
/* The TI tools sets cinit to -1 if the ram model is used. */
${RELOCATING+ cinit = SIZEOF(.cinit) == 1 ? cinit : -1;}
}
EOF

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@ -1,52 +1,102 @@
# 32 interrupt vectors + 32 trap vectors each of 4 bytes
# The .bss and .data sections need to be contiguous for direct addressing
# The data page pointer gets loaded with the start of .bss
# TI C compiler uses .cinit to initialise variables in .bss
# In microcomputer (MC) mode, the vectors are mapped into the on-chip ROM,
# otherwise in microprocessor (MP) mode the vectors are mapped to address 0
# on the external bus. In MC mode, the on-chip ROM contains a bootloader program
# that loads the internal RAM from the serial port or external ROM.
#
# Common configurations:
# 1. MC mode, no external memory (serial boot).
# 2. MC mode, external RAM (serial boot).
# 3. MC mode, external ROM.
# 4. MC mode, external ROM, external RAM.
# 5. MP mode, external ROM.
# 6. MP mode, external ROM, external RAM.
# 7. MP mode, external RAM (dual-port with hosting CPU or external debugger).
#
# Config TEXT DATA/BSS
# 1. INT_RAM INT_RAM (mcmode,onchip)
# 2. EXT_RAM EXT_RAM (mcmode,extram)
# 3. INT_RAM INT_RAM (mcmode,onchip)
# 4. EXT_RAM EXT_RAM (mcmode,extram)
# 5. EXT_ROM INT_RAM (mpmode,onchip,extrom)
# 6. EXT_ROM EXT_RAM (mpmode,extram,extrom)
# 7. EXT_RAM EXT_RAM (mpmode,extram)
#
# In MC mode, TEXT and DATA are copied into RAM by the bootloader.
#
# In MP mode with external ROM, DATA needs to be copied into RAM at boot time.
#
# If there is external RAM it is better to use that and reserve the internal RAM
# for data buffers. However, the address of the external RAM needs to be specified.
#
# This emulation assumes config 7.
case $OUTPUT_ARCH in
c3x) OUTPUT_ARCHNAME="TMS320C3x" ;;
c4x) OUTPUT_ARCHNAME="TMS320C4x" ;;
esac
case $ONCHIP in
yes) RAM=RAM;
STACK_SIZE_DEFAULT=128;
HEAP_SIZE_DEFAULT=0;
;;
*) RAM=EXT0;
STACK_SIZE_DEFAULT=0x1000;
HEAP_SIZE_DEFAULT=0x4000;
;;
esac
TEXT_MEMORY=$RAM;
DATA_MEMORY=$RAM;
MEMORY_DEF="
/* C30 memory space. */
MEMORY
{
EXT0 : org = 0x0000000, len = 0x800000 /* External address bus. */
XBUS : org = 0x0800000, len = 0x002000 /* Expansion bus. */
IOBUS : org = 0x0804000, len = 0x002000 /* I/O BUS. */
RAM0 : org = 0x0809800, len = 0x000400 /* Internal RAM block 0. */
RAM1 : org = 0x0809a00, len = 0x000400 /* Internal RAM block 1. */
RAM : org = 0x0809800, len = 0x000800 /* Internal RAM. */
EXT1 : org = 0x080a000, len = 0x7f6000 /* External address bus. */
}
"
test -z "$ENTRY" && ENTRY=_start
# These are substituted in as variables in order to get '}' in a shell
# conditional expansion.
INIT='.init : { *(.init) }'
FINI='.fini : { *(.fini) }'
cat <<EOF
${RELOCATING+/* Linker script for $OUTPUT_ARCHNAME executable. */}
${RELOCATING-/* Linker script for $OUTPUT_ARCHNAME object file (ld -r). */}
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH("${OUTPUT_ARCH}")
${LIB_SEARCH_DIRS}
ENTRY(${ENTRY})
${RELOCATING+ __SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;}
${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;}
${RELOCATING+ __HEAP_SIZE = DEFINED(__HEAP_SIZE) ? __HEAP_SIZE : ${HEAP_SIZE_DEFAULT};}
${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : ${STACK_SIZE_DEFAULT};}
${RELOCATING+${MEMORY_DEF}}
/* In the small memory model the .data and .bss sections must be contiguous
when loaded and fit within the same page. The DP register is loaded
with the page address. */
SECTIONS
{
.comms ${RELOCATING+ 64} : {
*(.comms)
}
.bss ${RELOCATING+ SIZEOF(.comms) + ADDR(.comms)} : {
${RELOCATING+ .bss = .;}
*(.bss)
*(COMMON)
${RELOCATING+ end = .;}
${RELOCATING+ _end = end;}
}
.data ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
{
${RELOCATING+ .data = .;}
*(.data)
${RELOCATING+ edata = .;}
}
.const ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
{
/* Reset, interrupt, and trap vectors. */
.vectors ${RELOCATING+ 0} : {
*(.vectors)
} ${RELOCATING+ > ${TEXT_MEMORY}}
/* Constants. */
.const : {
*(.const)
}
.cinit ${RELOCATING+ SIZEOF(.const) + ADDR(.const)} :
{
${RELOCATING+ cinit = .;}
*(.cinit)
LONG(0);
}
.text ${RELOCATING+ SIZEOF(.cinit) + ADDR(.cinit)} : {
${RELOCATING+ .text = .;}
} ${RELOCATING+ > ${TEXT_MEMORY}}
/* Program code. */
.text : {
${RELOCATING+ __text = .;}
${RELOCATING+ *(.init)}
*(.text)
${CONSTRUCTING+ ___CTOR_LIST__ = .;}
@ -60,33 +110,42 @@ SECTIONS
${CONSTRUCTING+ LONG(0)}
${CONSTRUCTING+ ___DTOR_END__ = .;}
${RELOCATING+ *(.fini)}
${RELOCATING+ etext = .;}
${RELOCATING+ _etext = etext;}
}
.stack ${RELOCATING+ SIZEOF(.text) + ADDR(.text)} :
${RELOCATING+ __etext = .;}
} ${RELOCATING+ > ${TEXT_MEMORY}}
/* Global initialised variables. */
.data :
{
${RELOCATING+ __data = .;}
*(.data)
${RELOCATING+ __edata = .;}
} ${RELOCATING+ > ${DATA_MEMORY}}
/* Global uninitialised variables. */
.bss : {
${RELOCATING+ __bss = .;}
*(.bss)
*(COMMON)
${RELOCATING+ __end = .;}
} ${RELOCATING+ > ${DATA_MEMORY}}
/* Heap. */
.heap :
{
${RELOCATING+ __heap = .;}
${RELOCATING+ . += __HEAP_SIZE};
} ${RELOCATING+ > ${DATA_MEMORY}}
/* Stack (grows upward). */
.stack :
{
${RELOCATING+ __stack = .;}
*(.stack)
${RELOCATING+ . = . + __STACK_SIZE};
}
.sysmem ${RELOCATING+ SIZEOF(.stack) + ADDR(.stack)} :
{
*(.sysmem)
}
.heap ${RELOCATING+ SIZEOF(.sysmem) + ADDR(.sysmem)} :
{
${RELOCATING+ . += __SYSMEM_SIZE - SIZEOF(.sysmem)};
}
${RELOCATING- ${INIT}}
${RELOCATING- ${FINI}}
.stab 0 ${RELOCATING+(NOLOAD)} :
} ${RELOCATING+ > ${DATA_MEMORY}}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
/* The TI tools sets cinit to -1 if the ram model is used. */
${RELOCATING+ cinit = SIZEOF(.cinit) == 1 ? cinit : -1;}
}
EOF