gas/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com> PR gas/10636 * config/tc-i386.c (optimize_disp): Set disp32 for 64bit only if there is an ADDR_PREFIX. (i386_finalize_displacement): Repor error if signed 32bit displacement is out of range. gas/testsuite/ 2009-09-14 H.J. Lu <hongjiu.lu@intel.com> PR gas/10636 * gas/i386/disp.d: New. * gas/i386/disp.s: Likewise. * gas/i386/x86-64-disp.d: Likewise. * gas/i386/x86-64-disp.s: Likewise. * gas/i386/i386.exp: Run disp and x86-64-disp. * gas/i386/x86-64-addr32.s: Add high 32bit displacement tests. * gas/i386/x86-64-addr32.d: Updated. * gas/i386/x86-64-addr32-intel.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. * gas/i386/x86-64-prescott.d: Likewise. * gas/i386/x86-64-inval.s: Add invalid displacement tests. * gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement with 0x909090.
This commit is contained in:
H.J. Lu
parent
c244d0505e
commit
0e1147d951
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@ -1,3 +1,11 @@
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2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/10636
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* config/tc-i386.c (optimize_disp): Set disp32 for 64bit only
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if there is an ADDR_PREFIX.
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(i386_finalize_displacement): Repor error if signed 32bit
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displacement is out of range.
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2009-09-13 Richard Sandiford <rdsandiford@googlemail.com>
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* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument.
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@ -3618,7 +3618,8 @@ optimize_disp (void)
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i.types[op].bitfield.disp64 = 0;
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i.types[op].bitfield.disp32s = 1;
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}
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if (fits_in_unsigned_long (disp))
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if (i.prefix[ADDR_PREFIX]
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&& fits_in_unsigned_long (disp))
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i.types[op].bitfield.disp32 = 1;
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}
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if ((i.types[op].bitfield.disp32
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@ -6567,6 +6568,25 @@ i386_finalize_displacement (segT exp_seg ATTRIBUTE_UNUSED, expressionS *exp,
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ret = 0;
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}
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else if (flag_code == CODE_64BIT
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&& !i.prefix[ADDR_PREFIX]
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&& exp->X_op == O_constant)
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{
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/* Since displacement is signed extended to 64bit, don't allow
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disp32 and turn off disp32s if they are out of range. */
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i.types[this_operand].bitfield.disp32 = 0;
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if (!fits_in_signed_long (exp->X_add_number))
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{
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i.types[this_operand].bitfield.disp32s = 0;
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if (i.types[this_operand].bitfield.baseindex)
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{
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as_bad (_("0x%lx out range of signed 32bit displacement"),
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(long) exp->X_add_number);
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ret = 0;
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}
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}
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}
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#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
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else if (exp->X_op != O_constant
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&& OUTPUT_FLAVOR == bfd_target_aout_flavour
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@ -1,3 +1,25 @@
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2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/10636
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* gas/i386/disp.d: New.
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* gas/i386/disp.s: Likewise.
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* gas/i386/x86-64-disp.d: Likewise.
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* gas/i386/x86-64-disp.s: Likewise.
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* gas/i386/i386.exp: Run disp and x86-64-disp.
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* gas/i386/x86-64-addr32.s: Add high 32bit displacement tests.
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* gas/i386/x86-64-addr32.d: Updated.
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* gas/i386/x86-64-addr32-intel.d: Likewise.
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* gas/i386/x86-64-inval.l: Likewise.
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* gas/i386/x86-64-prescott.d: Likewise.
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* gas/i386/x86-64-inval.s: Add invalid displacement tests.
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* gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement
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with 0x909090.
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2009-09-13 Richard Sandiford <rdsandiford@googlemail.com>
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* gas/mips/jalr2.s, gas/mips/jalr2.d: New test.
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@ -0,0 +1,19 @@
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#as: -J
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#objdump: -drw
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#name: i386 displacement
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.*: +file format .*
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Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: 8b 98 ff ff ff 7f mov 0x7fffffff\(%eax\),%ebx
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[ ]*[a-f0-9]+: 8b 98 00 00 00 80 mov -0x80000000\(%eax\),%ebx
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[ ]*[a-f0-9]+: 8b 98 00 00 00 80 mov -0x80000000\(%eax\),%ebx
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[ ]*[a-f0-9]+: 8b 1d ff ff ff 7f mov 0x7fffffff,%ebx
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[ ]*[a-f0-9]+: 8b 1d 00 00 00 80 mov 0x80000000,%ebx
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[ ]*[a-f0-9]+: 8b 1d 00 00 00 80 mov 0x80000000,%ebx
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[ ]*[a-f0-9]+: a1 ff ff ff 7f mov 0x7fffffff,%eax
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[ ]*[a-f0-9]+: a1 00 00 00 80 mov 0x80000000,%eax
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[ ]*[a-f0-9]+: a1 00 00 00 80 mov 0x80000000,%eax
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#pass
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@ -0,0 +1,10 @@
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.text
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mov 0x7fffffff(%eax),%ebx
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mov 0x80000000(%eax),%ebx
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mov -0x80000000(%eax),%ebx
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mov 0x7fffffff,%ebx
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mov 0x80000000,%ebx
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mov -0x80000000,%ebx
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mov 0x7fffffff,%eax
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mov 0x80000000,%eax
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mov -0x80000000,%eax
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@ -47,6 +47,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
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run_dump_test "prescott"
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run_dump_test "sib"
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run_dump_test "sib-intel"
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run_dump_test "disp"
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run_dump_test "vmx"
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run_dump_test "smx"
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run_dump_test "suffix"
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@ -280,6 +281,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-reg-intel"
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run_dump_test "x86-64-sib"
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run_dump_test "x86-64-sib-intel"
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run_dump_test "x86-64-disp"
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if { ![istarget "*-*-mingw*"] } then {
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run_dump_test "x86-64-opcode-inval"
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run_dump_test "x86-64-opcode-inval-intel"
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@ -7,17 +7,21 @@
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Disassembly of section .text:
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0+000 <.text>:
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[ ]*0:[ ]+67 48 8d 80 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[[re]ax\+(0x)?0\].*
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[ ]*8:[ ]+67 49 8d 80 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[r8d?\+(0x)?0\].*
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[ ]*10:[ ]+67 48 8d 05 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[[re]ip\+(0x)?0\].*
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[ ]*18:[ ]+67 48 8d 04 25 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,ds:0x0.*
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[ ]*21:[ ]+67 a0 98 08 60 00[ ]+addr32[ ]+mov[ ]+al,ds:0x600898
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[ ]*27:[ ]+67 66 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+ax,ds:0x600898
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[ ]*2e:[ ]+67 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+eax,ds:0x600898
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[ ]*34:[ ]+67 48 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+rax,ds:0x600898
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[ ]*3b:[ ]+67 a2 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,al
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[ ]*41:[ ]+67 66 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,ax
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[ ]*48:[ ]+67 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,eax
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[ ]*4e:[ ]+67 48 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,rax
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0+ <.text>:
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[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00 addr32 lea rax,\[eax\+0x0\].*
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[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00 addr32 lea rax,\[r8d\+0x0\].*
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[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00 addr32 lea rax,\[eip\+0x0\].*
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[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 addr32 lea rax,ds:0x0.*
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[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov al,ds:0x600898
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[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov ax,ds:0x600898
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[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov eax,ds:0x600898
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[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov rax,ds:0x600898
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[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov rax,ds:0x800898
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[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 addr32 mov rbx,QWORD PTR ds:0x800898
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[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov ds:0x600898,al
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[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov ds:0x600898,ax
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[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov ds:0x600898,eax
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[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov ds:0x600898,rax
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[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov ds:0x800898,rax
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[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 addr32 mov QWORD PTR ds:0x800898,rbx
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#pass
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@ -6,17 +6,21 @@
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Disassembly of section .text:
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0+000 <.text>:
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[ ]*0:[ ]+67 48 8d 80 00 00 00 00[ ]+(addr32[ ]+)?lea[ ]+0x0\(%eax\),%rax.*
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[ ]*8:[ ]+67 49 8d 80 00 00 00 00[ ]+(addr32[ ]+)?lea[ ]+0x0\(%r8d\),%rax.*
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[ ]*10:[ ]+67 48 8d 05 00 00 00 00[ ]+(addr32[ ]+)?lea[ ]+0x0\(%eip\),%rax.*
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[ ]*18:[ ]+67 48 8d 04 25 00 00 00 00[ ]+addr32[ ]+lea[ ]+0x0,%rax.*
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[ ]*21:[ ]+67 a0 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%al
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[ ]*27:[ ]+67 66 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%ax
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[ ]*2e:[ ]+67 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%eax
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[ ]*34:[ ]+67 48 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+0x600898,%rax
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[ ]*3b:[ ]+67 a2 98 08 60 00[ ]+addr32[ ]+mov[ ]+%al,0x600898
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[ ]*41:[ ]+67 66 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+%ax,0x600898
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[ ]*48:[ ]+67 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+%eax,0x600898
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[ ]*4e:[ ]+67 48 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+%rax,0x600898
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0+ <.text>:
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[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00 addr32 lea 0x0\(%eax\),%rax.*
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[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00 addr32 lea 0x0\(%r8d\),%rax.*
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[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00 addr32 lea 0x0\(%eip\),%rax.*
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[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 addr32 lea 0x0,%rax.*
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[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov 0x600898,%al
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[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov 0x600898,%ax
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[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov 0x600898,%eax
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[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov 0x600898,%rax
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[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov 0x800898,%rax
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[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 addr32 mov 0x800898,%rbx
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[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov %al,0x600898
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[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov %ax,0x600898
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[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov %eax,0x600898
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[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov %rax,0x600898
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[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov %rax,0x800898
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[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 addr32 mov %rbx,0x800898
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#pass
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@ -7,7 +7,11 @@
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addr32 mov 0x600898,%ax
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addr32 mov 0x600898,%eax
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addr32 mov 0x600898,%rax
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addr32 mov 0x800898,%rax
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addr32 mov 0x800898,%rbx
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addr32 mov %al,0x600898
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addr32 mov %ax,0x600898
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addr32 mov %eax,0x600898
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addr32 mov %rax,0x600898
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addr32 mov %rax,0x800898
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addr32 mov %rbx,0x800898
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@ -0,0 +1,19 @@
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#as: -J
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#objdump: -drw
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#name: x86-64 displacement
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.*: +file format .*
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Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: 8b 98 ff ff ff 7f mov 0x7fffffff\(%rax\),%ebx
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[ ]*[a-f0-9]+: 8b 98 00 00 00 80 mov -0x80000000\(%rax\),%ebx
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[ ]*[a-f0-9]+: 8b 1c 25 00 00 00 80 mov 0xffffffff80000000,%ebx
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[ ]*[a-f0-9]+: 8b 1c 25 00 00 00 80 mov 0xffffffff80000000,%ebx
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[ ]*[a-f0-9]+: 8b 1c 25 ff ff ff 7f mov 0x7fffffff,%ebx
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov 0xffffffff80000000,%eax
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov 0xffffffff80000000,%eax
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[ ]*[a-f0-9]+: 8b 04 25 ff ff ff 7f mov 0x7fffffff,%eax
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[ ]*[a-f0-9]+: a1 00 00 00 80 00 00 00 00 mov 0x80000000,%eax
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#pass
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@ -0,0 +1,9 @@
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mov 0x7fffffff(%rax),%ebx
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mov -0x80000000(%rax),%ebx
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mov -0x80000000,%ebx
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mov 0xffffffff80000000,%ebx
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mov 0x7fffffff,%ebx
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mov -0x80000000,%eax
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mov 0xffffffff80000000,%eax
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mov 0x7fffffff,%eax
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mov 0x80000000,%eax
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@ -61,9 +61,8 @@
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.*:62: Error: .*
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.*:63: Error: .*
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.*:64: Error: .*
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.*:66: Error: .*
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.*:67: Error: .*
|
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.*:68: Error: .*
|
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.*:69: Error: .*
|
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.*:70: Error: .*
|
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.*:71: Error: .*
|
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.*:72: Error: .*
|
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|
|
@ -95,6 +94,9 @@
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.*:98: Error: .*
|
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.*:99: Error: .*
|
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.*:100: Error: .*
|
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.*:101: Error: .*
|
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.*:102: Error: .*
|
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.*:103: Error: .*
|
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GAS LISTING .*
|
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|
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|
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|
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@ -166,38 +168,41 @@ GAS LISTING .*
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[ ]*63[ ]+movnti %ax, \(%rax\)
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[ ]*64[ ]+movntiw %ax, \(%rax\)
|
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[ ]*65[ ]+
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[ ]*66[ ]+\.intel_syntax noprefix
|
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[ ]*67[ ]+cmpxchg16b dword ptr \[rax\] \# Must be oword
|
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[ ]*68[ ]+movq xmm1, XMMWORD PTR \[rsp\]
|
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[ ]*69[ ]+movq xmm1, DWORD PTR \[rsp\]
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[ ]*70[ ]+movq xmm1, WORD PTR \[rsp\]
|
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[ ]*71[ ]+movq xmm1, BYTE PTR \[rsp\]
|
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[ ]*72[ ]+movq XMMWORD PTR \[rsp\],xmm1
|
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[ ]*73[ ]+movq DWORD PTR \[rsp\],xmm1
|
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[ ]*74[ ]+movq WORD PTR \[rsp\],xmm1
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[ ]*75[ ]+movq BYTE PTR \[rsp\],xmm1
|
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[ ]*76[ ]+fnstsw eax
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[ ]*77[ ]+fnstsw al
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[ ]*78[ ]+fstsw eax
|
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[ ]*79[ ]+fstsw al
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[ ]*80[ ]+in rax,8
|
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[ ]*81[ ]+out 8,rax
|
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[ ]*82[ ]+movsx ax, \[rax\]
|
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[ ]*83[ ]+movsx eax, \[rax\]
|
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[ ]*84[ ]+movsx rax, \[rax\]
|
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[ ]*85[ ]+movzx ax, \[rax\]
|
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[ ]*86[ ]+movzx eax, \[rax\]
|
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[ ]*87[ ]+movzx rax, \[rax\]
|
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[ ]*88[ ]+movnti word ptr \[rax\], ax
|
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[ ]*89[ ]+calld eax \# 32-bit data size not allowed
|
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[ ]*90[ ]+calld \[ax\] \# 32-bit data size not allowed
|
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[ ]*91[ ]+calld \[eax\] \# 32-bit data size not allowed
|
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[ ]*92[ ]+calld \[r8\] \# 32-bit data size not allowed
|
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[ ]*93[ ]+calld \[rax\] \# 32-bit data size not allowed
|
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[ ]*94[ ]+callq \[ax\] \# no 16-bit addressing
|
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[ ]*95[ ]+jmpd eax \# 32-bit data size not allowed
|
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[ ]*96[ ]+jmpd \[ax\] \# 32-bit data size not allowed
|
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[ ]*97[ ]+jmpd \[eax\] \# 32-bit data size not allowed
|
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[ ]*98[ ]+jmpd \[r8\] \# 32-bit data size not allowed
|
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[ ]*99[ ]+jmpd \[rax\] \# 32-bit data size not allowed
|
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[ ]*100[ ]+jmpq \[ax\] \# no 16-bit addressing
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[ ]*66[ ]+mov 0x80000000\(%rax\),%ebx
|
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[ ]*67[ ]+mov 0x80000000,%ebx
|
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[ ]*68[ ]+
|
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[ ]*69[ ]+\.intel_syntax noprefix
|
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[ ]*70[ ]+cmpxchg16b dword ptr \[rax\] \# Must be oword
|
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[ ]*71[ ]+movq xmm1, XMMWORD PTR \[rsp\]
|
||||
[ ]*72[ ]+movq xmm1, DWORD PTR \[rsp\]
|
||||
[ ]*73[ ]+movq xmm1, WORD PTR \[rsp\]
|
||||
[ ]*74[ ]+movq xmm1, BYTE PTR \[rsp\]
|
||||
[ ]*75[ ]+movq XMMWORD PTR \[rsp\],xmm1
|
||||
[ ]*76[ ]+movq DWORD PTR \[rsp\],xmm1
|
||||
[ ]*77[ ]+movq WORD PTR \[rsp\],xmm1
|
||||
[ ]*78[ ]+movq BYTE PTR \[rsp\],xmm1
|
||||
[ ]*79[ ]+fnstsw eax
|
||||
[ ]*80[ ]+fnstsw al
|
||||
[ ]*81[ ]+fstsw eax
|
||||
[ ]*82[ ]+fstsw al
|
||||
[ ]*83[ ]+in rax,8
|
||||
[ ]*84[ ]+out 8,rax
|
||||
[ ]*85[ ]+movsx ax, \[rax\]
|
||||
[ ]*86[ ]+movsx eax, \[rax\]
|
||||
[ ]*87[ ]+movsx rax, \[rax\]
|
||||
[ ]*88[ ]+movzx ax, \[rax\]
|
||||
[ ]*89[ ]+movzx eax, \[rax\]
|
||||
[ ]*90[ ]+movzx rax, \[rax\]
|
||||
[ ]*91[ ]+movnti word ptr \[rax\], ax
|
||||
[ ]*92[ ]+calld eax \# 32-bit data size not allowed
|
||||
[ ]*93[ ]+calld \[ax\] \# 32-bit data size not allowed
|
||||
[ ]*94[ ]+calld \[eax\] \# 32-bit data size not allowed
|
||||
[ ]*95[ ]+calld \[r8\] \# 32-bit data size not allowed
|
||||
[ ]*96[ ]+calld \[rax\] \# 32-bit data size not allowed
|
||||
[ ]*97[ ]+callq \[ax\] \# no 16-bit addressing
|
||||
[ ]*98[ ]+jmpd eax \# 32-bit data size not allowed
|
||||
[ ]*99[ ]+jmpd \[ax\] \# 32-bit data size not allowed
|
||||
[ ]*100[ ]+jmpd \[eax\] \# 32-bit data size not allowed
|
||||
[ ]*101[ ]+jmpd \[r8\] \# 32-bit data size not allowed
|
||||
[ ]*102[ ]+jmpd \[rax\] \# 32-bit data size not allowed
|
||||
[ ]*103[ ]+jmpq \[ax\] \# no 16-bit addressing
|
||||
|
|
|
|||
|
|
@ -63,6 +63,9 @@ movzxl (%rax),%rax
|
|||
movnti %ax, (%rax)
|
||||
movntiw %ax, (%rax)
|
||||
|
||||
mov 0x80000000(%rax),%ebx
|
||||
mov 0x80000000,%ebx
|
||||
|
||||
.intel_syntax noprefix
|
||||
cmpxchg16b dword ptr [rax] # Must be oword
|
||||
movq xmm1, XMMWORD PTR [rsp]
|
||||
|
|
|
|||
|
|
@ -10,9 +10,9 @@ Disassembly of section .text:
|
|||
4: 66 0f d0 ca [ ]*addsubpd %xmm2,%xmm1
|
||||
8: f2 0f d0 13 [ ]*addsubps \(%rbx\),%xmm2
|
||||
c: f2 0f d0 dc [ ]*addsubps %xmm4,%xmm3
|
||||
10: df 88 90 90 90 90 [ ]*fisttp -0x6f6f6f70\(%rax\)
|
||||
16: db 88 90 90 90 90 [ ]*fisttpl -0x6f6f6f70\(%rax\)
|
||||
1c: dd 88 90 90 90 90 [ ]*fisttpll -0x6f6f6f70\(%rax\)
|
||||
10: df 88 90 90 90 00 [ ]*fisttp 0x909090\(%rax\)
|
||||
16: db 88 90 90 90 00 [ ]*fisttpl 0x909090\(%rax\)
|
||||
1c: dd 88 90 90 90 00 [ ]*fisttpll 0x909090\(%rax\)
|
||||
22: 66 0f 7c 65 00 [ ]*haddpd 0x0\(%rbp\),%xmm4
|
||||
27: 66 0f 7c ee [ ]*haddpd %xmm6,%xmm5
|
||||
2b: f2 0f 7c 37 [ ]*haddps \(%rdi\),%xmm6
|
||||
|
|
|
|||
|
|
@ -6,9 +6,9 @@ foo:
|
|||
addsubpd %xmm2,%xmm1
|
||||
addsubps (%rbx),%xmm2
|
||||
addsubps %xmm4,%xmm3
|
||||
fisttp 0x90909090(%rax)
|
||||
fisttpl 0x90909090(%rax)
|
||||
fisttpll 0x90909090(%rax)
|
||||
fisttp 0x909090(%rax)
|
||||
fisttpl 0x909090(%rax)
|
||||
fisttpll 0x909090(%rax)
|
||||
haddpd 0x0(%rbp),%xmm4
|
||||
haddpd %xmm6,%xmm5
|
||||
haddps (%rdi),%xmm6
|
||||
|
|
|
|||
Loading…
Reference in New Issue