This commit is contained in:
Victoria Mixon 1995-11-10 19:28:36 +00:00
parent b94ff92428
commit 0e68864241
5 changed files with 752 additions and 9 deletions

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@ -116,8 +116,8 @@ The AMD 29K family uses @sc{ieee} floating-point numbers.
@cindex machine directives, AMD 29K
@cindex AMD 29K machine directives
@table @code
@item .block @var{size} , @var{fill}
@cindex @code{block} directive, AMD 29K
@item .block @var{size} , @var{fill}
This directive emits @var{size} bytes, each of value @var{fill}. Both
@var{size} and @var{fill} are absolute expressions. If the comma
and @var{fill} are omitted, @var{fill} is assumed to be zero.
@ -127,13 +127,13 @@ In other versions of the @sc{gnu} assembler, this directive is called
@end table
@table @code
@item .cputype
@cindex @code{cputype} directive, AMD 29K
@item .cputype
This directive is ignored; it is accepted for compatibility with other
AMD 29K assemblers.
@item .file
@cindex @code{file} directive, AMD 29K
@item .file
This directive is ignored; it is accepted for compatibility with other
AMD 29K assemblers.
@ -142,25 +142,25 @@ AMD 29K assemblers.
used for the directive called @code{.app-file} in the AMD 29K support.
@end quotation
@item .line
@cindex @code{line} directive, AMD 29K
@item .line
This directive is ignored; it is accepted for compatibility with other
AMD 29K assemblers.
@ignore
@c since we're ignoring .lsym...
@item .reg @var{symbol}, @var{expression}
@cindex @code{reg} directive, AMD 29K
@item .reg @var{symbol}, @var{expression}
@code{.reg} has the same effect as @code{.lsym}; @pxref{Lsym,,@code{.lsym}}.
@end ignore
@item .sect
@cindex @code{sect} directive, AMD 29K
@item .sect
This directive is ignored; it is accepted for compatibility with other
AMD 29K assemblers.
@item .use @var{section name}
@cindex @code{use} directive, AMD 29K
@item .use @var{section name}
Establishes the section and subsection for the following code;
@var{section name} may be one of @code{.text}, @code{.data},
@code{.data1}, or @code{.lit}. With one of the first three @var{section

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@c Copyright (C) 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@node i960-Dependent
@chapter Intel 80960 Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter Intel 80960 Dependent Features
@end ifclear
@cindex i960 support
@menu
* Options-i960:: i960 Command-line Options
* Floating Point-i960:: Floating Point
* Directives-i960:: i960 Machine Directives
* Opcodes for i960:: i960 Opcodes
@end menu
@c FIXME! Add Syntax sec with discussion of bitfields here, at least so
@c long as they're not turned on for other machines than 960.
@node Options-i960
@section i960 Command-line Options
@cindex i960 options
@cindex options, i960
@table @code
@cindex i960 architecture options
@cindex architecture options, i960
@cindex @code{-A} options, i960
@item -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC
Select the 80960 architecture. Instructions or features not supported
by the selected architecture cause fatal errors.
@samp{-ACA} is equivalent to @samp{-ACA_A}; @samp{-AKC} is equivalent to
@samp{-AMC}. Synonyms are provided for compatibility with other tools.
If you do not specify any of these options, @code{@value{AS}} generates code
for any instruction or feature that is supported by @emph{some} version of the
960 (even if this means mixing architectures!). In principle,
@code{@value{AS}} attempts to deduce the minimal sufficient processor type if
none is specified; depending on the object code format, the processor type may
be recorded in the object file. If it is critical that the @code{@value{AS}}
output match a specific architecture, specify that architecture explicitly.
@cindex @code{-b} option, i960
@cindex branch recording, i960
@cindex i960 branch recording
@item -b
Add code to collect information about conditional branches taken, for
later optimization using branch prediction bits. (The conditional branch
instructions have branch prediction bits in the CA, CB, and CC
architectures.) If @var{BR} represents a conditional branch instruction,
the following represents the code generated by the assembler when
@samp{-b} is specified:
@smallexample
call @var{increment routine}
.word 0 # pre-counter
Label: @var{BR}
call @var{increment routine}
.word 0 # post-counter
@end smallexample
The counter following a branch records the number of times that branch
was @emph{not} taken; the differenc between the two counters is the
number of times the branch @emph{was} taken.
@cindex @code{gbr960}, i960 postprocessor
@cindex branch statistics table, i960
A table of every such @code{Label} is also generated, so that the
external postprocessor @code{gbr960} (supplied by Intel) can locate all
the counters. This table is always labelled @samp{__BRANCH_TABLE__};
this is a local symbol to permit collecting statistics for many separate
object files. The table is word aligned, and begins with a two-word
header. The first word, initialized to 0, is used in maintaining linked
lists of branch tables. The second word is a count of the number of
entries in the table, which follow immediately: each is a word, pointing
to one of the labels illustrated above.
@c TEXI2ROFF-KILL
@ifinfo
@c END TEXI2ROFF-KILL
@example
+------------+------------+------------+ ... +------------+
| | | | | |
| *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N |
| | | | | |
+------------+------------+------------+ ... +------------+
__BRANCH_TABLE__ layout
@end example
@c TEXI2ROFF-KILL
@end ifinfo
@need 2000
@tex
\vskip 1pc
\line{\leftskip=0pt\hskip\tableindent
\boxit{2cm}{\tt *NEXT}\boxit{2cm}{\tt COUNT: \it N}\boxit{2cm}{\tt
*BRLAB 1}\ibox{1cm}{\quad\dots}\boxit{2cm}{\tt *BRLAB \it N}\hfil}
\centerline{\it {\tt \_\_BRANCH\_TABLE\_\_} layout}
@end tex
@c END TEXI2ROFF-KILL
The first word of the header is used to locate multiple branch tables,
since each object file may contain one. Normally the links are
maintained with a call to an initialization routine, placed at the
beginning of each function in the file. The @sc{gnu} C compiler
generates these calls automatically when you give it a @samp{-b} option.
For further details, see the documentation of @samp{gbr960}.
@cindex @code{-no-relax} option, i960
@item -no-relax
Normally, Compare-and-Branch instructions with targets that require
displacements greater than 13 bits (or that have external targets) are
replaced with the corresponding compare (or @samp{chkbit}) and branch
instructions. You can use the @samp{-no-relax} option to specify that
@code{@value{AS}} should generate errors instead, if the target displacement
is larger than 13 bits.
This option does not affect the Compare-and-Jump instructions; the code
emitted for them is @emph{always} adjusted when necessary (depending on
displacement size), regardless of whether you use @samp{-no-relax}.
@end table
@node Floating Point-i960
@section Floating Point
@cindex floating point, i960 (@sc{ieee})
@cindex i960 floating point (@sc{ieee})
@code{@value{AS}} generates @sc{ieee} floating-point numbers for the directives
@samp{.float}, @samp{.double}, @samp{.extended}, and @samp{.single}.
@node Directives-i960
@section i960 Machine Directives
@cindex machine directives, i960
@cindex i960 machine directives
@table @code
@cindex @code{bss} directive, i960
@item .bss @var{symbol}, @var{length}, @var{align}
Reserve @var{length} bytes in the bss section for a local @var{symbol},
aligned to the power of two specified by @var{align}. @var{length} and
@var{align} must be positive absolute expressions. This directive
differs from @samp{.lcomm} only in that it permits you to specify
an alignment. @xref{Lcomm,,@code{.lcomm}}.
@end table
@table @code
@cindex @code{extended} directive, i96
@item .extended @var{flonums}
@code{.extended} expects zero or more flonums, separated by commas; for
each flonum, @samp{.extended} emits an @sc{ieee} extended-format (80-bit)
floating-point number.
@cindex @code{leafproc} directive, i960
@item .leafproc @var{call-lab}, @var{bal-lab}
You can use the @samp{.leafproc} directive in conjunction with the
optimized @code{callj} instruction to enable faster calls of leaf
procedures. If a procedure is known to call no other procedures, you
may define an entry point that skips procedure prolog code (and that does
not depend on system-supplied saved context), and declare it as the
@var{bal-lab} using @samp{.leafproc}. If the procedure also has an
entry point that goes through the normal prolog, you can specify that
entry point as @var{call-lab}.
A @samp{.leafproc} declaration is meant for use in conjunction with the
optimized call instruction @samp{callj}; the directive records the data
needed later to choose between converting the @samp{callj} into a
@code{bal} or a @code{call}.
@var{call-lab} is optional; if only one argument is present, or if the
two arguments are identical, the single argument is assumed to be the
@code{bal} entry point.
@cindex @code{sysproc} directive, i960
@item .sysproc @var{name}, @var{index}
The @samp{.sysproc} directive defines a name for a system procedure.
After you define it using @samp{.sysproc}, you can use @var{name} to
refer to the system procedure identified by @var{index} when calling
procedures with the optimized call instruction @samp{callj}.
Both arguments are required; @var{index} must be between 0 and 31
(inclusive).
@end table
@node Opcodes for i960
@section i960 Opcodes
@cindex opcodes, i960
@cindex i960 opcodes
All Intel 960 machine instructions are supported;
@pxref{Options-i960,,i960 Command-line Options} for a discussion of
selecting the instruction subset for a particular 960
architecture.@refill
Some opcodes are processed beyond simply emitting a single corresponding
instruction: @samp{callj}, and Compare-and-Branch or Compare-and-Jump
instructions with target displacements larger than 13 bits.
@menu
* callj-i960:: @code{callj}
* Compare-and-branch-i960:: Compare-and-Branch
@end menu
@node callj-i960
@subsection @code{callj}
@cindex @code{callj}, i960 pseudo-opcode
@cindex i960 @code{callj} pseudo-opcode
You can write @code{callj} to have the assembler or the linker determine
the most appropriate form of subroutine call: @samp{call},
@samp{bal}, or @samp{calls}. If the assembly source contains
enough information---a @samp{.leafproc} or @samp{.sysproc} directive
defining the operand---then @code{@value{AS}} translates the
@code{callj}; if not, it simply emits the @code{callj}, leaving it
for the linker to resolve.
@node Compare-and-branch-i960
@subsection Compare-and-Branch
@cindex i960 compare/branch instructions
@cindex compare/branch instructions, i960
The 960 architectures provide combined Compare-and-Branch instructions
that permit you to store the branch target in the lower 13 bits of the
instruction word itself. However, if you specify a branch target far
enough away that its address won't fit in 13 bits, the assembler can
either issue an error, or convert your Compare-and-Branch instruction
into separate instructions to do the compare and the branch.
@cindex compare and jump expansions, i960
@cindex i960 compare and jump expansions
Whether @code{@value{AS}} gives an error or expands the instruction depends
on two choices you can make: whether you use the @samp{-no-relax} option,
and whether you use a ``Compare and Branch'' instruction or a ``Compare
and Jump'' instruction. The ``Jump'' instructions are @emph{always}
expanded if necessary; the ``Branch'' instructions are expanded when
necessary @emph{unless} you specify @code{-no-relax}---in which case
@code{@value{AS}} gives an error instead.
These are the Compare-and-Branch instructions, their ``Jump'' variants,
and the instruction pairs they may expand into:
@c TEXI2ROFF-KILL
@ifinfo
@c END TEXI2ROFF-KILL
@example
Compare and
Branch Jump Expanded to
------ ------ ------------
bbc chkbit; bno
bbs chkbit; bo
cmpibe cmpije cmpi; be
cmpibg cmpijg cmpi; bg
cmpibge cmpijge cmpi; bge
cmpibl cmpijl cmpi; bl
cmpible cmpijle cmpi; ble
cmpibno cmpijno cmpi; bno
cmpibne cmpijne cmpi; bne
cmpibo cmpijo cmpi; bo
cmpobe cmpoje cmpo; be
cmpobg cmpojg cmpo; bg
cmpobge cmpojge cmpo; bge
cmpobl cmpojl cmpo; bl
cmpoble cmpojle cmpo; ble
cmpobne cmpojne cmpo; bne
@end example
@c TEXI2ROFF-KILL
@end ifinfo
@tex
\hskip\tableindent
\halign{\hfil {\tt #}\quad&\hfil {\tt #}\qquad&{\tt #}\hfil\cr
\omit{\hfil\it Compare and\hfil}\span\omit&\cr
{\it Branch}&{\it Jump}&{\it Expanded to}\cr
bbc& & chkbit; bno\cr
bbs& & chkbit; bo\cr
cmpibe& cmpije& cmpi; be\cr
cmpibg& cmpijg& cmpi; bg\cr
cmpibge& cmpijge& cmpi; bge\cr
cmpibl& cmpijl& cmpi; bl\cr
cmpible& cmpijle& cmpi; ble\cr
cmpibno& cmpijno& cmpi; bno\cr
cmpibne& cmpijne& cmpi; bne\cr
cmpibo& cmpijo& cmpi; bo\cr
cmpobe& cmpoje& cmpo; be\cr
cmpobg& cmpojg& cmpo; bg\cr
cmpobge& cmpojge& cmpo; bge\cr
cmpobl& cmpojl& cmpo; bl\cr
cmpoble& cmpojle& cmpo; ble\cr
cmpobne& cmpojne& cmpo; bne\cr}
@end tex
@c END TEXI2ROFF-KILL

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@c Copyright (C) 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@node Sparc-Dependent
@chapter SPARC Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter SPARC Dependent Features
@end ifclear
@cindex SPARC support
@menu
* Sparc-Opts:: Options
* Sparc-Float:: Floating Point
* Sparc-Directives:: Sparc Machine Directives
@end menu
@node Sparc-Opts
@section Options
@cindex options for SPARC
@cindex SPARC options
@cindex architectures, SPARC
@cindex SPARC architectures
The SPARC chip family includes several successive levels (or other
variants) of chip, using the same core instruction set, but including
a few additional instructions at each level.
By default, @code{@value{AS}} assumes the core instruction set (SPARC
v6), but ``bumps'' the architecture level as needed: it switches to
successively higher architectures as it encounters instructions that
only exist in the higher levels.
@table @code
@kindex -Av6
@kindex Av7
@kindex -Av8
@kindex -Av9
@kindex -Asparclite
@item -Av6 | -Av7 | -Av8 | -Av9 | -Asparclite
Use one of the @samp{-A} options to select one of the SPARC
architectures explicitly. If you select an architecture explicitly,
@code{@value{AS}} reports a fatal error if it encounters an instruction
or feature requiring a higher level.
@item -bump
Permit the assembler to ``bump'' the architecture level as required, but
warn whenever it is necessary to switch to another level.
@end table
@ignore
@c FIXME: (sparc) Fill in "syntax" section!
@c subsection syntax
I don't know anything about Sparc syntax. Someone who does
will have to write this section.
@end ignore
@node Sparc-Float
@section Floating Point
@cindex floating point, SPARC (@sc{ieee})
@cindex SPARC floating point (@sc{ieee})
The Sparc uses @sc{ieee} floating-point numbers.
@node Sparc-Directives
@section Sparc Machine Directives
@cindex SPARC machine directives
@cindex machine directives, SPARC
The Sparc version of @code{@value{AS}} supports the following additional
machine directives:
@table @code
@cindex @code{align} directive, SPARC
@item .align
This must be followed by the desired alignment in bytes.
@cindex @code{common} directive, SPARC
@item .common
This must be followed by a symbol name, a positive number, and
@code{"bss"}. This behaves somewhat like @code{.comm}, but the
syntax is different.
@cindex @code{half} directive, SPARC
@item .half
This is functionally identical to @code{.short}.
@cindex @code{proc} directive, SPARC
@item .proc
This directive is ignored. Any text following it on the same
line is also ignored.
@cindex @code{reserve} directive, SPARC
@item .reserve
This must be followed by a symbol name, a positive number, and
@code{"bss"}. This behaves somewhat like @code{.lcomm}, but the
syntax is different.
@cindex @code{seg} directive, SPARC
@item .seg
This must be followed by @code{"text"}, @code{"data"}, or
@code{"data1"}. It behaves like @code{.text}, @code{.data}, or
@code{.data 1}.
@cindex @code{skip} directive, SPARC
@item .skip
This is functionally identical to the @code{.space} directive.
@cindex @code{word} directive, SPARC
@item .word
On the Sparc, the @code{.word} directive produces 32 bit values,
instead of the 16 bit values it produces on many other machines.
@cindex @code{xword} directive, SPARC
@item .xword
On the Sparc V9 processor, the @code{.xword} directive produces
64 bit values.
@end table

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@c Copyright (C) 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@node Vax-Dependent
@chapter VAX Dependent Features
@cindex VAX support
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter VAX Dependent Features
@cindex VAX support
@end ifclear
@menu
* Vax-Opts:: VAX Command-Line Options
* VAX-float:: VAX Floating Point
* VAX-directives:: Vax Machine Directives
* VAX-opcodes:: VAX Opcodes
* VAX-branch:: VAX Branch Improvement
* VAX-operands:: VAX Operands
* VAX-no:: Not Supported on VAX
@end menu
@node Vax-Opts
@section VAX Command-Line Options
@cindex command-line options ignored, VAX
@cindex VAX command-line options ignored
The Vax version of @code{@value{AS}} accepts any of the following options,
gives a warning message that the option was ignored and proceeds.
These options are for compatibility with scripts designed for other
people's assemblers.
@table @code
@cindex @code{-D}, ignored on VAX
@cindex @code{-S}, ignored on VAX
@cindex @code{-T}, ignored on VAX
@item @code{-D} (Debug)
@itemx @code{-S} (Symbol Table)
@itemx @code{-T} (Token Trace)
These are obsolete options used to debug old assemblers.
@cindex @code{-d}, VAX option
@item @code{-d} (Displacement size for JUMPs)
This option expects a number following the @samp{-d}. Like options
that expect filenames, the number may immediately follow the
@samp{-d} (old standard) or constitute the whole of the command line
argument that follows @samp{-d} (@sc{gnu} standard).
@cindex @code{-V}, redundant on VAX
@item @code{-V} (Virtualize Interpass Temporary File)
Some other assemblers use a temporary file. This option
commanded them to keep the information in active memory rather
than in a disk file. @code{@value{AS}} always does this, so this
option is redundant.
@cindex @code{-J}, ignored on VAX
@item @code{-J} (JUMPify Longer Branches)
Many 32-bit computers permit a variety of branch instructions
to do the same job. Some of these instructions are short (and
fast) but have a limited range; others are long (and slow) but
can branch anywhere in virtual memory. Often there are 3
flavors of branch: short, medium and long. Some other
assemblers would emit short and medium branches, unless told by
this option to emit short and long branches.
@cindex @code{-t}, ignored on VAX
@item @code{-t} (Temporary File Directory)
Some other assemblers may use a temporary file, and this option
takes a filename being the directory to site the temporary
file. Since @code{@value{AS}} does not use a temporary disk file, this
option makes no difference. @samp{-t} needs exactly one
filename.
@end table
@cindex VMS (VAX) options
@cindex options for VAX/VMS
@cindex VAX/VMS options
@cindex @code{-h} option, VAX/VMS
@cindex @code{-+} option, VAX/VMS
@cindex Vax-11 C compatibility
@cindex symbols with lowercase, VAX/VMS
@c FIXME! look into "I think" below, correct if needed, delete.
The Vax version of the assembler accepts two options when
compiled for VMS. They are @samp{-h}, and @samp{-+}. The
@samp{-h} option prevents @code{@value{AS}} from modifying the
symbol-table entries for symbols that contain lowercase
characters (I think). The @samp{-+} option causes @code{@value{AS}} to
print warning messages if the FILENAME part of the object file,
or any symbol name is larger than 31 characters. The @samp{-+}
option also inserts some code following the @samp{_main}
symbol so that the object file is compatible with Vax-11
"C".
@node VAX-float
@section VAX Floating Point
@cindex VAX floating point
@cindex floating point, VAX
Conversion of flonums to floating point is correct, and
compatible with previous assemblers. Rounding is
towards zero if the remainder is exactly half the least significant bit.
@code{D}, @code{F}, @code{G} and @code{H} floating point formats
are understood.
Immediate floating literals (@emph{e.g.} @samp{S`$6.9})
are rendered correctly. Again, rounding is towards zero in the
boundary case.
@cindex @code{float} directive, VAX
@cindex @code{double} directive, VAX
The @code{.float} directive produces @code{f} format numbers.
The @code{.double} directive produces @code{d} format numbers.
@node VAX-directives
@section Vax Machine Directives
@cindex machine directives, VAX
@cindex VAX machine directives
The Vax version of the assembler supports four directives for
generating Vax floating point constants. They are described in the
table below.
@cindex wide floating point directives, VAX
@table @code
@cindex @code{dfloat} directive, VAX
@item .dfloat
This expects zero or more flonums, separated by commas, and
assembles Vax @code{d} format 64-bit floating point constants.
@cindex @code{ffloat} directive, VAX
@item .ffloat
This expects zero or more flonums, separated by commas, and
assembles Vax @code{f} format 32-bit floating point constants.
@cindex @code{gfloat} directive, VAX
@item .gfloat
This expects zero or more flonums, separated by commas, and
assembles Vax @code{g} format 64-bit floating point constants.
@cindex @code{hfloat} directive, VAX
@item .hfloat
This expects zero or more flonums, separated by commas, and
assembles Vax @code{h} format 128-bit floating point constants.
@end table
@node VAX-opcodes
@section VAX Opcodes
@cindex VAX opcode mnemonics
@cindex opcode mnemonics, VAX
@cindex mnemonics for opcodes, VAX
All DEC mnemonics are supported. Beware that @code{case@dots{}}
instructions have exactly 3 operands. The dispatch table that
follows the @code{case@dots{}} instruction should be made with
@code{.word} statements. This is compatible with all unix
assemblers we know of.
@node VAX-branch
@section VAX Branch Improvement
@cindex VAX branch improvement
@cindex branch improvement, VAX
@cindex pseudo-ops for branch, VAX
Certain pseudo opcodes are permitted. They are for branch
instructions. They expand to the shortest branch instruction that
reaches the target. Generally these mnemonics are made by
substituting @samp{j} for @samp{b} at the start of a DEC mnemonic.
This feature is included both for compatibility and to help
compilers. If you do not need this feature, avoid these
opcodes. Here are the mnemonics, and the code they can expand into.
@table @code
@item jbsb
@samp{Jsb} is already an instruction mnemonic, so we chose @samp{jbsb}.
@table @asis
@item (byte displacement)
@kbd{bsbb @dots{}}
@item (word displacement)
@kbd{bsbw @dots{}}
@item (long displacement)
@kbd{jsb @dots{}}
@end table
@item jbr
@itemx jr
Unconditional branch.
@table @asis
@item (byte displacement)
@kbd{brb @dots{}}
@item (word displacement)
@kbd{brw @dots{}}
@item (long displacement)
@kbd{jmp @dots{}}
@end table
@item j@var{COND}
@var{COND} may be any one of the conditional branches
@code{neq}, @code{nequ}, @code{eql}, @code{eqlu}, @code{gtr},
@code{geq}, @code{lss}, @code{gtru}, @code{lequ}, @code{vc}, @code{vs},
@code{gequ}, @code{cc}, @code{lssu}, @code{cs}.
@var{COND} may also be one of the bit tests
@code{bs}, @code{bc}, @code{bss}, @code{bcs}, @code{bsc}, @code{bcc},
@code{bssi}, @code{bcci}, @code{lbs}, @code{lbc}.
@var{NOTCOND} is the opposite condition to @var{COND}.
@table @asis
@item (byte displacement)
@kbd{b@var{COND} @dots{}}
@item (word displacement)
@kbd{b@var{NOTCOND} foo ; brw @dots{} ; foo:}
@item (long displacement)
@kbd{b@var{NOTCOND} foo ; jmp @dots{} ; foo:}
@end table
@item jacb@var{X}
@var{X} may be one of @code{b d f g h l w}.
@table @asis
@item (word displacement)
@kbd{@var{OPCODE} @dots{}}
@item (long displacement)
@example
@var{OPCODE} @dots{}, foo ;
brb bar ;
foo: jmp @dots{} ;
bar:
@end example
@end table
@item jaob@var{YYY}
@var{YYY} may be one of @code{lss leq}.
@item jsob@var{ZZZ}
@var{ZZZ} may be one of @code{geq gtr}.
@table @asis
@item (byte displacement)
@kbd{@var{OPCODE} @dots{}}
@item (word displacement)
@example
@var{OPCODE} @dots{}, foo ;
brb bar ;
foo: brw @var{destination} ;
bar:
@end example
@item (long displacement)
@example
@var{OPCODE} @dots{}, foo ;
brb bar ;
foo: jmp @var{destination} ;
bar:
@end example
@end table
@item aobleq
@itemx aoblss
@itemx sobgeq
@itemx sobgtr
@table @asis
@item (byte displacement)
@kbd{@var{OPCODE} @dots{}}
@item (word displacement)
@example
@var{OPCODE} @dots{}, foo ;
brb bar ;
foo: brw @var{destination} ;
bar:
@end example
@item (long displacement)
@example
@var{OPCODE} @dots{}, foo ;
brb bar ;
foo: jmp @var{destination} ;
bar:
@end example
@end table
@end table
@node VAX-operands
@section VAX Operands
@cindex VAX operand notation
@cindex operand notation, VAX
@cindex immediate character, VAX
@cindex VAX immediate character
The immediate character is @samp{$} for Unix compatibility, not
@samp{#} as DEC writes it.
@cindex indirect character, VAX
@cindex VAX indirect character
The indirect character is @samp{*} for Unix compatibility, not
@samp{@@} as DEC writes it.
@cindex displacement sizing character, VAX
@cindex VAX displacement sizing character
The displacement sizing character is @samp{`} (an accent grave) for
Unix compatibility, not @samp{^} as DEC writes it. The letter
preceding @samp{`} may have either case. @samp{G} is not
understood, but all other letters (@code{b i l s w}) are understood.
@cindex register names, VAX
@cindex VAX register names
Register names understood are @code{r0 r1 r2 @dots{} r15 ap fp sp
pc}. Upper and lower case letters are equivalent.
For instance
@smallexample
tstb *w`$4(r5)
@end smallexample
Any expression is permitted in an operand. Operands are comma
separated.
@c There is some bug to do with recognizing expressions
@c in operands, but I forget what it is. It is
@c a syntax clash because () is used as an address mode
@c and to encapsulate sub-expressions.
@node VAX-no
@section Not Supported on VAX
@cindex VAX bitfields not supported
@cindex bitfields, not supported on VAX
Vax bit fields can not be assembled with @code{@value{AS}}. Someone
can add the required code if they really need it.

View File

@ -37,7 +37,7 @@ END-INFO-DIR-ENTRY
@end tex
@vskip 0pt plus 1filll
Copyright @copyright{} 1994 Free Software Foundation, Inc.
Copyright @copyright{} 1994, 1995 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice
@ -53,7 +53,7 @@ into another language, under the above conditions for modified versions.
@end titlepage
@ifinfo
Copyright @copyright{} 1994 Free Software Foundation, Inc.
Copyright @copyright{} 1994, 1995 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice