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ubsan: cr16: left shift cannot be represented in type 'int' 

This was:
  unsigned long mask = SBM (instruction->match_bits);
with
  #define SBM(offs)  ((((1 << (32 - offs)) -1) << (offs)))

Well, there are a couple of problems.  Firstly, the expression uses
int values (1 rather than 1u or 1ul) resulting in the ubsan error, and
secondly, a zero offs will result in a 32-bit shift which is undefined
if ints are only 32 bits.

	* cr16-dis.c (EXTRACT, SBM): Rewrite.
	(cr16_match_opcode): Delete duplicate bcond test.
This commit is contained in:
Alan Modra 2019-12-10 23:02:37 +10:30
parent 2fd2b153a3
commit 0ef562a4b5
2 changed files with 9 additions and 7 deletions
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5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2019-12-11 Alan Modra <amodra@gmail.com>
* cr16-dis.c (EXTRACT, SBM): Rewrite.
(cr16_match_opcode): Delete duplicate bcond test.
2019-12-11 Alan Modra <amodra@gmail.com>
* bfin-dis.c (HOST_LONG_WORD_SIZE, XFIELD): Delete.

11
opcodes/cr16-dis.c
View File

@ -30,11 +30,11 @@
/* Extract 'n_bits' from 'a' starting from offset 'offs'. */
#define EXTRACT(a, offs, n_bits) \
(n_bits == 32 ? (((a) >> (offs)) & 0xffffffffL) \
: (((a) >> (offs)) & ((1 << (n_bits)) -1)))
(((a) >> (offs)) & ((1ul << ((n_bits) - 1) << 1) - 1))
/* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */
#define SBM(offs) ((((1 << (32 - offs)) -1) << (offs)))
/* Set Bit Mask - a mask to set all bits in a 32-bit word starting
from offset 'offs'. */
#define SBM(offs) ((1ul << 31 << 1) - (1ul << (offs)))
typedef struct
{
@ -329,9 +329,6 @@ cr16_match_opcode (void)
while (instruction >= cr16_instruction)
{
mask = build_mask ();
/* Adjust mask for bcond with 32-bit size instruction */
if ((IS_INSN_MNEMONIC("b") && instruction->size == 2))
mask = 0xff0f0000;
if ((doubleWord & mask) == BIN (instruction->match,
instruction->match_bits))