ubsan: cr16: left shift cannot be represented in type 'int'
This was: unsigned long mask = SBM (instruction->match_bits); with #define SBM(offs) ((((1 << (32 - offs)) -1) << (offs))) Well, there are a couple of problems. Firstly, the expression uses int values (1 rather than 1u or 1ul) resulting in the ubsan error, and secondly, a zero offs will result in a 32-bit shift which is undefined if ints are only 32 bits. * cr16-dis.c (EXTRACT, SBM): Rewrite. (cr16_match_opcode): Delete duplicate bcond test.
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@ -1,3 +1,8 @@
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2019-12-11 Alan Modra <amodra@gmail.com>
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* cr16-dis.c (EXTRACT, SBM): Rewrite.
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(cr16_match_opcode): Delete duplicate bcond test.
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2019-12-11 Alan Modra <amodra@gmail.com>
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2019-12-11 Alan Modra <amodra@gmail.com>
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* bfin-dis.c (HOST_LONG_WORD_SIZE, XFIELD): Delete.
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* bfin-dis.c (HOST_LONG_WORD_SIZE, XFIELD): Delete.
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@ -30,11 +30,11 @@
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/* Extract 'n_bits' from 'a' starting from offset 'offs'. */
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/* Extract 'n_bits' from 'a' starting from offset 'offs'. */
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#define EXTRACT(a, offs, n_bits) \
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#define EXTRACT(a, offs, n_bits) \
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(n_bits == 32 ? (((a) >> (offs)) & 0xffffffffL) \
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(((a) >> (offs)) & ((1ul << ((n_bits) - 1) << 1) - 1))
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: (((a) >> (offs)) & ((1 << (n_bits)) -1)))
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/* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */
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/* Set Bit Mask - a mask to set all bits in a 32-bit word starting
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#define SBM(offs) ((((1 << (32 - offs)) -1) << (offs)))
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from offset 'offs'. */
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#define SBM(offs) ((1ul << 31 << 1) - (1ul << (offs)))
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typedef struct
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typedef struct
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{
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{
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@ -329,9 +329,6 @@ cr16_match_opcode (void)
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while (instruction >= cr16_instruction)
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while (instruction >= cr16_instruction)
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{
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{
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mask = build_mask ();
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mask = build_mask ();
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/* Adjust mask for bcond with 32-bit size instruction */
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if ((IS_INSN_MNEMONIC("b") && instruction->size == 2))
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mask = 0xff0f0000;
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if ((doubleWord & mask) == BIN (instruction->match,
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if ((doubleWord & mask) == BIN (instruction->match,
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instruction->match_bits))
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instruction->match_bits))
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