[ARC] Update disassembler opcode selection
New instruction are added, and some of them are overlapping. Update disassembler to correctly recognize them. Introduce nps400 option. opcodes/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * arc-dis.c (skip_this_opcode): Check also for 0x07 major opcodes, and MPY class instructions. (parse_option): Add nps400 option. (print_arc_disassembler_options): Add nps400 info. gas/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/nps400-6.d: Update test.
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@ -1,3 +1,7 @@
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2019-07-24 Claudiu Zissulescu <claziss@synopsys.com>
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* testsuite/gas/arc/nps400-6.d: Update test.
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2019-07-24 Alan Modra <amodra@gmail.com>
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* config/obj-elf.c (obj_elf_section, obj_elf_type): Set has_gnu_osabi.
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@ -1,5 +1,5 @@
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#as: -mcpu=arc700 -mnps400
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#objdump: -dr
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#objdump: -dr -Mnps400
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.*: +file format .*arc.*
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@ -1,3 +1,10 @@
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2019-07-24 Claudiu Zissulescu <claziss@synopsys.com>
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* arc-dis.c (skip_this_opcode): Check also for 0x07 major opcodes,
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and MPY class instructions.
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(parse_option): Add nps400 option.
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(print_arc_disassembler_options): Add nps400 info.
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2019-07-24 Claudiu Zissulescu <claziss@synopsys.com>
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* arc-ext-tbl.h (bspeek): Remove it, added to main table.
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@ -181,7 +181,9 @@ skip_this_opcode (const struct arc_opcode *opcode)
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/* Check opcode for major 0x06, return if it is not in. */
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if (arc_opcode_len (opcode) == 4
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&& OPCODE_32BIT_INSN (opcode->opcode) != 0x06)
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&& (OPCODE_32BIT_INSN (opcode->opcode) != 0x06
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/* Can be an APEX extensions. */
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&& OPCODE_32BIT_INSN (opcode->opcode) != 0x07))
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return FALSE;
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/* or not a known truble class. */
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@ -190,6 +192,7 @@ skip_this_opcode (const struct arc_opcode *opcode)
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case FLOAT:
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case DSP:
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case ARITH:
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case MPY:
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break;
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default:
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return FALSE;
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@ -764,6 +767,23 @@ parse_option (const char *option)
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else if (disassembler_options_cmp (option, "fpuda") == 0)
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add_to_decodelist (FLOAT, DPA);
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else if (disassembler_options_cmp (option, "nps400") == 0)
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{
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add_to_decodelist (ACL, NPS400);
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add_to_decodelist (ARITH, NPS400);
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add_to_decodelist (BITOP, NPS400);
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add_to_decodelist (BMU, NPS400);
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add_to_decodelist (CONTROL, NPS400);
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add_to_decodelist (DMA, NPS400);
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add_to_decodelist (DPI, NPS400);
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add_to_decodelist (MEMORY, NPS400);
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add_to_decodelist (MISC, NPS400);
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add_to_decodelist (NET, NPS400);
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add_to_decodelist (PMU, NPS400);
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add_to_decodelist (PROTOCOL_DECODE, NPS400);
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add_to_decodelist (ULTRAIP, NPS400);
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}
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else if (disassembler_options_cmp (option, "fpus") == 0)
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{
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add_to_decodelist (FLOAT, SP);
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@ -1411,6 +1431,8 @@ with -M switch (multiple options should be separated by commas):\n"));
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fprintf (stream, _("\
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fpud Recognize double precision FPU instructions.\n"));
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fprintf (stream, _("\
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nps400 Recognize NPS400 instructions.\n"));
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fprintf (stream, _("\
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hex Use only hexadecimal number to print immediates.\n"));
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}
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