gas/
* config/tc-mips.c (mips_cpu_info_table): Add new entries for {24k,24ke,34k,74k}f{2_1,1_1,x}. Also add an entry for 74kf3_2. Deprecate *x and *fx. * doc/c-mips.texi: Document the new CPU arguments. Deprecate *x and *fx.
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@ -1,3 +1,11 @@
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2007-07-04 Richard Sandiford <richard@codesourcery.com>
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* config/tc-mips.c (mips_cpu_info_table): Add new entries for
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{24k,24ke,34k,74k}f{2_1,1_1,x}. Also add an entry for 74kf3_2.
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Deprecate *x and *fx.
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* doc/c-mips.texi: Document the new CPU arguments. Deprecate
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*x and *fx.
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2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
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2007-07-04 H.J. Lu <hongjiu.lu@intel.com>
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* config/obj-coff.h (x86_64_target_format): Renamed to ...
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* config/obj-coff.h (x86_64_target_format): Renamed to ...
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@ -14784,24 +14784,48 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
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{ "m4k", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "m4k", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "m4kp", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "m4kp", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kc", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kc", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kf2_1", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kf", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kf", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kf1_1", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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/* Deprecated forms of the above. */
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{ "24kfx", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kx", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kx", 0, ISA_MIPS32R2, CPU_MIPS32R2 },
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/* 24KE is a 24K with DSP ASE, other ASEs are optional. */
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/* 24KE is a 24K with DSP ASE, other ASEs are optional. */
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{ "24kec", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kec", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kef2_1", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kef", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kef", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kef1_1", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 },
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/* Deprecated forms of the above. */
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{ "24kefx", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kex", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "24kex", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 },
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/* 34K is a 24K with DSP and MT ASE, other ASEs are optional. */
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/* 34K is a 24K with DSP and MT ASE, other ASEs are optional. */
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{ "34kc", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
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{ "34kc", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "34kf2_1", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "34kf", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
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{ "34kf", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "34kf1_1", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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/* Deprecated forms of the above. */
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{ "34kfx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "34kx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
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{ "34kx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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ISA_MIPS32R2, CPU_MIPS32R2 },
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/* 74K with DSP and DSPR2 ASE, other ASEs are optional. */
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/* 74K with DSP and DSPR2 ASE, other ASEs are optional. */
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{ "74kc", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
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{ "74kc", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "74kf2_1", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "74kf", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
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{ "74kf", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "74kf1_1", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "74kf3_2", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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/* Deprecated forms of the above. */
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{ "74kfx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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{ "74kx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
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{ "74kx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2,
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ISA_MIPS32R2, CPU_MIPS32R2 },
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ISA_MIPS32R2, CPU_MIPS32R2 },
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@ -249,17 +249,22 @@ rm9000,
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m4k,
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m4k,
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m4kp,
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m4kp,
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24kc,
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24kc,
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24kf2_1,
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24kf,
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24kf,
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24kx,
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24kf1_1,
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24kec,
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24kec,
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24kef2_1,
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24kef,
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24kef,
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24kex,
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24kef1_1,
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34kc,
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34kc,
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34kf2_1,
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34kf,
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34kf,
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34kx,
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34kf1_1,
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74kc,
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74kc,
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74kf2_1,
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74kf,
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74kf,
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74kx,
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74kf1_1,
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74kf3_2,
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5kc,
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5kc,
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5kf,
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5kf,
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20kc,
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20kc,
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@ -268,6 +273,10 @@ sb1,
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sb1a
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sb1a
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@end quotation
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@end quotation
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For compatibility reasons, @samp{@var{n}x} and @samp{@var{b}fx} are
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accepted as synonyms for @samp{@var{n}f1_1}. These values are
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deprecated.
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@item -mtune=@var{cpu}
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@item -mtune=@var{cpu}
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Schedule and tune for a particular MIPS cpu. Valid @var{cpu} values are
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Schedule and tune for a particular MIPS cpu. Valid @var{cpu} values are
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identical to @samp{-march=@var{cpu}}.
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identical to @samp{-march=@var{cpu}}.
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