2004-10-30 Andrew Cagney <cagney@gnu.org>
* mips-tdep.h (mips_pc_is_mips16): Declare. * mips-tdep.c (mips_pc_is_mips16): Rename pc_is_mips16, make non-static. Update calls.
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@ -1,5 +1,9 @@
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2004-10-30 Andrew Cagney <cagney@gnu.org>
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* mips-tdep.h (mips_pc_is_mips16): Declare.
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* mips-tdep.c (mips_pc_is_mips16): Rename pc_is_mips16, make
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non-static. Update calls.
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* cli/cli-decode.c (add_setshow_enum_cmd): New function.
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* command.h (add_setshow_enum_cmd): Declare.
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* mips-tdep.c (_initialize_mips_tdep): Use add_setshow_enum_cmd.
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@ -821,8 +821,8 @@ show_mask_address (char *cmd, int from_tty, struct cmd_list_element *c)
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/* Tell if the program counter value in MEMADDR is in a MIPS16 function. */
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static int
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pc_is_mips16 (bfd_vma memaddr)
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int
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mips_pc_is_mips16 (CORE_ADDR memaddr)
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{
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struct minimal_symbol *sym;
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@ -954,7 +954,7 @@ mips_fetch_instruction (CORE_ADDR addr)
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int instlen;
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int status;
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if (pc_is_mips16 (addr))
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if (mips_pc_is_mips16 (addr))
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{
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instlen = MIPS16_INSN_SIZE;
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addr = unmake_mips16_addr (addr);
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@ -1533,7 +1533,7 @@ mips_mdebug_frame_cache (struct frame_info *next_frame, void **this_cache)
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order of that normally used by gcc. Therefore, we have to fetch
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the first instruction of the function, and if it's an entry
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instruction that saves $s0 or $s1, correct their saved addresses. */
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if (pc_is_mips16 (PROC_LOW_ADDR (proc_desc)))
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if (mips_pc_is_mips16 (PROC_LOW_ADDR (proc_desc)))
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{
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ULONGEST inst = mips16_fetch_instruction (PROC_LOW_ADDR (proc_desc));
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if ((inst & 0xf81f) == 0xe809 && (inst & 0x700) != 0x700)
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@ -2033,7 +2033,7 @@ static const struct frame_unwind *
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mips_insn16_frame_sniffer (struct frame_info *next_frame)
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{
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CORE_ADDR pc = frame_pc_unwind (next_frame);
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if (pc_is_mips16 (pc))
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if (mips_pc_is_mips16 (pc))
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return &mips_insn16_frame_unwind;
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return NULL;
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}
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@ -2353,7 +2353,7 @@ static const struct frame_unwind *
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mips_insn32_frame_sniffer (struct frame_info *next_frame)
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{
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CORE_ADDR pc = frame_pc_unwind (next_frame);
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if (! pc_is_mips16 (pc))
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if (! mips_pc_is_mips16 (pc))
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return &mips_insn32_frame_unwind;
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return NULL;
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}
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@ -2557,7 +2557,7 @@ static struct mips_extra_func_info temp_proc_desc;
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static int
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mips_about_to_return (CORE_ADDR pc)
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{
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if (pc_is_mips16 (pc))
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if (mips_pc_is_mips16 (pc))
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/* This mips16 case isn't necessarily reliable. Sometimes the compiler
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generates a "jr $ra"; other times it generates code to load
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the return address from the stack to an accessible register (such
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@ -2591,7 +2591,7 @@ heuristic_proc_start (CORE_ADDR pc)
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if (heuristic_fence_post == UINT_MAX || fence < VM_MIN_ADDRESS)
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fence = VM_MIN_ADDRESS;
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instlen = pc_is_mips16 (pc) ? MIPS16_INSN_SIZE : MIPS32_INSN_SIZE;
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instlen = mips_pc_is_mips16 (pc) ? MIPS16_INSN_SIZE : MIPS32_INSN_SIZE;
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/* search back for previous return */
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for (start_pc -= instlen;; start_pc -= instlen)
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@ -2633,7 +2633,7 @@ heuristic-fence-post' command.\n", paddr_nz (pc), paddr_nz (pc));
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return 0;
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}
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else if (pc_is_mips16 (start_pc))
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else if (mips_pc_is_mips16 (start_pc))
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{
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unsigned short inst;
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@ -2678,7 +2678,7 @@ heuristic_proc_desc (CORE_ADDR start_pc, CORE_ADDR limit_pc,
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PROC_FRAME_REG (&temp_proc_desc) = MIPS_SP_REGNUM;
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PROC_PC_REG (&temp_proc_desc) = MIPS_RA_REGNUM;
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if (pc_is_mips16 (start_pc))
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if (mips_pc_is_mips16 (start_pc))
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mips16_scan_prologue (start_pc, limit_pc, next_frame, this_cache);
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else
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mips32_scan_prologue (start_pc, limit_pc, next_frame, this_cache);
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@ -4753,7 +4753,7 @@ mips_step_skips_delay (CORE_ADDR pc)
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char buf[MIPS32_INSN_SIZE];
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/* There is no branch delay slot on MIPS16. */
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if (pc_is_mips16 (pc))
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if (mips_pc_is_mips16 (pc))
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return 0;
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if (target_read_memory (pc, buf, sizeof buf) != 0)
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@ -4794,7 +4794,7 @@ mips_skip_prologue (CORE_ADDR pc)
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if (limit_pc == 0)
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limit_pc = pc + 100; /* Magic. */
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if (pc_is_mips16 (pc))
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if (mips_pc_is_mips16 (pc))
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return mips16_scan_prologue (pc, limit_pc, NULL, NULL);
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else
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return mips32_scan_prologue (pc, limit_pc, NULL, NULL);
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@ -4955,12 +4955,12 @@ gdb_print_insn_mips (bfd_vma memaddr, struct disassemble_info *info)
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work. */
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if (proc_desc)
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{
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if (pc_is_mips16 (PROC_LOW_ADDR (proc_desc)))
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if (mips_pc_is_mips16 (PROC_LOW_ADDR (proc_desc)))
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info->mach = bfd_mach_mips16;
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}
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else
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{
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if (pc_is_mips16 (memaddr))
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if (mips_pc_is_mips16 (memaddr))
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info->mach = bfd_mach_mips16;
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}
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@ -5005,7 +5005,7 @@ mips_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
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{
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if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
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{
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if (pc_is_mips16 (*pcptr))
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if (mips_pc_is_mips16 (*pcptr))
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{
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static unsigned char mips16_big_breakpoint[] = { 0xe8, 0xa5 };
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*pcptr = unmake_mips16_addr (*pcptr);
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@ -5035,7 +5035,7 @@ mips_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
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}
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else
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{
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if (pc_is_mips16 (*pcptr))
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if (mips_pc_is_mips16 (*pcptr))
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{
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static unsigned char mips16_little_breakpoint[] = { 0xa5, 0xe8 };
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*pcptr = unmake_mips16_addr (*pcptr);
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@ -91,4 +91,8 @@ enum mips_insn_size
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/* Single step based on where the current instruction will take us. */
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extern void mips_software_single_step (enum target_signal, int);
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/* Tell if the program counter value in MEMADDR is in a MIPS16
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function. */
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extern int mips_pc_is_mips16 (bfd_vma memaddr);
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#endif /* MIPS_TDEP_H */
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