2002-08-15 Michael Snyder <msnyder@redhat.com>
* config/mips/tm-mips.h (FUNCTION_START_OFFSET, IN_SIGTRAMP,
REGISTER_VIRTUAL_SIZE): Delete.
(REGISTER_CONVERT_FROM_TYPE, REGISTER_CONVERT_TO_TYPE): Convert
from macros to functions.
* mips-tdep.c (mips_register_convert_from_type,
mips_register_convert_to_type): New functions.
(mips_gdbarch_init): Set up function_start_offset,
register_virtual_size, pc_in_sigtramp.
This commit is contained in:
Michael Snyder
parent
bf1f5b4c04
commit
102182a951
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@ -9,6 +9,10 @@
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MAX_REGISTER_RAW_SIZE, MAX_REGISTER_VIRTUAL_SIZE): Delete.
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(TARGET_READ_SP): Delete.
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(DO_REGISTERS_INFO): Delete.
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(FUNCTION_START_OFFSET, IN_SIGTRAMP, REGISTER_VIRTUAL_SIZE):
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Delete.
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(REGISTER_CONVERT_FROM_TYPE, REGISTER_CONVERT_TO_TYPE): Convert
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from macros to functions.
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* mips-tdep.c (mips_gdbarch_init): Set the above in the gdbarch.
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(mips_register_convertible, mips_register_convert_to_virtual,
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@ -17,6 +21,11 @@
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(mips_gdbarch_init): Set gdbarch read_sp to mips_read_sp.
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(mips_do_registers_info): Make static.
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(mips_gdbarch_init): Insert mips_do_registers_info into gdbarch.
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(in_sigtramp): Make static, rename to mips_pc_in_sigtramp.
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(mips_register_convert_from_type, mips_register_convert_to_type):
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New functions.
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(mips_gdbarch_init): Set up function_start_offset,
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register_virtual_size, pc_in_sigtramp.
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2002-08-15 Andrew Cagney <ac131313@redhat.com>
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@ -51,22 +51,12 @@ struct value;
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#define DEFAULT_MIPS_TYPE "generic"
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/* Offset from address of function to start of its code.
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Zero on most machines. */
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#define FUNCTION_START_OFFSET 0
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/* Return non-zero if PC points to an instruction which will cause a step
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to execute both the instruction at PC and an instruction at PC+4. */
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extern int mips_step_skips_delay (CORE_ADDR);
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#define STEP_SKIPS_DELAY_P (1)
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#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
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/* Are we currently handling a signal */
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extern int in_sigtramp (CORE_ADDR, char *);
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#define IN_SIGTRAMP(pc, name) in_sigtramp(pc, name)
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/* Say how long (ordinary) registers are. This is a piece of bogosity
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used in push_word and a few other places; REGISTER_RAW_SIZE is the
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real way to know how big a register is. */
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@ -151,11 +141,6 @@ extern const char *mips_register_name (int regnr);
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#define REGISTER_BYTE(N) ((N) * MIPS_REGSIZE)
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/* Number of bytes of storage in the program's representation
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for register N. */
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#define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))
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/* Return the GDB type object for the "standard" data type of data in
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register N. */
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@ -172,27 +157,18 @@ extern const char *mips_register_name (int regnr);
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If the target is big endian, double register values need conversion
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between memory and register formats. */
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#define REGISTER_CONVERT_TO_TYPE(n, type, buffer) \
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do {if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG \
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&& REGISTER_RAW_SIZE (n) == 4 \
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&& (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32 \
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&& TYPE_CODE(type) == TYPE_CODE_FLT \
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&& TYPE_LENGTH(type) == 8) { \
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char __temp[4]; \
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memcpy (__temp, ((char *)(buffer))+4, 4); \
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memcpy (((char *)(buffer))+4, (buffer), 4); \
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memcpy (((char *)(buffer)), __temp, 4); }} while (0)
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extern void mips_register_convert_to_type (int regnum,
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struct type *type,
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char *buffer);
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extern void mips_register_convert_from_type (int regnum,
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struct type *type,
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char *buffer);
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#define REGISTER_CONVERT_FROM_TYPE(n, type, buffer) \
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do {if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG \
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&& REGISTER_RAW_SIZE (n) == 4 \
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&& (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32 \
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&& TYPE_CODE(type) == TYPE_CODE_FLT \
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&& TYPE_LENGTH(type) == 8) { \
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char __temp[4]; \
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memcpy (__temp, ((char *)(buffer))+4, 4); \
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memcpy (((char *)(buffer))+4, (buffer), 4); \
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memcpy (((char *)(buffer)), __temp, 4); }} while (0)
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#define REGISTER_CONVERT_TO_TYPE(n, type, buffer) \
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mips_register_convert_to_type ((n), (type), (buffer))
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#define REGISTER_CONVERT_FROM_TYPE(n, type, buffer) \
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mips_register_convert_from_type ((n), (type), (buffer))
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/* Store the address of the place in which to copy the structure the
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subroutine will return. Handled by mips_push_arguments. */
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@ -477,6 +477,38 @@ mips_register_convert_to_raw (struct type *virtual_type, int n,
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TYPE_LENGTH (virtual_type));
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}
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void
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mips_register_convert_to_type (int regnum, struct type *type, char *buffer)
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{
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if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
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&& REGISTER_RAW_SIZE (regnum) == 4
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&& (regnum) >= FP0_REGNUM && (regnum) < FP0_REGNUM + 32
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&& TYPE_CODE(type) == TYPE_CODE_FLT
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&& TYPE_LENGTH(type) == 8)
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{
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char temp[4];
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memcpy (temp, ((char *)(buffer))+4, 4);
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memcpy (((char *)(buffer))+4, (buffer), 4);
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memcpy (((char *)(buffer)), temp, 4);
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}
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}
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void
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mips_register_convert_from_type (int regnum, struct type *type, char *buffer)
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{
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if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
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&& REGISTER_RAW_SIZE (regnum) == 4
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&& (regnum) >= FP0_REGNUM && (regnum) < FP0_REGNUM + 32
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&& TYPE_CODE(type) == TYPE_CODE_FLT
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&& TYPE_LENGTH(type) == 8)
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{
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char temp[4];
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memcpy (temp, ((char *)(buffer))+4, 4);
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memcpy (((char *)(buffer))+4, (buffer), 4);
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memcpy (((char *)(buffer)), temp, 4);
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}
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}
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/* Return the GDB type object for the "standard" data type
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of data in register REG.
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@ -4186,8 +4218,8 @@ mips_store_return_value (struct type *valtype, char *valbuf)
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/* Exported procedure: Is PC in the signal trampoline code */
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int
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in_sigtramp (CORE_ADDR pc, char *ignore)
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static int
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mips_pc_in_sigtramp (CORE_ADDR pc, char *ignore)
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{
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if (sigtramp_address == 0)
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fixup_sigtramp ();
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@ -4873,7 +4905,7 @@ mips_gdbarch_init (struct gdbarch_info info,
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osabi = gdbarch_lookup_osabi (info.abfd);
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}
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/* Check ELF_FLAGS to see if it specifies the ABI being used. */
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/* Check ELF_FLAGS to see if it specifies the ABI being used. */
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switch ((elf_flags & EF_MIPS_ABI))
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{
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case E_MIPS_ABI_O32:
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@ -4967,7 +4999,7 @@ mips_gdbarch_init (struct gdbarch_info info,
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arches = gdbarch_list_lookup_by_info (arches->next, &info))
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{
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/* MIPS needs to be pedantic about which ABI the object is
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using. */
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using. */
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if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
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continue;
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if (gdbarch_tdep (arches->gdbarch)->mips_abi != mips_abi)
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@ -4976,13 +5008,13 @@ mips_gdbarch_init (struct gdbarch_info info,
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return arches->gdbarch;
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}
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/* Need a new architecture. Fill in a target specific vector. */
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/* Need a new architecture. Fill in a target specific vector. */
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tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
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gdbarch = gdbarch_alloc (&info, tdep);
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tdep->elf_flags = elf_flags;
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tdep->osabi = osabi;
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/* Initially set everything according to the default ABI/ISA. */
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/* Initially set everything according to the default ABI/ISA. */
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set_gdbarch_short_bit (gdbarch, 16);
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set_gdbarch_int_bit (gdbarch, 32);
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set_gdbarch_float_bit (gdbarch, 32);
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@ -5133,7 +5165,7 @@ mips_gdbarch_init (struct gdbarch_info info,
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``We deliberately don't allow "-gp32" to set the MIPS_32BITMODE
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flag in object files because to do so would make it impossible to
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link with libraries compiled without "-gp32". This is
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link with libraries compiled without "-gp32". This is
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unnecessarily restrictive.
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We could solve this problem by adding "-gp32" multilibs to gcc,
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@ -5143,10 +5175,10 @@ mips_gdbarch_init (struct gdbarch_info info,
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But even more unhelpfully, the default linker output target for
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mips64-elf is elf32-bigmips, and has EF_MIPS_32BIT_MODE set, even
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for 64-bit programs - you need to change the ABI to change this,
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and not all gcc targets support that currently. Therefore using
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and not all gcc targets support that currently. Therefore using
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this flag to detect 32-bit mode would do the wrong thing given
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the current gcc - it would make GDB treat these 64-bit programs
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as 32-bit programs by default. */
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as 32-bit programs by default. */
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/* enable/disable the MIPS FPU */
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if (!mips_fpu_type_auto)
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@ -5173,7 +5205,7 @@ mips_gdbarch_init (struct gdbarch_info info,
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/* MIPS version of register names. NOTE: At present the MIPS
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register name management is part way between the old -
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#undef/#define REGISTER_NAMES and the new REGISTER_NAME(nr).
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Further work on it is required. */
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Further work on it is required. */
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set_gdbarch_register_name (gdbarch, mips_register_name);
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set_gdbarch_read_pc (gdbarch, mips_read_pc);
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set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
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@ -5181,8 +5213,8 @@ mips_gdbarch_init (struct gdbarch_info info,
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set_gdbarch_read_sp (gdbarch, mips_read_sp);
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set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
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/* Add/remove bits from an address. The MIPS needs be careful to
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ensure that all 32 bit addresses are sign extended to 64 bits. */
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/* Add/remove bits from an address. The MIPS needs be careful to
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ensure that all 32 bit addresses are sign extended to 64 bits. */
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set_gdbarch_addr_bits_remove (gdbarch, mips_addr_bits_remove);
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/* There's a mess in stack frame creation. See comments in
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@ -5190,7 +5222,7 @@ mips_gdbarch_init (struct gdbarch_info info,
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set_gdbarch_init_frame_pc_first (gdbarch, mips_init_frame_pc_first);
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set_gdbarch_init_frame_pc (gdbarch, init_frame_pc_noop);
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/* Map debug register numbers onto internal register numbers. */
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/* Map debug register numbers onto internal register numbers. */
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set_gdbarch_stab_reg_to_regnum (gdbarch, mips_stab_reg_to_regnum);
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set_gdbarch_ecoff_reg_to_regnum (gdbarch, mips_ecoff_reg_to_regnum);
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@ -5235,11 +5267,15 @@ mips_gdbarch_init (struct gdbarch_info info,
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set_gdbarch_address_to_pointer (gdbarch, address_to_signed_pointer);
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set_gdbarch_integer_to_address (gdbarch, mips_integer_to_address);
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set_gdbarch_function_start_offset (gdbarch, 0);
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/* There are MIPS targets which do not yet use this since they still
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define REGISTER_VIRTUAL_TYPE. */
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set_gdbarch_register_virtual_type (gdbarch, mips_register_virtual_type);
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set_gdbarch_register_virtual_size (gdbarch, generic_register_size);
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set_gdbarch_do_registers_info (gdbarch, mips_do_registers_info);
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set_gdbarch_pc_in_sigtramp (gdbarch, mips_pc_in_sigtramp);
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/* Hook in OS ABI-specific overrides, if they have been registered. */
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gdbarch_init_osabi (info, gdbarch, osabi);
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