* infcmd.c (step_1), infrun.c (wait_for_inferior): Add comments
about SHIFT_INST_REGS. * exec.c (exec_file_command): Set text_end based on all code readonly sections, not just ".text". * defs.h, infcmd.c, config/z8k/tm-z8k.h, config/m88k/tm-m88k.h, config/sh/tm-sh.h, config/h8300/tm-h8300.h, config/h8500/tm-h8500.h, z8k-tdep.c: Remove all references to ADDR_BITS_SET. * config/m88k/tm-m88k.h: Define TARGET_WRITE_PC. * config/m88k/tm-m88k.h: Add definitions for calling functions.
This commit is contained in:
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869cbaae87
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114221b5a4
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@ -1,3 +1,18 @@
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Thu Sep 23 10:49:37 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
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* infcmd.c (step_1), infrun.c (wait_for_inferior): Add comments
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about SHIFT_INST_REGS.
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* exec.c (exec_file_command): Set text_end based on all code readonly
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sections, not just ".text".
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* defs.h, infcmd.c, config/z8k/tm-z8k.h, config/m88k/tm-m88k.h,
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config/sh/tm-sh.h, config/h8300/tm-h8300.h, config/h8500/tm-h8500.h,
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z8k-tdep.c: Remove all references to ADDR_BITS_SET.
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* config/m88k/tm-m88k.h: Define TARGET_WRITE_PC.
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* config/m88k/tm-m88k.h: Add definitions for calling functions.
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Thu Sep 23 00:13:06 1993 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
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Thu Sep 23 00:13:06 1993 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
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* config/mips/tm-mips.h (STORE_STRUCT_RETURN): Define as noop as
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* config/mips/tm-mips.h (STORE_STRUCT_RETURN): Define as noop as
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@ -284,7 +284,6 @@ extern CORE_ADDR h8300_skip_prologue ();
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typedef unsigned short INSN_WORD;
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typedef unsigned short INSN_WORD;
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#define ADDR_BITS_REMOVE(addr) ((addr) & 0xffff)
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#define ADDR_BITS_REMOVE(addr) ((addr) & 0xffff)
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#define ADDR_BITS_SET(addr) (((addr)))
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#define DONT_USE_REMOTE
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#define DONT_USE_REMOTE
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@ -277,7 +277,6 @@ CORE_ADDR h8500_frame_chain (/* FRAME thisframe */);
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typedef unsigned short INSN_WORD;
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typedef unsigned short INSN_WORD;
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#define ADDR_BITS_REMOVE(addr) ((addr) & 0xffffff)
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#define ADDR_BITS_REMOVE(addr) ((addr) & 0xffffff)
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#define ADDR_BITS_SET(addr) (((addr)))
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#define read_memory_short(x) (read_memory_integer(x,2) & 0xffff)
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#define read_memory_short(x) (read_memory_integer(x,2) & 0xffff)
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#define DONT_USE_REMOTE
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#define DONT_USE_REMOTE
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@ -66,7 +66,6 @@ extern CORE_ADDR skip_prologue ();
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of an instruction. Shrug. */
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of an instruction. Shrug. */
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#define ADDR_BITS_REMOVE(addr) ((addr) & ~3)
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#define ADDR_BITS_REMOVE(addr) ((addr) & ~3)
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#define ADDR_BITS_SET(addr) (((addr) | 0x00000002) - 4)
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/* Immediately after a function call, return the saved pc.
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/* Immediately after a function call, return the saved pc.
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Can't always go through the frames for this because on some machines
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Can't always go through the frames for this because on some machines
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@ -523,15 +522,103 @@ void frame_find_saved_regs PARAMS((struct frame_info *fi,
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frame_find_saved_regs (frame_info, &frame_saved_regs)
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frame_find_saved_regs (frame_info, &frame_saved_regs)
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/* There is not currently a functioning way to call functions in the
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inferior. */
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/* But if there was this is where we'd put the call dummy. */
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/* #define CALL_DUMMY_LOCATION AFTER_TEXT_END */
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/* When popping a frame on the 88k (say when doing a return command), the
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calling function only expects to have the "preserved" registers restored.
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Thus, those are the only ones that we even try to restore here. */
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#define POP_FRAME pop_frame ()
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#define POP_FRAME pop_frame ()
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extern void pop_frame ();
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extern void pop_frame ();
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/* Call function stuff contributed by Kevin Buettner of Motorola. */
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#define CALL_DUMMY_LOCATION AFTER_TEXT_END
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extern void m88k_push_dummy_frame();
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#define PUSH_DUMMY_FRAME m88k_push_dummy_frame()
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#define CALL_DUMMY { \
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0x67ff00c0, /* 0: subu #sp,#sp,0xc0 */ \
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0x243f0004, /* 4: st #r1,#sp,0x4 */ \
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0x245f0008, /* 8: st #r2,#sp,0x8 */ \
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0x247f000c, /* c: st #r3,#sp,0xc */ \
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0x249f0010, /* 10: st #r4,#sp,0x10 */ \
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0x24bf0014, /* 14: st #r5,#sp,0x14 */ \
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0x24df0018, /* 18: st #r6,#sp,0x18 */ \
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0x24ff001c, /* 1c: st #r7,#sp,0x1c */ \
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0x251f0020, /* 20: st #r8,#sp,0x20 */ \
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0x253f0024, /* 24: st #r9,#sp,0x24 */ \
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0x255f0028, /* 28: st #r10,#sp,0x28 */ \
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0x257f002c, /* 2c: st #r11,#sp,0x2c */ \
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0x259f0030, /* 30: st #r12,#sp,0x30 */ \
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0x25bf0034, /* 34: st #r13,#sp,0x34 */ \
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0x25df0038, /* 38: st #r14,#sp,0x38 */ \
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0x25ff003c, /* 3c: st #r15,#sp,0x3c */ \
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0x261f0040, /* 40: st #r16,#sp,0x40 */ \
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0x263f0044, /* 44: st #r17,#sp,0x44 */ \
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0x265f0048, /* 48: st #r18,#sp,0x48 */ \
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0x267f004c, /* 4c: st #r19,#sp,0x4c */ \
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0x269f0050, /* 50: st #r20,#sp,0x50 */ \
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0x26bf0054, /* 54: st #r21,#sp,0x54 */ \
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0x26df0058, /* 58: st #r22,#sp,0x58 */ \
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0x26ff005c, /* 5c: st #r23,#sp,0x5c */ \
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0x271f0060, /* 60: st #r24,#sp,0x60 */ \
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0x273f0064, /* 64: st #r25,#sp,0x64 */ \
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0x275f0068, /* 68: st #r26,#sp,0x68 */ \
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0x277f006c, /* 6c: st #r27,#sp,0x6c */ \
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0x279f0070, /* 70: st #r28,#sp,0x70 */ \
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0x27bf0074, /* 74: st #r29,#sp,0x74 */ \
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0x27df0078, /* 78: st #r30,#sp,0x78 */ \
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0x63df0000, /* 7c: addu #r30,#sp,0x0 */ \
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0x145f0000, /* 80: ld #r2,#sp,0x0 */ \
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0x147f0004, /* 84: ld #r3,#sp,0x4 */ \
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0x149f0008, /* 88: ld #r4,#sp,0x8 */ \
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0x14bf000c, /* 8c: ld #r5,#sp,0xc */ \
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0x14df0010, /* 90: ld #r6,#sp,0x10 */ \
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0x14ff0014, /* 94: ld #r7,#sp,0x14 */ \
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0x151f0018, /* 98: ld #r8,#sp,0x18 */ \
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0x153f001c, /* 9c: ld #r9,#sp,0x1c */ \
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0x5c200000, /* a0: or.u #r1,#r0,0x0 */ \
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0x58210000, /* a4: or #r1,#r1,0x0 */ \
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0xf400c801, /* a8: jsr #r1 */ \
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0xf000d1ff /* ac: tb0 0x0,#r0,0x1ff */ \
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}
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#define CALL_DUMMY_START_OFFSET 0x80
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#define CALL_DUMMY_LENGTH 0xb0
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/* FIXME: byteswapping. */
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#define FIX_CALL_DUMMY(dummy, pc, fun, nargs, args, type, gcc_p) \
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{ \
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*(unsigned long *)((char *) (dummy) + 0xa0) |= \
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(((unsigned long) (fun)) >> 16); \
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*(unsigned long *)((char *) (dummy) + 0xa4) |= \
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(((unsigned long) (fun)) & 0xffff); \
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pc = text_end; \
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}
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#define STACK_ALIGN(addr) (((addr)+7) & -8)
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#define STORE_STRUCT_RETURN(addr, sp) \
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write_register (SRA_REGNUM, (addr))
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#define NEED_TEXT_START_END 1
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/* According to the MC88100 RISC Microprocessor User's Manual, section
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6.4.3.1.2:
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... can be made to return to a particular instruction by placing a
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valid instruction address in the SNIP and the next sequential
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instruction address in the SFIP (with V bits set and E bits clear).
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The rte resumes execution at the instruction pointed to by the
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SNIP, then the SFIP.
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The E bit is the least significant bit (bit 0). The V (valid) bit is
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bit 1. This is why we logical or 2 into the values we are writing
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below. It turns out that SXIP plays no role when returning from an
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exception so nothing special has to be done with it. We could even
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(presumably) give it a totally bogus value.
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-- Kevin Buettner
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*/
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#define TARGET_WRITE_PC(val) { \
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write_register(SXIP_REGNUM, (long) val); \
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write_register(SNIP_REGNUM, (long) val | 2); \
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write_register(SFIP_REGNUM, ((long) val | 2) + 4); \
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}
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@ -226,7 +226,6 @@ extern CORE_ADDR sh_skip_prologue ();
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typedef unsigned short INSN_WORD;
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typedef unsigned short INSN_WORD;
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#define ADDR_BITS_REMOVE(addr) ((addr) & 0xffffff)
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#define ADDR_BITS_REMOVE(addr) ((addr) & 0xffffff)
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#define ADDR_BITS_SET(addr) (addr)
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#define CALL_DUMMY_LENGTH 10
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#define CALL_DUMMY_LENGTH 10
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@ -291,7 +291,6 @@ extern void z8k_pop_frame PARAMS ((void));
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#define SP_ARG0 (1 * 4)
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#define SP_ARG0 (1 * 4)
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#define ADDR_BITS_REMOVE(x) addr_bits_remove(x)
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#define ADDR_BITS_REMOVE(x) addr_bits_remove(x)
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#define ADDR_BITS_SET(x) addr_bits_set(x)
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int z8001_mode;
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int z8001_mode;
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#define BIG (z8001_mode)
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#define BIG (z8001_mode)
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}
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}
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void
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addr_bits_set ()
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{
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abort ();
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}
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int
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int
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saved_pc_after_call ()
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saved_pc_after_call ()
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{
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{
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